ixgb_main.c 62 KB

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  1. /*******************************************************************************
  2. Intel PRO/10GbE Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "ixgb.h"
  22. char ixgb_driver_name[] = "ixgb";
  23. static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  24. #ifndef CONFIG_IXGB_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "1.0.126-k4"DRIVERNAPI
  30. const char ixgb_driver_version[] = DRV_VERSION;
  31. static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* ixgb_pci_tbl - PCI Device ID Table
  33. *
  34. * Wildcard entries (PCI_ANY_ID) should come last
  35. * Last entry must be all 0s
  36. *
  37. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  38. * Class, Class Mask, private data (not used) }
  39. */
  40. static struct pci_device_id ixgb_pci_tbl[] = {
  41. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  42. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  43. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
  44. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  45. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  46. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  47. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  48. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  49. /* required last entry */
  50. {0,}
  51. };
  52. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  53. /* Local Function Prototypes */
  54. int ixgb_up(struct ixgb_adapter *adapter);
  55. void ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog);
  56. void ixgb_reset(struct ixgb_adapter *adapter);
  57. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  58. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  59. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  60. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  61. void ixgb_update_stats(struct ixgb_adapter *adapter);
  62. static int ixgb_init_module(void);
  63. static void ixgb_exit_module(void);
  64. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  65. static void __devexit ixgb_remove(struct pci_dev *pdev);
  66. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  67. static int ixgb_open(struct net_device *netdev);
  68. static int ixgb_close(struct net_device *netdev);
  69. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  70. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  71. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  72. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  73. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  74. static void ixgb_set_multi(struct net_device *netdev);
  75. static void ixgb_watchdog(unsigned long data);
  76. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  77. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  78. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  79. static int ixgb_set_mac(struct net_device *netdev, void *p);
  80. static irqreturn_t ixgb_intr(int irq, void *data);
  81. static bool ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  82. #ifdef CONFIG_IXGB_NAPI
  83. static int ixgb_clean(struct napi_struct *napi, int budget);
  84. static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  85. int *work_done, int work_to_do);
  86. #else
  87. static bool ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  88. #endif
  89. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  90. static void ixgb_tx_timeout(struct net_device *dev);
  91. static void ixgb_tx_timeout_task(struct work_struct *work);
  92. static void ixgb_vlan_rx_register(struct net_device *netdev,
  93. struct vlan_group *grp);
  94. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
  95. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
  96. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  97. #ifdef CONFIG_NET_POLL_CONTROLLER
  98. /* for netdump / net console */
  99. static void ixgb_netpoll(struct net_device *dev);
  100. #endif
  101. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  102. enum pci_channel_state state);
  103. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
  104. static void ixgb_io_resume (struct pci_dev *pdev);
  105. static struct pci_error_handlers ixgb_err_handler = {
  106. .error_detected = ixgb_io_error_detected,
  107. .slot_reset = ixgb_io_slot_reset,
  108. .resume = ixgb_io_resume,
  109. };
  110. static struct pci_driver ixgb_driver = {
  111. .name = ixgb_driver_name,
  112. .id_table = ixgb_pci_tbl,
  113. .probe = ixgb_probe,
  114. .remove = __devexit_p(ixgb_remove),
  115. .err_handler = &ixgb_err_handler
  116. };
  117. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  118. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  119. MODULE_LICENSE("GPL");
  120. MODULE_VERSION(DRV_VERSION);
  121. #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  122. static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
  123. module_param(debug, int, 0);
  124. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  125. /**
  126. * ixgb_init_module - Driver Registration Routine
  127. *
  128. * ixgb_init_module is the first routine called when the driver is
  129. * loaded. All it does is register with the PCI subsystem.
  130. **/
  131. static int __init
  132. ixgb_init_module(void)
  133. {
  134. printk(KERN_INFO "%s - version %s\n",
  135. ixgb_driver_string, ixgb_driver_version);
  136. printk(KERN_INFO "%s\n", ixgb_copyright);
  137. return pci_register_driver(&ixgb_driver);
  138. }
  139. module_init(ixgb_init_module);
  140. /**
  141. * ixgb_exit_module - Driver Exit Cleanup Routine
  142. *
  143. * ixgb_exit_module is called just before the driver is removed
  144. * from memory.
  145. **/
  146. static void __exit
  147. ixgb_exit_module(void)
  148. {
  149. pci_unregister_driver(&ixgb_driver);
  150. }
  151. module_exit(ixgb_exit_module);
  152. /**
  153. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  154. * @adapter: board private structure
  155. **/
  156. static void
  157. ixgb_irq_disable(struct ixgb_adapter *adapter)
  158. {
  159. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  160. IXGB_WRITE_FLUSH(&adapter->hw);
  161. synchronize_irq(adapter->pdev->irq);
  162. }
  163. /**
  164. * ixgb_irq_enable - Enable default interrupt generation settings
  165. * @adapter: board private structure
  166. **/
  167. static void
  168. ixgb_irq_enable(struct ixgb_adapter *adapter)
  169. {
  170. u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
  171. IXGB_INT_TXDW | IXGB_INT_LSC;
  172. if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
  173. val |= IXGB_INT_GPI0;
  174. IXGB_WRITE_REG(&adapter->hw, IMS, val);
  175. IXGB_WRITE_FLUSH(&adapter->hw);
  176. }
  177. int
  178. ixgb_up(struct ixgb_adapter *adapter)
  179. {
  180. struct net_device *netdev = adapter->netdev;
  181. int err, irq_flags = IRQF_SHARED;
  182. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  183. struct ixgb_hw *hw = &adapter->hw;
  184. /* hardware has been reset, we need to reload some things */
  185. ixgb_rar_set(hw, netdev->dev_addr, 0);
  186. ixgb_set_multi(netdev);
  187. ixgb_restore_vlan(adapter);
  188. ixgb_configure_tx(adapter);
  189. ixgb_setup_rctl(adapter);
  190. ixgb_configure_rx(adapter);
  191. ixgb_alloc_rx_buffers(adapter);
  192. /* disable interrupts and get the hardware into a known state */
  193. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  194. /* only enable MSI if bus is in PCI-X mode */
  195. if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
  196. err = pci_enable_msi(adapter->pdev);
  197. if (!err) {
  198. adapter->have_msi = 1;
  199. irq_flags = 0;
  200. }
  201. /* proceed to try to request regular interrupt */
  202. }
  203. err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
  204. netdev->name, netdev);
  205. if (err) {
  206. if (adapter->have_msi)
  207. pci_disable_msi(adapter->pdev);
  208. DPRINTK(PROBE, ERR,
  209. "Unable to allocate interrupt Error: %d\n", err);
  210. return err;
  211. }
  212. if((hw->max_frame_size != max_frame) ||
  213. (hw->max_frame_size !=
  214. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  215. hw->max_frame_size = max_frame;
  216. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  217. if(hw->max_frame_size >
  218. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  219. u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
  220. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  221. ctrl0 |= IXGB_CTRL0_JFE;
  222. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  223. }
  224. }
  225. }
  226. clear_bit(__IXGB_DOWN, &adapter->flags);
  227. #ifdef CONFIG_IXGB_NAPI
  228. napi_enable(&adapter->napi);
  229. #endif
  230. ixgb_irq_enable(adapter);
  231. mod_timer(&adapter->watchdog_timer, jiffies);
  232. return 0;
  233. }
  234. void
  235. ixgb_down(struct ixgb_adapter *adapter, bool kill_watchdog)
  236. {
  237. struct net_device *netdev = adapter->netdev;
  238. /* prevent the interrupt handler from restarting watchdog */
  239. set_bit(__IXGB_DOWN, &adapter->flags);
  240. #ifdef CONFIG_IXGB_NAPI
  241. napi_disable(&adapter->napi);
  242. #endif
  243. /* waiting for NAPI to complete can re-enable interrupts */
  244. ixgb_irq_disable(adapter);
  245. free_irq(adapter->pdev->irq, netdev);
  246. if (adapter->have_msi)
  247. pci_disable_msi(adapter->pdev);
  248. if(kill_watchdog)
  249. del_timer_sync(&adapter->watchdog_timer);
  250. adapter->link_speed = 0;
  251. adapter->link_duplex = 0;
  252. netif_carrier_off(netdev);
  253. netif_stop_queue(netdev);
  254. ixgb_reset(adapter);
  255. ixgb_clean_tx_ring(adapter);
  256. ixgb_clean_rx_ring(adapter);
  257. }
  258. void
  259. ixgb_reset(struct ixgb_adapter *adapter)
  260. {
  261. struct ixgb_hw *hw = &adapter->hw;
  262. ixgb_adapter_stop(hw);
  263. if (!ixgb_init_hw(hw))
  264. DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
  265. /* restore frame size information */
  266. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  267. if (hw->max_frame_size >
  268. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  269. u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
  270. if (!(ctrl0 & IXGB_CTRL0_JFE)) {
  271. ctrl0 |= IXGB_CTRL0_JFE;
  272. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  273. }
  274. }
  275. }
  276. /**
  277. * ixgb_probe - Device Initialization Routine
  278. * @pdev: PCI device information struct
  279. * @ent: entry in ixgb_pci_tbl
  280. *
  281. * Returns 0 on success, negative on failure
  282. *
  283. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  284. * The OS initialization, configuring of the adapter private structure,
  285. * and a hardware reset occur.
  286. **/
  287. static int __devinit
  288. ixgb_probe(struct pci_dev *pdev,
  289. const struct pci_device_id *ent)
  290. {
  291. struct net_device *netdev = NULL;
  292. struct ixgb_adapter *adapter;
  293. static int cards_found = 0;
  294. int pci_using_dac;
  295. int i;
  296. int err;
  297. if((err = pci_enable_device(pdev)))
  298. return err;
  299. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  300. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  301. pci_using_dac = 1;
  302. } else {
  303. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
  304. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  305. printk(KERN_ERR
  306. "ixgb: No usable DMA configuration, aborting\n");
  307. goto err_dma_mask;
  308. }
  309. pci_using_dac = 0;
  310. }
  311. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  312. goto err_request_regions;
  313. pci_set_master(pdev);
  314. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  315. if(!netdev) {
  316. err = -ENOMEM;
  317. goto err_alloc_etherdev;
  318. }
  319. SET_NETDEV_DEV(netdev, &pdev->dev);
  320. pci_set_drvdata(pdev, netdev);
  321. adapter = netdev_priv(netdev);
  322. adapter->netdev = netdev;
  323. adapter->pdev = pdev;
  324. adapter->hw.back = adapter;
  325. adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
  326. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
  327. pci_resource_len(pdev, BAR_0));
  328. if (!adapter->hw.hw_addr) {
  329. err = -EIO;
  330. goto err_ioremap;
  331. }
  332. for(i = BAR_1; i <= BAR_5; i++) {
  333. if(pci_resource_len(pdev, i) == 0)
  334. continue;
  335. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  336. adapter->hw.io_base = pci_resource_start(pdev, i);
  337. break;
  338. }
  339. }
  340. netdev->open = &ixgb_open;
  341. netdev->stop = &ixgb_close;
  342. netdev->hard_start_xmit = &ixgb_xmit_frame;
  343. netdev->get_stats = &ixgb_get_stats;
  344. netdev->set_multicast_list = &ixgb_set_multi;
  345. netdev->set_mac_address = &ixgb_set_mac;
  346. netdev->change_mtu = &ixgb_change_mtu;
  347. ixgb_set_ethtool_ops(netdev);
  348. netdev->tx_timeout = &ixgb_tx_timeout;
  349. netdev->watchdog_timeo = 5 * HZ;
  350. #ifdef CONFIG_IXGB_NAPI
  351. netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
  352. #endif
  353. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  354. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  355. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  356. #ifdef CONFIG_NET_POLL_CONTROLLER
  357. netdev->poll_controller = ixgb_netpoll;
  358. #endif
  359. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  360. adapter->bd_number = cards_found;
  361. adapter->link_speed = 0;
  362. adapter->link_duplex = 0;
  363. /* setup the private structure */
  364. if((err = ixgb_sw_init(adapter)))
  365. goto err_sw_init;
  366. netdev->features = NETIF_F_SG |
  367. NETIF_F_HW_CSUM |
  368. NETIF_F_HW_VLAN_TX |
  369. NETIF_F_HW_VLAN_RX |
  370. NETIF_F_HW_VLAN_FILTER;
  371. netdev->features |= NETIF_F_TSO;
  372. if(pci_using_dac)
  373. netdev->features |= NETIF_F_HIGHDMA;
  374. /* make sure the EEPROM is good */
  375. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  376. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  377. err = -EIO;
  378. goto err_eeprom;
  379. }
  380. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  381. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  382. if(!is_valid_ether_addr(netdev->perm_addr)) {
  383. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  384. err = -EIO;
  385. goto err_eeprom;
  386. }
  387. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  388. init_timer(&adapter->watchdog_timer);
  389. adapter->watchdog_timer.function = &ixgb_watchdog;
  390. adapter->watchdog_timer.data = (unsigned long)adapter;
  391. INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
  392. strcpy(netdev->name, "eth%d");
  393. if((err = register_netdev(netdev)))
  394. goto err_register;
  395. /* we're going to reset, so assume we have no link for now */
  396. netif_carrier_off(netdev);
  397. netif_stop_queue(netdev);
  398. DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
  399. ixgb_check_options(adapter);
  400. /* reset the hardware with the new settings */
  401. ixgb_reset(adapter);
  402. cards_found++;
  403. return 0;
  404. err_register:
  405. err_sw_init:
  406. err_eeprom:
  407. iounmap(adapter->hw.hw_addr);
  408. err_ioremap:
  409. free_netdev(netdev);
  410. err_alloc_etherdev:
  411. pci_release_regions(pdev);
  412. err_request_regions:
  413. err_dma_mask:
  414. pci_disable_device(pdev);
  415. return err;
  416. }
  417. /**
  418. * ixgb_remove - Device Removal Routine
  419. * @pdev: PCI device information struct
  420. *
  421. * ixgb_remove is called by the PCI subsystem to alert the driver
  422. * that it should release a PCI device. The could be caused by a
  423. * Hot-Plug event, or because the driver is going to be removed from
  424. * memory.
  425. **/
  426. static void __devexit
  427. ixgb_remove(struct pci_dev *pdev)
  428. {
  429. struct net_device *netdev = pci_get_drvdata(pdev);
  430. struct ixgb_adapter *adapter = netdev_priv(netdev);
  431. flush_scheduled_work();
  432. unregister_netdev(netdev);
  433. iounmap(adapter->hw.hw_addr);
  434. pci_release_regions(pdev);
  435. free_netdev(netdev);
  436. }
  437. /**
  438. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  439. * @adapter: board private structure to initialize
  440. *
  441. * ixgb_sw_init initializes the Adapter private data structure.
  442. * Fields are initialized based on PCI device information and
  443. * OS network device settings (MTU size).
  444. **/
  445. static int __devinit
  446. ixgb_sw_init(struct ixgb_adapter *adapter)
  447. {
  448. struct ixgb_hw *hw = &adapter->hw;
  449. struct net_device *netdev = adapter->netdev;
  450. struct pci_dev *pdev = adapter->pdev;
  451. /* PCI config space info */
  452. hw->vendor_id = pdev->vendor;
  453. hw->device_id = pdev->device;
  454. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  455. hw->subsystem_id = pdev->subsystem_device;
  456. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  457. adapter->rx_buffer_len = hw->max_frame_size + 8; /* + 8 for errata */
  458. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  459. || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
  460. || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  461. || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  462. hw->mac_type = ixgb_82597;
  463. else {
  464. /* should never have loaded on this device */
  465. DPRINTK(PROBE, ERR, "unsupported device id\n");
  466. }
  467. /* enable flow control to be programmed */
  468. hw->fc.send_xon = 1;
  469. set_bit(__IXGB_DOWN, &adapter->flags);
  470. return 0;
  471. }
  472. /**
  473. * ixgb_open - Called when a network interface is made active
  474. * @netdev: network interface device structure
  475. *
  476. * Returns 0 on success, negative value on failure
  477. *
  478. * The open entry point is called when a network interface is made
  479. * active by the system (IFF_UP). At this point all resources needed
  480. * for transmit and receive operations are allocated, the interrupt
  481. * handler is registered with the OS, the watchdog timer is started,
  482. * and the stack is notified that the interface is ready.
  483. **/
  484. static int
  485. ixgb_open(struct net_device *netdev)
  486. {
  487. struct ixgb_adapter *adapter = netdev_priv(netdev);
  488. int err;
  489. /* allocate transmit descriptors */
  490. if((err = ixgb_setup_tx_resources(adapter)))
  491. goto err_setup_tx;
  492. /* allocate receive descriptors */
  493. if((err = ixgb_setup_rx_resources(adapter)))
  494. goto err_setup_rx;
  495. if((err = ixgb_up(adapter)))
  496. goto err_up;
  497. return 0;
  498. err_up:
  499. ixgb_free_rx_resources(adapter);
  500. err_setup_rx:
  501. ixgb_free_tx_resources(adapter);
  502. err_setup_tx:
  503. ixgb_reset(adapter);
  504. return err;
  505. }
  506. /**
  507. * ixgb_close - Disables a network interface
  508. * @netdev: network interface device structure
  509. *
  510. * Returns 0, this is not allowed to fail
  511. *
  512. * The close entry point is called when an interface is de-activated
  513. * by the OS. The hardware is still under the drivers control, but
  514. * needs to be disabled. A global MAC reset is issued to stop the
  515. * hardware, and all transmit and receive resources are freed.
  516. **/
  517. static int
  518. ixgb_close(struct net_device *netdev)
  519. {
  520. struct ixgb_adapter *adapter = netdev_priv(netdev);
  521. ixgb_down(adapter, true);
  522. ixgb_free_tx_resources(adapter);
  523. ixgb_free_rx_resources(adapter);
  524. return 0;
  525. }
  526. /**
  527. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  528. * @adapter: board private structure
  529. *
  530. * Return 0 on success, negative on failure
  531. **/
  532. int
  533. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  534. {
  535. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  536. struct pci_dev *pdev = adapter->pdev;
  537. int size;
  538. size = sizeof(struct ixgb_buffer) * txdr->count;
  539. txdr->buffer_info = vmalloc(size);
  540. if(!txdr->buffer_info) {
  541. DPRINTK(PROBE, ERR,
  542. "Unable to allocate transmit descriptor ring memory\n");
  543. return -ENOMEM;
  544. }
  545. memset(txdr->buffer_info, 0, size);
  546. /* round up to nearest 4K */
  547. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  548. txdr->size = ALIGN(txdr->size, 4096);
  549. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  550. if(!txdr->desc) {
  551. vfree(txdr->buffer_info);
  552. DPRINTK(PROBE, ERR,
  553. "Unable to allocate transmit descriptor memory\n");
  554. return -ENOMEM;
  555. }
  556. memset(txdr->desc, 0, txdr->size);
  557. txdr->next_to_use = 0;
  558. txdr->next_to_clean = 0;
  559. return 0;
  560. }
  561. /**
  562. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  563. * @adapter: board private structure
  564. *
  565. * Configure the Tx unit of the MAC after a reset.
  566. **/
  567. static void
  568. ixgb_configure_tx(struct ixgb_adapter *adapter)
  569. {
  570. u64 tdba = adapter->tx_ring.dma;
  571. u32 tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  572. u32 tctl;
  573. struct ixgb_hw *hw = &adapter->hw;
  574. /* Setup the Base and Length of the Tx Descriptor Ring
  575. * tx_ring.dma can be either a 32 or 64 bit value
  576. */
  577. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  578. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  579. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  580. /* Setup the HW Tx Head and Tail descriptor pointers */
  581. IXGB_WRITE_REG(hw, TDH, 0);
  582. IXGB_WRITE_REG(hw, TDT, 0);
  583. /* don't set up txdctl, it induces performance problems if configured
  584. * incorrectly */
  585. /* Set the Tx Interrupt Delay register */
  586. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  587. /* Program the Transmit Control Register */
  588. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  589. IXGB_WRITE_REG(hw, TCTL, tctl);
  590. /* Setup Transmit Descriptor Settings for this adapter */
  591. adapter->tx_cmd_type =
  592. IXGB_TX_DESC_TYPE
  593. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  594. }
  595. /**
  596. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  597. * @adapter: board private structure
  598. *
  599. * Returns 0 on success, negative on failure
  600. **/
  601. int
  602. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  603. {
  604. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  605. struct pci_dev *pdev = adapter->pdev;
  606. int size;
  607. size = sizeof(struct ixgb_buffer) * rxdr->count;
  608. rxdr->buffer_info = vmalloc(size);
  609. if(!rxdr->buffer_info) {
  610. DPRINTK(PROBE, ERR,
  611. "Unable to allocate receive descriptor ring\n");
  612. return -ENOMEM;
  613. }
  614. memset(rxdr->buffer_info, 0, size);
  615. /* Round up to nearest 4K */
  616. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  617. rxdr->size = ALIGN(rxdr->size, 4096);
  618. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  619. if(!rxdr->desc) {
  620. vfree(rxdr->buffer_info);
  621. DPRINTK(PROBE, ERR,
  622. "Unable to allocate receive descriptors\n");
  623. return -ENOMEM;
  624. }
  625. memset(rxdr->desc, 0, rxdr->size);
  626. rxdr->next_to_clean = 0;
  627. rxdr->next_to_use = 0;
  628. return 0;
  629. }
  630. /**
  631. * ixgb_setup_rctl - configure the receive control register
  632. * @adapter: Board private structure
  633. **/
  634. static void
  635. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  636. {
  637. u32 rctl;
  638. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  639. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  640. rctl |=
  641. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  642. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  643. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  644. rctl |= IXGB_RCTL_SECRC;
  645. if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
  646. rctl |= IXGB_RCTL_BSIZE_2048;
  647. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
  648. rctl |= IXGB_RCTL_BSIZE_4096;
  649. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
  650. rctl |= IXGB_RCTL_BSIZE_8192;
  651. else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
  652. rctl |= IXGB_RCTL_BSIZE_16384;
  653. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  654. }
  655. /**
  656. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  657. * @adapter: board private structure
  658. *
  659. * Configure the Rx unit of the MAC after a reset.
  660. **/
  661. static void
  662. ixgb_configure_rx(struct ixgb_adapter *adapter)
  663. {
  664. u64 rdba = adapter->rx_ring.dma;
  665. u32 rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  666. struct ixgb_hw *hw = &adapter->hw;
  667. u32 rctl;
  668. u32 rxcsum;
  669. /* make sure receives are disabled while setting up the descriptors */
  670. rctl = IXGB_READ_REG(hw, RCTL);
  671. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  672. /* set the Receive Delay Timer Register */
  673. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  674. /* Setup the Base and Length of the Rx Descriptor Ring */
  675. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  676. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  677. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  678. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  679. IXGB_WRITE_REG(hw, RDH, 0);
  680. IXGB_WRITE_REG(hw, RDT, 0);
  681. /* due to the hardware errata with RXDCTL, we are unable to use any of
  682. * the performance enhancing features of it without causing other
  683. * subtle bugs, some of the bugs could include receive length
  684. * corruption at high data rates (WTHRESH > 0) and/or receive
  685. * descriptor ring irregularites (particularly in hardware cache) */
  686. IXGB_WRITE_REG(hw, RXDCTL, 0);
  687. /* Enable Receive Checksum Offload for TCP and UDP */
  688. if (adapter->rx_csum) {
  689. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  690. rxcsum |= IXGB_RXCSUM_TUOFL;
  691. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  692. }
  693. /* Enable Receives */
  694. IXGB_WRITE_REG(hw, RCTL, rctl);
  695. }
  696. /**
  697. * ixgb_free_tx_resources - Free Tx Resources
  698. * @adapter: board private structure
  699. *
  700. * Free all transmit software resources
  701. **/
  702. void
  703. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  704. {
  705. struct pci_dev *pdev = adapter->pdev;
  706. ixgb_clean_tx_ring(adapter);
  707. vfree(adapter->tx_ring.buffer_info);
  708. adapter->tx_ring.buffer_info = NULL;
  709. pci_free_consistent(pdev, adapter->tx_ring.size,
  710. adapter->tx_ring.desc, adapter->tx_ring.dma);
  711. adapter->tx_ring.desc = NULL;
  712. }
  713. static void
  714. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  715. struct ixgb_buffer *buffer_info)
  716. {
  717. struct pci_dev *pdev = adapter->pdev;
  718. if (buffer_info->dma)
  719. pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
  720. PCI_DMA_TODEVICE);
  721. if (buffer_info->skb)
  722. dev_kfree_skb_any(buffer_info->skb);
  723. buffer_info->skb = NULL;
  724. buffer_info->dma = 0;
  725. buffer_info->time_stamp = 0;
  726. /* these fields must always be initialized in tx
  727. * buffer_info->length = 0;
  728. * buffer_info->next_to_watch = 0; */
  729. }
  730. /**
  731. * ixgb_clean_tx_ring - Free Tx Buffers
  732. * @adapter: board private structure
  733. **/
  734. static void
  735. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  736. {
  737. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  738. struct ixgb_buffer *buffer_info;
  739. unsigned long size;
  740. unsigned int i;
  741. /* Free all the Tx ring sk_buffs */
  742. for(i = 0; i < tx_ring->count; i++) {
  743. buffer_info = &tx_ring->buffer_info[i];
  744. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  745. }
  746. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  747. memset(tx_ring->buffer_info, 0, size);
  748. /* Zero out the descriptor ring */
  749. memset(tx_ring->desc, 0, tx_ring->size);
  750. tx_ring->next_to_use = 0;
  751. tx_ring->next_to_clean = 0;
  752. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  753. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  754. }
  755. /**
  756. * ixgb_free_rx_resources - Free Rx Resources
  757. * @adapter: board private structure
  758. *
  759. * Free all receive software resources
  760. **/
  761. void
  762. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  763. {
  764. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  765. struct pci_dev *pdev = adapter->pdev;
  766. ixgb_clean_rx_ring(adapter);
  767. vfree(rx_ring->buffer_info);
  768. rx_ring->buffer_info = NULL;
  769. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  770. rx_ring->desc = NULL;
  771. }
  772. /**
  773. * ixgb_clean_rx_ring - Free Rx Buffers
  774. * @adapter: board private structure
  775. **/
  776. static void
  777. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  778. {
  779. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  780. struct ixgb_buffer *buffer_info;
  781. struct pci_dev *pdev = adapter->pdev;
  782. unsigned long size;
  783. unsigned int i;
  784. /* Free all the Rx ring sk_buffs */
  785. for(i = 0; i < rx_ring->count; i++) {
  786. buffer_info = &rx_ring->buffer_info[i];
  787. if(buffer_info->skb) {
  788. pci_unmap_single(pdev,
  789. buffer_info->dma,
  790. buffer_info->length,
  791. PCI_DMA_FROMDEVICE);
  792. dev_kfree_skb(buffer_info->skb);
  793. buffer_info->skb = NULL;
  794. }
  795. }
  796. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  797. memset(rx_ring->buffer_info, 0, size);
  798. /* Zero out the descriptor ring */
  799. memset(rx_ring->desc, 0, rx_ring->size);
  800. rx_ring->next_to_clean = 0;
  801. rx_ring->next_to_use = 0;
  802. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  803. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  804. }
  805. /**
  806. * ixgb_set_mac - Change the Ethernet Address of the NIC
  807. * @netdev: network interface device structure
  808. * @p: pointer to an address structure
  809. *
  810. * Returns 0 on success, negative on failure
  811. **/
  812. static int
  813. ixgb_set_mac(struct net_device *netdev, void *p)
  814. {
  815. struct ixgb_adapter *adapter = netdev_priv(netdev);
  816. struct sockaddr *addr = p;
  817. if(!is_valid_ether_addr(addr->sa_data))
  818. return -EADDRNOTAVAIL;
  819. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  820. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  821. return 0;
  822. }
  823. /**
  824. * ixgb_set_multi - Multicast and Promiscuous mode set
  825. * @netdev: network interface device structure
  826. *
  827. * The set_multi entry point is called whenever the multicast address
  828. * list or the network interface flags are updated. This routine is
  829. * responsible for configuring the hardware for proper multicast,
  830. * promiscuous mode, and all-multi behavior.
  831. **/
  832. static void
  833. ixgb_set_multi(struct net_device *netdev)
  834. {
  835. struct ixgb_adapter *adapter = netdev_priv(netdev);
  836. struct ixgb_hw *hw = &adapter->hw;
  837. struct dev_mc_list *mc_ptr;
  838. u32 rctl;
  839. int i;
  840. /* Check for Promiscuous and All Multicast modes */
  841. rctl = IXGB_READ_REG(hw, RCTL);
  842. if(netdev->flags & IFF_PROMISC) {
  843. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  844. } else if(netdev->flags & IFF_ALLMULTI) {
  845. rctl |= IXGB_RCTL_MPE;
  846. rctl &= ~IXGB_RCTL_UPE;
  847. } else {
  848. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  849. }
  850. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  851. rctl |= IXGB_RCTL_MPE;
  852. IXGB_WRITE_REG(hw, RCTL, rctl);
  853. } else {
  854. u8 mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
  855. IXGB_ETH_LENGTH_OF_ADDRESS];
  856. IXGB_WRITE_REG(hw, RCTL, rctl);
  857. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  858. i++, mc_ptr = mc_ptr->next)
  859. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  860. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  861. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  862. }
  863. }
  864. /**
  865. * ixgb_watchdog - Timer Call-back
  866. * @data: pointer to netdev cast into an unsigned long
  867. **/
  868. static void
  869. ixgb_watchdog(unsigned long data)
  870. {
  871. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  872. struct net_device *netdev = adapter->netdev;
  873. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  874. ixgb_check_for_link(&adapter->hw);
  875. if (ixgb_check_for_bad_link(&adapter->hw)) {
  876. /* force the reset path */
  877. netif_stop_queue(netdev);
  878. }
  879. if(adapter->hw.link_up) {
  880. if(!netif_carrier_ok(netdev)) {
  881. DPRINTK(LINK, INFO,
  882. "NIC Link is Up 10000 Mbps Full Duplex\n");
  883. adapter->link_speed = 10000;
  884. adapter->link_duplex = FULL_DUPLEX;
  885. netif_carrier_on(netdev);
  886. netif_wake_queue(netdev);
  887. }
  888. } else {
  889. if(netif_carrier_ok(netdev)) {
  890. adapter->link_speed = 0;
  891. adapter->link_duplex = 0;
  892. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  893. netif_carrier_off(netdev);
  894. netif_stop_queue(netdev);
  895. }
  896. }
  897. ixgb_update_stats(adapter);
  898. if(!netif_carrier_ok(netdev)) {
  899. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  900. /* We've lost link, so the controller stops DMA,
  901. * but we've got queued Tx work that's never going
  902. * to get done, so reset controller to flush Tx.
  903. * (Do the reset outside of interrupt context). */
  904. schedule_work(&adapter->tx_timeout_task);
  905. }
  906. }
  907. /* Force detection of hung controller every watchdog period */
  908. adapter->detect_tx_hung = true;
  909. /* generate an interrupt to force clean up of any stragglers */
  910. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  911. /* Reset the timer */
  912. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  913. }
  914. #define IXGB_TX_FLAGS_CSUM 0x00000001
  915. #define IXGB_TX_FLAGS_VLAN 0x00000002
  916. #define IXGB_TX_FLAGS_TSO 0x00000004
  917. static int
  918. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  919. {
  920. struct ixgb_context_desc *context_desc;
  921. unsigned int i;
  922. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  923. u16 ipcse, tucse, mss;
  924. int err;
  925. if (likely(skb_is_gso(skb))) {
  926. struct ixgb_buffer *buffer_info;
  927. struct iphdr *iph;
  928. if (skb_header_cloned(skb)) {
  929. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  930. if (err)
  931. return err;
  932. }
  933. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  934. mss = skb_shinfo(skb)->gso_size;
  935. iph = ip_hdr(skb);
  936. iph->tot_len = 0;
  937. iph->check = 0;
  938. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  939. iph->daddr, 0,
  940. IPPROTO_TCP, 0);
  941. ipcss = skb_network_offset(skb);
  942. ipcso = (void *)&(iph->check) - (void *)skb->data;
  943. ipcse = skb_transport_offset(skb) - 1;
  944. tucss = skb_transport_offset(skb);
  945. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  946. tucse = 0;
  947. i = adapter->tx_ring.next_to_use;
  948. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  949. buffer_info = &adapter->tx_ring.buffer_info[i];
  950. WARN_ON(buffer_info->dma != 0);
  951. context_desc->ipcss = ipcss;
  952. context_desc->ipcso = ipcso;
  953. context_desc->ipcse = cpu_to_le16(ipcse);
  954. context_desc->tucss = tucss;
  955. context_desc->tucso = tucso;
  956. context_desc->tucse = cpu_to_le16(tucse);
  957. context_desc->mss = cpu_to_le16(mss);
  958. context_desc->hdr_len = hdr_len;
  959. context_desc->status = 0;
  960. context_desc->cmd_type_len = cpu_to_le32(
  961. IXGB_CONTEXT_DESC_TYPE
  962. | IXGB_CONTEXT_DESC_CMD_TSE
  963. | IXGB_CONTEXT_DESC_CMD_IP
  964. | IXGB_CONTEXT_DESC_CMD_TCP
  965. | IXGB_CONTEXT_DESC_CMD_IDE
  966. | (skb->len - (hdr_len)));
  967. if(++i == adapter->tx_ring.count) i = 0;
  968. adapter->tx_ring.next_to_use = i;
  969. return 1;
  970. }
  971. return 0;
  972. }
  973. static bool
  974. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  975. {
  976. struct ixgb_context_desc *context_desc;
  977. unsigned int i;
  978. u8 css, cso;
  979. if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  980. struct ixgb_buffer *buffer_info;
  981. css = skb_transport_offset(skb);
  982. cso = css + skb->csum_offset;
  983. i = adapter->tx_ring.next_to_use;
  984. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  985. buffer_info = &adapter->tx_ring.buffer_info[i];
  986. WARN_ON(buffer_info->dma != 0);
  987. context_desc->tucss = css;
  988. context_desc->tucso = cso;
  989. context_desc->tucse = 0;
  990. /* zero out any previously existing data in one instruction */
  991. *(u32 *)&(context_desc->ipcss) = 0;
  992. context_desc->status = 0;
  993. context_desc->hdr_len = 0;
  994. context_desc->mss = 0;
  995. context_desc->cmd_type_len =
  996. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  997. | IXGB_TX_DESC_CMD_IDE);
  998. if(++i == adapter->tx_ring.count) i = 0;
  999. adapter->tx_ring.next_to_use = i;
  1000. return true;
  1001. }
  1002. return false;
  1003. }
  1004. #define IXGB_MAX_TXD_PWR 14
  1005. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  1006. static int
  1007. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  1008. unsigned int first)
  1009. {
  1010. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1011. struct ixgb_buffer *buffer_info;
  1012. int len = skb->len;
  1013. unsigned int offset = 0, size, count = 0, i;
  1014. unsigned int mss = skb_shinfo(skb)->gso_size;
  1015. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1016. unsigned int f;
  1017. len -= skb->data_len;
  1018. i = tx_ring->next_to_use;
  1019. while(len) {
  1020. buffer_info = &tx_ring->buffer_info[i];
  1021. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1022. /* Workaround for premature desc write-backs
  1023. * in TSO mode. Append 4-byte sentinel desc */
  1024. if (unlikely(mss && !nr_frags && size == len && size > 8))
  1025. size -= 4;
  1026. buffer_info->length = size;
  1027. WARN_ON(buffer_info->dma != 0);
  1028. buffer_info->time_stamp = jiffies;
  1029. buffer_info->dma =
  1030. pci_map_single(adapter->pdev,
  1031. skb->data + offset,
  1032. size,
  1033. PCI_DMA_TODEVICE);
  1034. buffer_info->next_to_watch = 0;
  1035. len -= size;
  1036. offset += size;
  1037. count++;
  1038. if(++i == tx_ring->count) i = 0;
  1039. }
  1040. for(f = 0; f < nr_frags; f++) {
  1041. struct skb_frag_struct *frag;
  1042. frag = &skb_shinfo(skb)->frags[f];
  1043. len = frag->size;
  1044. offset = 0;
  1045. while(len) {
  1046. buffer_info = &tx_ring->buffer_info[i];
  1047. size = min(len, IXGB_MAX_DATA_PER_TXD);
  1048. /* Workaround for premature desc write-backs
  1049. * in TSO mode. Append 4-byte sentinel desc */
  1050. if (unlikely(mss && (f == (nr_frags - 1))
  1051. && size == len && size > 8))
  1052. size -= 4;
  1053. buffer_info->length = size;
  1054. buffer_info->time_stamp = jiffies;
  1055. buffer_info->dma =
  1056. pci_map_page(adapter->pdev,
  1057. frag->page,
  1058. frag->page_offset + offset,
  1059. size,
  1060. PCI_DMA_TODEVICE);
  1061. buffer_info->next_to_watch = 0;
  1062. len -= size;
  1063. offset += size;
  1064. count++;
  1065. if(++i == tx_ring->count) i = 0;
  1066. }
  1067. }
  1068. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1069. tx_ring->buffer_info[i].skb = skb;
  1070. tx_ring->buffer_info[first].next_to_watch = i;
  1071. return count;
  1072. }
  1073. static void
  1074. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1075. {
  1076. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1077. struct ixgb_tx_desc *tx_desc = NULL;
  1078. struct ixgb_buffer *buffer_info;
  1079. u32 cmd_type_len = adapter->tx_cmd_type;
  1080. u8 status = 0;
  1081. u8 popts = 0;
  1082. unsigned int i;
  1083. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1084. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1085. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1086. }
  1087. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1088. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1089. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1090. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1091. }
  1092. i = tx_ring->next_to_use;
  1093. while(count--) {
  1094. buffer_info = &tx_ring->buffer_info[i];
  1095. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1096. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1097. tx_desc->cmd_type_len =
  1098. cpu_to_le32(cmd_type_len | buffer_info->length);
  1099. tx_desc->status = status;
  1100. tx_desc->popts = popts;
  1101. tx_desc->vlan = cpu_to_le16(vlan_id);
  1102. if(++i == tx_ring->count) i = 0;
  1103. }
  1104. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1105. | IXGB_TX_DESC_CMD_RS );
  1106. /* Force memory writes to complete before letting h/w
  1107. * know there are new descriptors to fetch. (Only
  1108. * applicable for weak-ordered memory model archs,
  1109. * such as IA-64). */
  1110. wmb();
  1111. tx_ring->next_to_use = i;
  1112. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1113. }
  1114. static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
  1115. {
  1116. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1117. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1118. netif_stop_queue(netdev);
  1119. /* Herbert's original patch had:
  1120. * smp_mb__after_netif_stop_queue();
  1121. * but since that doesn't exist yet, just open code it. */
  1122. smp_mb();
  1123. /* We need to check again in a case another CPU has just
  1124. * made room available. */
  1125. if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
  1126. return -EBUSY;
  1127. /* A reprieve! */
  1128. netif_start_queue(netdev);
  1129. ++adapter->restart_queue;
  1130. return 0;
  1131. }
  1132. static int ixgb_maybe_stop_tx(struct net_device *netdev,
  1133. struct ixgb_desc_ring *tx_ring, int size)
  1134. {
  1135. if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
  1136. return 0;
  1137. return __ixgb_maybe_stop_tx(netdev, size);
  1138. }
  1139. /* Tx Descriptors needed, worst case */
  1140. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1141. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1142. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
  1143. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
  1144. + 1 /* one more needed for sentinel TSO workaround */
  1145. static int
  1146. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1147. {
  1148. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1149. unsigned int first;
  1150. unsigned int tx_flags = 0;
  1151. int vlan_id = 0;
  1152. int tso;
  1153. if (test_bit(__IXGB_DOWN, &adapter->flags)) {
  1154. dev_kfree_skb(skb);
  1155. return NETDEV_TX_OK;
  1156. }
  1157. if(skb->len <= 0) {
  1158. dev_kfree_skb_any(skb);
  1159. return 0;
  1160. }
  1161. if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
  1162. DESC_NEEDED)))
  1163. return NETDEV_TX_BUSY;
  1164. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1165. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1166. vlan_id = vlan_tx_tag_get(skb);
  1167. }
  1168. first = adapter->tx_ring.next_to_use;
  1169. tso = ixgb_tso(adapter, skb);
  1170. if (tso < 0) {
  1171. dev_kfree_skb_any(skb);
  1172. return NETDEV_TX_OK;
  1173. }
  1174. if (likely(tso))
  1175. tx_flags |= IXGB_TX_FLAGS_TSO;
  1176. else if(ixgb_tx_csum(adapter, skb))
  1177. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1178. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1179. tx_flags);
  1180. netdev->trans_start = jiffies;
  1181. /* Make sure there is space in the ring for the next send. */
  1182. ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
  1183. return NETDEV_TX_OK;
  1184. }
  1185. /**
  1186. * ixgb_tx_timeout - Respond to a Tx Hang
  1187. * @netdev: network interface device structure
  1188. **/
  1189. static void
  1190. ixgb_tx_timeout(struct net_device *netdev)
  1191. {
  1192. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1193. /* Do the reset outside of interrupt context */
  1194. schedule_work(&adapter->tx_timeout_task);
  1195. }
  1196. static void
  1197. ixgb_tx_timeout_task(struct work_struct *work)
  1198. {
  1199. struct ixgb_adapter *adapter =
  1200. container_of(work, struct ixgb_adapter, tx_timeout_task);
  1201. adapter->tx_timeout_count++;
  1202. ixgb_down(adapter, true);
  1203. ixgb_up(adapter);
  1204. }
  1205. /**
  1206. * ixgb_get_stats - Get System Network Statistics
  1207. * @netdev: network interface device structure
  1208. *
  1209. * Returns the address of the device statistics structure.
  1210. * The statistics are actually updated from the timer callback.
  1211. **/
  1212. static struct net_device_stats *
  1213. ixgb_get_stats(struct net_device *netdev)
  1214. {
  1215. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1216. return &adapter->net_stats;
  1217. }
  1218. /**
  1219. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1220. * @netdev: network interface device structure
  1221. * @new_mtu: new value for maximum frame size
  1222. *
  1223. * Returns 0 on success, negative on failure
  1224. **/
  1225. static int
  1226. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1227. {
  1228. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1229. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1230. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1231. /* MTU < 68 is an error for IPv4 traffic, just don't allow it */
  1232. if ((new_mtu < 68) ||
  1233. (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1234. DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
  1235. return -EINVAL;
  1236. }
  1237. if (old_max_frame == max_frame)
  1238. return 0;
  1239. if (netif_running(netdev))
  1240. ixgb_down(adapter, true);
  1241. adapter->rx_buffer_len = max_frame + 8; /* + 8 for errata */
  1242. netdev->mtu = new_mtu;
  1243. if (netif_running(netdev))
  1244. ixgb_up(adapter);
  1245. return 0;
  1246. }
  1247. /**
  1248. * ixgb_update_stats - Update the board statistics counters.
  1249. * @adapter: board private structure
  1250. **/
  1251. void
  1252. ixgb_update_stats(struct ixgb_adapter *adapter)
  1253. {
  1254. struct net_device *netdev = adapter->netdev;
  1255. struct pci_dev *pdev = adapter->pdev;
  1256. /* Prevent stats update while adapter is being reset */
  1257. if (pci_channel_offline(pdev))
  1258. return;
  1259. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1260. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1261. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1262. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1263. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1264. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1265. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1266. /* fix up multicast stats by removing broadcasts */
  1267. if(multi >= bcast)
  1268. multi -= bcast;
  1269. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1270. adapter->stats.mprch += (multi >> 32);
  1271. adapter->stats.bprcl += bcast_l;
  1272. adapter->stats.bprch += bcast_h;
  1273. } else {
  1274. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1275. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1276. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1277. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1278. }
  1279. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1280. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1281. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1282. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1283. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1284. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1285. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1286. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1287. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1288. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1289. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1290. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1291. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1292. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1293. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1294. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1295. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1296. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1297. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1298. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1299. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1300. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1301. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1302. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1303. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1304. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1305. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1306. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1307. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1308. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1309. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1310. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1311. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1312. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1313. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1314. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1315. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1316. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1317. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1318. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1319. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1320. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1321. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1322. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1323. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1324. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1325. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1326. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1327. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1328. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1329. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1330. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1331. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1332. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1333. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1334. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1335. /* Fill out the OS statistics structure */
  1336. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1337. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1338. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1339. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1340. adapter->net_stats.multicast = adapter->stats.mprcl;
  1341. adapter->net_stats.collisions = 0;
  1342. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1343. * with a length in the type/len field */
  1344. adapter->net_stats.rx_errors =
  1345. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1346. adapter->stats.ruc +
  1347. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1348. adapter->stats.icbc +
  1349. adapter->stats.ecbc + adapter->stats.mpc;
  1350. /* see above
  1351. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1352. */
  1353. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1354. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1355. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1356. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1357. adapter->net_stats.tx_errors = 0;
  1358. adapter->net_stats.rx_frame_errors = 0;
  1359. adapter->net_stats.tx_aborted_errors = 0;
  1360. adapter->net_stats.tx_carrier_errors = 0;
  1361. adapter->net_stats.tx_fifo_errors = 0;
  1362. adapter->net_stats.tx_heartbeat_errors = 0;
  1363. adapter->net_stats.tx_window_errors = 0;
  1364. }
  1365. #define IXGB_MAX_INTR 10
  1366. /**
  1367. * ixgb_intr - Interrupt Handler
  1368. * @irq: interrupt number
  1369. * @data: pointer to a network interface device structure
  1370. **/
  1371. static irqreturn_t
  1372. ixgb_intr(int irq, void *data)
  1373. {
  1374. struct net_device *netdev = data;
  1375. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1376. struct ixgb_hw *hw = &adapter->hw;
  1377. u32 icr = IXGB_READ_REG(hw, ICR);
  1378. #ifndef CONFIG_IXGB_NAPI
  1379. unsigned int i;
  1380. #endif
  1381. if(unlikely(!icr))
  1382. return IRQ_NONE; /* Not our interrupt */
  1383. if (unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC)))
  1384. if (!test_bit(__IXGB_DOWN, &adapter->flags))
  1385. mod_timer(&adapter->watchdog_timer, jiffies);
  1386. #ifdef CONFIG_IXGB_NAPI
  1387. if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
  1388. /* Disable interrupts and register for poll. The flush
  1389. of the posted write is intentionally left out.
  1390. */
  1391. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1392. __netif_rx_schedule(netdev, &adapter->napi);
  1393. }
  1394. #else
  1395. /* yes, that is actually a & and it is meant to make sure that
  1396. * every pass through this for loop checks both receive and
  1397. * transmit queues for completed descriptors, intended to
  1398. * avoid starvation issues and assist tx/rx fairness. */
  1399. for(i = 0; i < IXGB_MAX_INTR; i++)
  1400. if(!ixgb_clean_rx_irq(adapter) &
  1401. !ixgb_clean_tx_irq(adapter))
  1402. break;
  1403. #endif
  1404. return IRQ_HANDLED;
  1405. }
  1406. #ifdef CONFIG_IXGB_NAPI
  1407. /**
  1408. * ixgb_clean - NAPI Rx polling callback
  1409. * @adapter: board private structure
  1410. **/
  1411. static int
  1412. ixgb_clean(struct napi_struct *napi, int budget)
  1413. {
  1414. struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
  1415. struct net_device *netdev = adapter->netdev;
  1416. int work_done = 0;
  1417. ixgb_clean_tx_irq(adapter);
  1418. ixgb_clean_rx_irq(adapter, &work_done, budget);
  1419. /* If budget not fully consumed, exit the polling mode */
  1420. if (work_done < budget) {
  1421. netif_rx_complete(netdev, napi);
  1422. if (!test_bit(__IXGB_DOWN, &adapter->flags))
  1423. ixgb_irq_enable(adapter);
  1424. }
  1425. return work_done;
  1426. }
  1427. #endif
  1428. /**
  1429. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1430. * @adapter: board private structure
  1431. **/
  1432. static bool
  1433. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1434. {
  1435. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1436. struct net_device *netdev = adapter->netdev;
  1437. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1438. struct ixgb_buffer *buffer_info;
  1439. unsigned int i, eop;
  1440. bool cleaned = false;
  1441. i = tx_ring->next_to_clean;
  1442. eop = tx_ring->buffer_info[i].next_to_watch;
  1443. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1444. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1445. for (cleaned = false; !cleaned; ) {
  1446. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1447. buffer_info = &tx_ring->buffer_info[i];
  1448. if (tx_desc->popts
  1449. & (IXGB_TX_DESC_POPTS_TXSM |
  1450. IXGB_TX_DESC_POPTS_IXSM))
  1451. adapter->hw_csum_tx_good++;
  1452. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1453. *(u32 *)&(tx_desc->status) = 0;
  1454. cleaned = (i == eop);
  1455. if(++i == tx_ring->count) i = 0;
  1456. }
  1457. eop = tx_ring->buffer_info[i].next_to_watch;
  1458. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1459. }
  1460. tx_ring->next_to_clean = i;
  1461. if (unlikely(cleaned && netif_carrier_ok(netdev) &&
  1462. IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED)) {
  1463. /* Make sure that anybody stopping the queue after this
  1464. * sees the new next_to_clean. */
  1465. smp_mb();
  1466. if (netif_queue_stopped(netdev) &&
  1467. !(test_bit(__IXGB_DOWN, &adapter->flags))) {
  1468. netif_wake_queue(netdev);
  1469. ++adapter->restart_queue;
  1470. }
  1471. }
  1472. if(adapter->detect_tx_hung) {
  1473. /* detect a transmit hang in hardware, this serializes the
  1474. * check with the clearing of time_stamp and movement of i */
  1475. adapter->detect_tx_hung = false;
  1476. if (tx_ring->buffer_info[eop].dma &&
  1477. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
  1478. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1479. IXGB_STATUS_TXOFF)) {
  1480. /* detected Tx unit hang */
  1481. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  1482. " TDH <%x>\n"
  1483. " TDT <%x>\n"
  1484. " next_to_use <%x>\n"
  1485. " next_to_clean <%x>\n"
  1486. "buffer_info[next_to_clean]\n"
  1487. " time_stamp <%lx>\n"
  1488. " next_to_watch <%x>\n"
  1489. " jiffies <%lx>\n"
  1490. " next_to_watch.status <%x>\n",
  1491. IXGB_READ_REG(&adapter->hw, TDH),
  1492. IXGB_READ_REG(&adapter->hw, TDT),
  1493. tx_ring->next_to_use,
  1494. tx_ring->next_to_clean,
  1495. tx_ring->buffer_info[eop].time_stamp,
  1496. eop,
  1497. jiffies,
  1498. eop_desc->status);
  1499. netif_stop_queue(netdev);
  1500. }
  1501. }
  1502. return cleaned;
  1503. }
  1504. /**
  1505. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1506. * @adapter: board private structure
  1507. * @rx_desc: receive descriptor
  1508. * @sk_buff: socket buffer with received data
  1509. **/
  1510. static void
  1511. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1512. struct ixgb_rx_desc *rx_desc,
  1513. struct sk_buff *skb)
  1514. {
  1515. /* Ignore Checksum bit is set OR
  1516. * TCP Checksum has not been calculated
  1517. */
  1518. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1519. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1520. skb->ip_summed = CHECKSUM_NONE;
  1521. return;
  1522. }
  1523. /* At this point we know the hardware did the TCP checksum */
  1524. /* now look at the TCP checksum error bit */
  1525. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1526. /* let the stack verify checksum errors */
  1527. skb->ip_summed = CHECKSUM_NONE;
  1528. adapter->hw_csum_rx_error++;
  1529. } else {
  1530. /* TCP checksum is good */
  1531. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1532. adapter->hw_csum_rx_good++;
  1533. }
  1534. }
  1535. /**
  1536. * ixgb_clean_rx_irq - Send received data up the network stack,
  1537. * @adapter: board private structure
  1538. **/
  1539. static bool
  1540. #ifdef CONFIG_IXGB_NAPI
  1541. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1542. #else
  1543. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1544. #endif
  1545. {
  1546. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1547. struct net_device *netdev = adapter->netdev;
  1548. struct pci_dev *pdev = adapter->pdev;
  1549. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1550. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1551. u32 length;
  1552. unsigned int i, j;
  1553. bool cleaned = false;
  1554. i = rx_ring->next_to_clean;
  1555. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1556. buffer_info = &rx_ring->buffer_info[i];
  1557. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1558. struct sk_buff *skb, *next_skb;
  1559. u8 status;
  1560. #ifdef CONFIG_IXGB_NAPI
  1561. if(*work_done >= work_to_do)
  1562. break;
  1563. (*work_done)++;
  1564. #endif
  1565. status = rx_desc->status;
  1566. skb = buffer_info->skb;
  1567. buffer_info->skb = NULL;
  1568. prefetch(skb->data);
  1569. if(++i == rx_ring->count) i = 0;
  1570. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1571. prefetch(next_rxd);
  1572. if((j = i + 1) == rx_ring->count) j = 0;
  1573. next2_buffer = &rx_ring->buffer_info[j];
  1574. prefetch(next2_buffer);
  1575. next_buffer = &rx_ring->buffer_info[i];
  1576. next_skb = next_buffer->skb;
  1577. prefetch(next_skb);
  1578. cleaned = true;
  1579. pci_unmap_single(pdev,
  1580. buffer_info->dma,
  1581. buffer_info->length,
  1582. PCI_DMA_FROMDEVICE);
  1583. length = le16_to_cpu(rx_desc->length);
  1584. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1585. /* All receives must fit into a single buffer */
  1586. IXGB_DBG("Receive packet consumed multiple buffers "
  1587. "length<%x>\n", length);
  1588. dev_kfree_skb_irq(skb);
  1589. goto rxdesc_done;
  1590. }
  1591. if (unlikely(rx_desc->errors
  1592. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1593. | IXGB_RX_DESC_ERRORS_P |
  1594. IXGB_RX_DESC_ERRORS_RXE))) {
  1595. dev_kfree_skb_irq(skb);
  1596. goto rxdesc_done;
  1597. }
  1598. /* code added for copybreak, this should improve
  1599. * performance for small packets with large amounts
  1600. * of reassembly being done in the stack */
  1601. #define IXGB_CB_LENGTH 256
  1602. if (length < IXGB_CB_LENGTH) {
  1603. struct sk_buff *new_skb =
  1604. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  1605. if (new_skb) {
  1606. skb_reserve(new_skb, NET_IP_ALIGN);
  1607. skb_copy_to_linear_data_offset(new_skb,
  1608. -NET_IP_ALIGN,
  1609. (skb->data -
  1610. NET_IP_ALIGN),
  1611. (length +
  1612. NET_IP_ALIGN));
  1613. /* save the skb in buffer_info as good */
  1614. buffer_info->skb = skb;
  1615. skb = new_skb;
  1616. }
  1617. }
  1618. /* end copybreak code */
  1619. /* Good Receive */
  1620. skb_put(skb, length);
  1621. /* Receive Checksum Offload */
  1622. ixgb_rx_checksum(adapter, rx_desc, skb);
  1623. skb->protocol = eth_type_trans(skb, netdev);
  1624. #ifdef CONFIG_IXGB_NAPI
  1625. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1626. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1627. le16_to_cpu(rx_desc->special));
  1628. } else {
  1629. netif_receive_skb(skb);
  1630. }
  1631. #else /* CONFIG_IXGB_NAPI */
  1632. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1633. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1634. le16_to_cpu(rx_desc->special));
  1635. } else {
  1636. netif_rx(skb);
  1637. }
  1638. #endif /* CONFIG_IXGB_NAPI */
  1639. netdev->last_rx = jiffies;
  1640. rxdesc_done:
  1641. /* clean up descriptor, might be written over by hw */
  1642. rx_desc->status = 0;
  1643. /* use prefetched values */
  1644. rx_desc = next_rxd;
  1645. buffer_info = next_buffer;
  1646. }
  1647. rx_ring->next_to_clean = i;
  1648. ixgb_alloc_rx_buffers(adapter);
  1649. return cleaned;
  1650. }
  1651. /**
  1652. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1653. * @adapter: address of board private structure
  1654. **/
  1655. static void
  1656. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1657. {
  1658. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1659. struct net_device *netdev = adapter->netdev;
  1660. struct pci_dev *pdev = adapter->pdev;
  1661. struct ixgb_rx_desc *rx_desc;
  1662. struct ixgb_buffer *buffer_info;
  1663. struct sk_buff *skb;
  1664. unsigned int i;
  1665. long cleancount;
  1666. i = rx_ring->next_to_use;
  1667. buffer_info = &rx_ring->buffer_info[i];
  1668. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1669. /* leave three descriptors unused */
  1670. while(--cleancount > 2) {
  1671. /* recycle! its good for you */
  1672. skb = buffer_info->skb;
  1673. if (skb) {
  1674. skb_trim(skb, 0);
  1675. goto map_skb;
  1676. }
  1677. skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
  1678. + NET_IP_ALIGN);
  1679. if (unlikely(!skb)) {
  1680. /* Better luck next round */
  1681. adapter->alloc_rx_buff_failed++;
  1682. break;
  1683. }
  1684. /* Make buffer alignment 2 beyond a 16 byte boundary
  1685. * this will result in a 16 byte aligned IP header after
  1686. * the 14 byte MAC header is removed
  1687. */
  1688. skb_reserve(skb, NET_IP_ALIGN);
  1689. buffer_info->skb = skb;
  1690. buffer_info->length = adapter->rx_buffer_len;
  1691. map_skb:
  1692. buffer_info->dma = pci_map_single(pdev,
  1693. skb->data,
  1694. adapter->rx_buffer_len,
  1695. PCI_DMA_FROMDEVICE);
  1696. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1697. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1698. /* guarantee DD bit not set now before h/w gets descriptor
  1699. * this is the rest of the workaround for h/w double
  1700. * writeback. */
  1701. rx_desc->status = 0;
  1702. if(++i == rx_ring->count) i = 0;
  1703. buffer_info = &rx_ring->buffer_info[i];
  1704. }
  1705. if (likely(rx_ring->next_to_use != i)) {
  1706. rx_ring->next_to_use = i;
  1707. if (unlikely(i-- == 0))
  1708. i = (rx_ring->count - 1);
  1709. /* Force memory writes to complete before letting h/w
  1710. * know there are new descriptors to fetch. (Only
  1711. * applicable for weak-ordered memory model archs, such
  1712. * as IA-64). */
  1713. wmb();
  1714. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1715. }
  1716. }
  1717. /**
  1718. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1719. *
  1720. * @param netdev network interface device structure
  1721. * @param grp indicates to enable or disable tagging/stripping
  1722. **/
  1723. static void
  1724. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1725. {
  1726. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1727. u32 ctrl, rctl;
  1728. ixgb_irq_disable(adapter);
  1729. adapter->vlgrp = grp;
  1730. if(grp) {
  1731. /* enable VLAN tag insert/strip */
  1732. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1733. ctrl |= IXGB_CTRL0_VME;
  1734. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1735. /* enable VLAN receive filtering */
  1736. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1737. rctl |= IXGB_RCTL_VFE;
  1738. rctl &= ~IXGB_RCTL_CFIEN;
  1739. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1740. } else {
  1741. /* disable VLAN tag insert/strip */
  1742. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1743. ctrl &= ~IXGB_CTRL0_VME;
  1744. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1745. /* disable VLAN filtering */
  1746. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1747. rctl &= ~IXGB_RCTL_VFE;
  1748. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1749. }
  1750. /* don't enable interrupts unless we are UP */
  1751. if (adapter->netdev->flags & IFF_UP)
  1752. ixgb_irq_enable(adapter);
  1753. }
  1754. static void
  1755. ixgb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
  1756. {
  1757. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1758. u32 vfta, index;
  1759. /* add VID to filter table */
  1760. index = (vid >> 5) & 0x7F;
  1761. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1762. vfta |= (1 << (vid & 0x1F));
  1763. ixgb_write_vfta(&adapter->hw, index, vfta);
  1764. }
  1765. static void
  1766. ixgb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
  1767. {
  1768. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1769. u32 vfta, index;
  1770. ixgb_irq_disable(adapter);
  1771. vlan_group_set_device(adapter->vlgrp, vid, NULL);
  1772. /* don't enable interrupts unless we are UP */
  1773. if (adapter->netdev->flags & IFF_UP)
  1774. ixgb_irq_enable(adapter);
  1775. /* remove VID from filter table */
  1776. index = (vid >> 5) & 0x7F;
  1777. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1778. vfta &= ~(1 << (vid & 0x1F));
  1779. ixgb_write_vfta(&adapter->hw, index, vfta);
  1780. }
  1781. static void
  1782. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1783. {
  1784. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1785. if(adapter->vlgrp) {
  1786. u16 vid;
  1787. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1788. if(!vlan_group_get_device(adapter->vlgrp, vid))
  1789. continue;
  1790. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1791. }
  1792. }
  1793. }
  1794. #ifdef CONFIG_NET_POLL_CONTROLLER
  1795. /*
  1796. * Polling 'interrupt' - used by things like netconsole to send skbs
  1797. * without having to re-enable interrupts. It's not called while
  1798. * the interrupt routine is executing.
  1799. */
  1800. static void ixgb_netpoll(struct net_device *dev)
  1801. {
  1802. struct ixgb_adapter *adapter = netdev_priv(dev);
  1803. disable_irq(adapter->pdev->irq);
  1804. ixgb_intr(adapter->pdev->irq, dev);
  1805. enable_irq(adapter->pdev->irq);
  1806. }
  1807. #endif
  1808. /**
  1809. * ixgb_io_error_detected() - called when PCI error is detected
  1810. * @pdev pointer to pci device with error
  1811. * @state pci channel state after error
  1812. *
  1813. * This callback is called by the PCI subsystem whenever
  1814. * a PCI bus error is detected.
  1815. */
  1816. static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
  1817. enum pci_channel_state state)
  1818. {
  1819. struct net_device *netdev = pci_get_drvdata(pdev);
  1820. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1821. if(netif_running(netdev))
  1822. ixgb_down(adapter, true);
  1823. pci_disable_device(pdev);
  1824. /* Request a slot reset. */
  1825. return PCI_ERS_RESULT_NEED_RESET;
  1826. }
  1827. /**
  1828. * ixgb_io_slot_reset - called after the pci bus has been reset.
  1829. * @pdev pointer to pci device with error
  1830. *
  1831. * This callback is called after the PCI buss has been reset.
  1832. * Basically, this tries to restart the card from scratch.
  1833. * This is a shortened version of the device probe/discovery code,
  1834. * it resembles the first-half of the ixgb_probe() routine.
  1835. */
  1836. static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
  1837. {
  1838. struct net_device *netdev = pci_get_drvdata(pdev);
  1839. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1840. if(pci_enable_device(pdev)) {
  1841. DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
  1842. return PCI_ERS_RESULT_DISCONNECT;
  1843. }
  1844. /* Perform card reset only on one instance of the card */
  1845. if (0 != PCI_FUNC (pdev->devfn))
  1846. return PCI_ERS_RESULT_RECOVERED;
  1847. pci_set_master(pdev);
  1848. netif_carrier_off(netdev);
  1849. netif_stop_queue(netdev);
  1850. ixgb_reset(adapter);
  1851. /* Make sure the EEPROM is good */
  1852. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  1853. DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
  1854. return PCI_ERS_RESULT_DISCONNECT;
  1855. }
  1856. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  1857. memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
  1858. if(!is_valid_ether_addr(netdev->perm_addr)) {
  1859. DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
  1860. return PCI_ERS_RESULT_DISCONNECT;
  1861. }
  1862. return PCI_ERS_RESULT_RECOVERED;
  1863. }
  1864. /**
  1865. * ixgb_io_resume - called when its OK to resume normal operations
  1866. * @pdev pointer to pci device with error
  1867. *
  1868. * The error recovery driver tells us that its OK to resume
  1869. * normal operation. Implementation resembles the second-half
  1870. * of the ixgb_probe() routine.
  1871. */
  1872. static void ixgb_io_resume (struct pci_dev *pdev)
  1873. {
  1874. struct net_device *netdev = pci_get_drvdata(pdev);
  1875. struct ixgb_adapter *adapter = netdev_priv(netdev);
  1876. pci_set_master(pdev);
  1877. if(netif_running(netdev)) {
  1878. if(ixgb_up(adapter)) {
  1879. printk ("ixgb: can't bring device back up after reset\n");
  1880. return;
  1881. }
  1882. }
  1883. netif_device_attach(netdev);
  1884. mod_timer(&adapter->watchdog_timer, jiffies);
  1885. }
  1886. /* ixgb_main.c */