ks8842.c 22 KB

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  1. /*
  2. * ks8842.c timberdale KS8842 ethernet driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * The Micrel KS8842 behind the timberdale FPGA
  20. * The genuine Micrel KS8841/42 device with ISA 16/32bit bus interface
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/ethtool.h>
  29. #include <linux/ks8842.h>
  30. #define DRV_NAME "ks8842"
  31. /* Timberdale specific Registers */
  32. #define REG_TIMB_RST 0x1c
  33. #define REG_TIMB_FIFO 0x20
  34. #define REG_TIMB_ISR 0x24
  35. #define REG_TIMB_IER 0x28
  36. #define REG_TIMB_IAR 0x2C
  37. #define REQ_TIMB_DMA_RESUME 0x30
  38. /* KS8842 registers */
  39. #define REG_SELECT_BANK 0x0e
  40. /* bank 0 registers */
  41. #define REG_QRFCR 0x04
  42. /* bank 2 registers */
  43. #define REG_MARL 0x00
  44. #define REG_MARM 0x02
  45. #define REG_MARH 0x04
  46. /* bank 3 registers */
  47. #define REG_GRR 0x06
  48. /* bank 16 registers */
  49. #define REG_TXCR 0x00
  50. #define REG_TXSR 0x02
  51. #define REG_RXCR 0x04
  52. #define REG_TXMIR 0x08
  53. #define REG_RXMIR 0x0A
  54. /* bank 17 registers */
  55. #define REG_TXQCR 0x00
  56. #define REG_RXQCR 0x02
  57. #define REG_TXFDPR 0x04
  58. #define REG_RXFDPR 0x06
  59. #define REG_QMU_DATA_LO 0x08
  60. #define REG_QMU_DATA_HI 0x0A
  61. /* bank 18 registers */
  62. #define REG_IER 0x00
  63. #define IRQ_LINK_CHANGE 0x8000
  64. #define IRQ_TX 0x4000
  65. #define IRQ_RX 0x2000
  66. #define IRQ_RX_OVERRUN 0x0800
  67. #define IRQ_TX_STOPPED 0x0200
  68. #define IRQ_RX_STOPPED 0x0100
  69. #define IRQ_RX_ERROR 0x0080
  70. #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \
  71. IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR)
  72. #define REG_ISR 0x02
  73. #define REG_RXSR 0x04
  74. #define RXSR_VALID 0x8000
  75. #define RXSR_BROADCAST 0x80
  76. #define RXSR_MULTICAST 0x40
  77. #define RXSR_UNICAST 0x20
  78. #define RXSR_FRAMETYPE 0x08
  79. #define RXSR_TOO_LONG 0x04
  80. #define RXSR_RUNT 0x02
  81. #define RXSR_CRC_ERROR 0x01
  82. #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR)
  83. /* bank 32 registers */
  84. #define REG_SW_ID_AND_ENABLE 0x00
  85. #define REG_SGCR1 0x02
  86. #define REG_SGCR2 0x04
  87. #define REG_SGCR3 0x06
  88. /* bank 39 registers */
  89. #define REG_MACAR1 0x00
  90. #define REG_MACAR2 0x02
  91. #define REG_MACAR3 0x04
  92. /* bank 45 registers */
  93. #define REG_P1MBCR 0x00
  94. #define REG_P1MBSR 0x02
  95. /* bank 46 registers */
  96. #define REG_P2MBCR 0x00
  97. #define REG_P2MBSR 0x02
  98. /* bank 48 registers */
  99. #define REG_P1CR2 0x02
  100. /* bank 49 registers */
  101. #define REG_P1CR4 0x02
  102. #define REG_P1SR 0x04
  103. /* flags passed by platform_device for configuration */
  104. #define MICREL_KS884X 0x01 /* 0=Timeberdale(FPGA), 1=Micrel */
  105. #define KS884X_16BIT 0x02 /* 1=16bit, 0=32bit */
  106. struct ks8842_adapter {
  107. void __iomem *hw_addr;
  108. int irq;
  109. unsigned long conf_flags; /* copy of platform_device config */
  110. struct tasklet_struct tasklet;
  111. spinlock_t lock; /* spinlock to be interrupt safe */
  112. struct work_struct timeout_work;
  113. struct net_device *netdev;
  114. };
  115. static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank)
  116. {
  117. iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK);
  118. }
  119. static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank,
  120. u8 value, int offset)
  121. {
  122. ks8842_select_bank(adapter, bank);
  123. iowrite8(value, adapter->hw_addr + offset);
  124. }
  125. static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank,
  126. u16 value, int offset)
  127. {
  128. ks8842_select_bank(adapter, bank);
  129. iowrite16(value, adapter->hw_addr + offset);
  130. }
  131. static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank,
  132. u16 bits, int offset)
  133. {
  134. u16 reg;
  135. ks8842_select_bank(adapter, bank);
  136. reg = ioread16(adapter->hw_addr + offset);
  137. reg |= bits;
  138. iowrite16(reg, adapter->hw_addr + offset);
  139. }
  140. static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank,
  141. u16 bits, int offset)
  142. {
  143. u16 reg;
  144. ks8842_select_bank(adapter, bank);
  145. reg = ioread16(adapter->hw_addr + offset);
  146. reg &= ~bits;
  147. iowrite16(reg, adapter->hw_addr + offset);
  148. }
  149. static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank,
  150. u32 value, int offset)
  151. {
  152. ks8842_select_bank(adapter, bank);
  153. iowrite32(value, adapter->hw_addr + offset);
  154. }
  155. static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank,
  156. int offset)
  157. {
  158. ks8842_select_bank(adapter, bank);
  159. return ioread8(adapter->hw_addr + offset);
  160. }
  161. static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank,
  162. int offset)
  163. {
  164. ks8842_select_bank(adapter, bank);
  165. return ioread16(adapter->hw_addr + offset);
  166. }
  167. static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank,
  168. int offset)
  169. {
  170. ks8842_select_bank(adapter, bank);
  171. return ioread32(adapter->hw_addr + offset);
  172. }
  173. static void ks8842_reset(struct ks8842_adapter *adapter)
  174. {
  175. if (adapter->conf_flags & MICREL_KS884X) {
  176. ks8842_write16(adapter, 3, 1, REG_GRR);
  177. msleep(10);
  178. iowrite16(0, adapter->hw_addr + REG_GRR);
  179. } else {
  180. /* The KS8842 goes haywire when doing softare reset
  181. * a work around in the timberdale IP is implemented to
  182. * do a hardware reset instead
  183. ks8842_write16(adapter, 3, 1, REG_GRR);
  184. msleep(10);
  185. iowrite16(0, adapter->hw_addr + REG_GRR);
  186. */
  187. iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
  188. msleep(20);
  189. }
  190. }
  191. static void ks8842_update_link_status(struct net_device *netdev,
  192. struct ks8842_adapter *adapter)
  193. {
  194. /* check the status of the link */
  195. if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) {
  196. netif_carrier_on(netdev);
  197. netif_wake_queue(netdev);
  198. } else {
  199. netif_stop_queue(netdev);
  200. netif_carrier_off(netdev);
  201. }
  202. }
  203. static void ks8842_enable_tx(struct ks8842_adapter *adapter)
  204. {
  205. ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR);
  206. }
  207. static void ks8842_disable_tx(struct ks8842_adapter *adapter)
  208. {
  209. ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR);
  210. }
  211. static void ks8842_enable_rx(struct ks8842_adapter *adapter)
  212. {
  213. ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR);
  214. }
  215. static void ks8842_disable_rx(struct ks8842_adapter *adapter)
  216. {
  217. ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR);
  218. }
  219. static void ks8842_reset_hw(struct ks8842_adapter *adapter)
  220. {
  221. /* reset the HW */
  222. ks8842_reset(adapter);
  223. /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */
  224. ks8842_write16(adapter, 16, 0x000E, REG_TXCR);
  225. /* enable the receiver, uni + multi + broadcast + flow ctrl
  226. + crc strip */
  227. ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400,
  228. REG_RXCR);
  229. /* TX frame pointer autoincrement */
  230. ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR);
  231. /* RX frame pointer autoincrement */
  232. ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR);
  233. /* RX 2 kb high watermark */
  234. ks8842_write16(adapter, 0, 0x1000, REG_QRFCR);
  235. /* aggresive back off in half duplex */
  236. ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1);
  237. /* enable no excessive collison drop */
  238. ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2);
  239. /* Enable port 1 force flow control / back pressure / transmit / recv */
  240. ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2);
  241. /* restart port auto-negotiation */
  242. ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4);
  243. /* Enable the transmitter */
  244. ks8842_enable_tx(adapter);
  245. /* Enable the receiver */
  246. ks8842_enable_rx(adapter);
  247. /* clear all interrupts */
  248. ks8842_write16(adapter, 18, 0xffff, REG_ISR);
  249. /* enable interrupts */
  250. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  251. /* enable the switch */
  252. ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE);
  253. }
  254. static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest)
  255. {
  256. int i;
  257. u16 mac;
  258. for (i = 0; i < ETH_ALEN; i++)
  259. dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i);
  260. if (adapter->conf_flags & MICREL_KS884X) {
  261. /*
  262. the sequence of saving mac addr between MAC and Switch is
  263. different.
  264. */
  265. mac = ks8842_read16(adapter, 2, REG_MARL);
  266. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  267. mac = ks8842_read16(adapter, 2, REG_MARM);
  268. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  269. mac = ks8842_read16(adapter, 2, REG_MARH);
  270. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  271. } else {
  272. /* make sure the switch port uses the same MAC as the QMU */
  273. mac = ks8842_read16(adapter, 2, REG_MARL);
  274. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  275. mac = ks8842_read16(adapter, 2, REG_MARM);
  276. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  277. mac = ks8842_read16(adapter, 2, REG_MARH);
  278. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  279. }
  280. }
  281. static void ks8842_write_mac_addr(struct ks8842_adapter *adapter, u8 *mac)
  282. {
  283. unsigned long flags;
  284. unsigned i;
  285. spin_lock_irqsave(&adapter->lock, flags);
  286. for (i = 0; i < ETH_ALEN; i++) {
  287. ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i);
  288. if (!(adapter->conf_flags & MICREL_KS884X))
  289. ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1],
  290. REG_MACAR1 + i);
  291. }
  292. if (adapter->conf_flags & MICREL_KS884X) {
  293. /*
  294. the sequence of saving mac addr between MAC and Switch is
  295. different.
  296. */
  297. u16 mac;
  298. mac = ks8842_read16(adapter, 2, REG_MARL);
  299. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  300. mac = ks8842_read16(adapter, 2, REG_MARM);
  301. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  302. mac = ks8842_read16(adapter, 2, REG_MARH);
  303. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  304. }
  305. spin_unlock_irqrestore(&adapter->lock, flags);
  306. }
  307. static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter)
  308. {
  309. return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff;
  310. }
  311. static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev)
  312. {
  313. struct ks8842_adapter *adapter = netdev_priv(netdev);
  314. int len = skb->len;
  315. netdev_dbg(netdev, "%s: len %u head %p data %p tail %p end %p\n",
  316. __func__, skb->len, skb->head, skb->data,
  317. skb_tail_pointer(skb), skb_end_pointer(skb));
  318. /* check FIFO buffer space, we need space for CRC and command bits */
  319. if (ks8842_tx_fifo_space(adapter) < len + 8)
  320. return NETDEV_TX_BUSY;
  321. if (adapter->conf_flags & KS884X_16BIT) {
  322. u16 *ptr16 = (u16 *)skb->data;
  323. ks8842_write16(adapter, 17, 0x8000 | 0x100, REG_QMU_DATA_LO);
  324. ks8842_write16(adapter, 17, (u16)len, REG_QMU_DATA_HI);
  325. netdev->stats.tx_bytes += len;
  326. /* copy buffer */
  327. while (len > 0) {
  328. iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_LO);
  329. iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_HI);
  330. len -= sizeof(u32);
  331. }
  332. } else {
  333. u32 *ptr = (u32 *)skb->data;
  334. u32 ctrl;
  335. /* the control word, enable IRQ, port 1 and the length */
  336. ctrl = 0x8000 | 0x100 | (len << 16);
  337. ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO);
  338. netdev->stats.tx_bytes += len;
  339. /* copy buffer */
  340. while (len > 0) {
  341. iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
  342. len -= sizeof(u32);
  343. ptr++;
  344. }
  345. }
  346. /* enqueue packet */
  347. ks8842_write16(adapter, 17, 1, REG_TXQCR);
  348. dev_kfree_skb(skb);
  349. return NETDEV_TX_OK;
  350. }
  351. static void ks8842_rx_frame(struct net_device *netdev,
  352. struct ks8842_adapter *adapter)
  353. {
  354. u32 status;
  355. int len;
  356. if (adapter->conf_flags & KS884X_16BIT) {
  357. status = ks8842_read16(adapter, 17, REG_QMU_DATA_LO);
  358. len = ks8842_read16(adapter, 17, REG_QMU_DATA_HI);
  359. netdev_dbg(netdev, "%s - rx_data: status: %x\n",
  360. __func__, status);
  361. } else {
  362. status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO);
  363. len = (status >> 16) & 0x7ff;
  364. status &= 0xffff;
  365. netdev_dbg(netdev, "%s - rx_data: status: %x\n",
  366. __func__, status);
  367. }
  368. /* check the status */
  369. if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) {
  370. struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len);
  371. netdev_dbg(netdev, "%s, got package, len: %d\n", __func__, len);
  372. if (skb) {
  373. netdev->stats.rx_packets++;
  374. netdev->stats.rx_bytes += len;
  375. if (status & RXSR_MULTICAST)
  376. netdev->stats.multicast++;
  377. if (adapter->conf_flags & KS884X_16BIT) {
  378. u16 *data16 = (u16 *)skb_put(skb, len);
  379. ks8842_select_bank(adapter, 17);
  380. while (len > 0) {
  381. *data16++ = ioread16(adapter->hw_addr +
  382. REG_QMU_DATA_LO);
  383. *data16++ = ioread16(adapter->hw_addr +
  384. REG_QMU_DATA_HI);
  385. len -= sizeof(u32);
  386. }
  387. } else {
  388. u32 *data = (u32 *)skb_put(skb, len);
  389. ks8842_select_bank(adapter, 17);
  390. while (len > 0) {
  391. *data++ = ioread32(adapter->hw_addr +
  392. REG_QMU_DATA_LO);
  393. len -= sizeof(u32);
  394. }
  395. }
  396. skb->protocol = eth_type_trans(skb, netdev);
  397. netif_rx(skb);
  398. } else
  399. netdev->stats.rx_dropped++;
  400. } else {
  401. netdev_dbg(netdev, "RX error, status: %x\n", status);
  402. netdev->stats.rx_errors++;
  403. if (status & RXSR_TOO_LONG)
  404. netdev->stats.rx_length_errors++;
  405. if (status & RXSR_CRC_ERROR)
  406. netdev->stats.rx_crc_errors++;
  407. if (status & RXSR_RUNT)
  408. netdev->stats.rx_frame_errors++;
  409. }
  410. /* set high watermark to 3K */
  411. ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR);
  412. /* release the frame */
  413. ks8842_write16(adapter, 17, 0x01, REG_RXQCR);
  414. /* set high watermark to 2K */
  415. ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR);
  416. }
  417. void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter)
  418. {
  419. u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  420. netdev_dbg(netdev, "%s Entry - rx_data: %d\n", __func__, rx_data);
  421. while (rx_data) {
  422. ks8842_rx_frame(netdev, adapter);
  423. rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  424. }
  425. }
  426. void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter)
  427. {
  428. u16 sr = ks8842_read16(adapter, 16, REG_TXSR);
  429. netdev_dbg(netdev, "%s - entry, sr: %x\n", __func__, sr);
  430. netdev->stats.tx_packets++;
  431. if (netif_queue_stopped(netdev))
  432. netif_wake_queue(netdev);
  433. }
  434. void ks8842_handle_rx_overrun(struct net_device *netdev,
  435. struct ks8842_adapter *adapter)
  436. {
  437. netdev_dbg(netdev, "%s: entry\n", __func__);
  438. netdev->stats.rx_errors++;
  439. netdev->stats.rx_fifo_errors++;
  440. }
  441. void ks8842_tasklet(unsigned long arg)
  442. {
  443. struct net_device *netdev = (struct net_device *)arg;
  444. struct ks8842_adapter *adapter = netdev_priv(netdev);
  445. u16 isr;
  446. unsigned long flags;
  447. u16 entry_bank;
  448. /* read current bank to be able to set it back */
  449. spin_lock_irqsave(&adapter->lock, flags);
  450. entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  451. spin_unlock_irqrestore(&adapter->lock, flags);
  452. isr = ks8842_read16(adapter, 18, REG_ISR);
  453. netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr);
  454. /* Ack */
  455. ks8842_write16(adapter, 18, isr, REG_ISR);
  456. if (!(adapter->conf_flags & MICREL_KS884X))
  457. /* Ack in the timberdale IP as well */
  458. iowrite32(0x1, adapter->hw_addr + REG_TIMB_IAR);
  459. if (!netif_running(netdev))
  460. return;
  461. if (isr & IRQ_LINK_CHANGE)
  462. ks8842_update_link_status(netdev, adapter);
  463. if (isr & (IRQ_RX | IRQ_RX_ERROR))
  464. ks8842_handle_rx(netdev, adapter);
  465. if (isr & IRQ_TX)
  466. ks8842_handle_tx(netdev, adapter);
  467. if (isr & IRQ_RX_OVERRUN)
  468. ks8842_handle_rx_overrun(netdev, adapter);
  469. if (isr & IRQ_TX_STOPPED) {
  470. ks8842_disable_tx(adapter);
  471. ks8842_enable_tx(adapter);
  472. }
  473. if (isr & IRQ_RX_STOPPED) {
  474. ks8842_disable_rx(adapter);
  475. ks8842_enable_rx(adapter);
  476. }
  477. /* re-enable interrupts, put back the bank selection register */
  478. spin_lock_irqsave(&adapter->lock, flags);
  479. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  480. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  481. spin_unlock_irqrestore(&adapter->lock, flags);
  482. }
  483. static irqreturn_t ks8842_irq(int irq, void *devid)
  484. {
  485. struct net_device *netdev = devid;
  486. struct ks8842_adapter *adapter = netdev_priv(netdev);
  487. u16 isr;
  488. u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  489. irqreturn_t ret = IRQ_NONE;
  490. isr = ks8842_read16(adapter, 18, REG_ISR);
  491. netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr);
  492. if (isr) {
  493. /* disable IRQ */
  494. ks8842_write16(adapter, 18, 0x00, REG_IER);
  495. /* schedule tasklet */
  496. tasklet_schedule(&adapter->tasklet);
  497. ret = IRQ_HANDLED;
  498. }
  499. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  500. return ret;
  501. }
  502. /* Netdevice operations */
  503. static int ks8842_open(struct net_device *netdev)
  504. {
  505. struct ks8842_adapter *adapter = netdev_priv(netdev);
  506. int err;
  507. netdev_dbg(netdev, "%s - entry\n", __func__);
  508. /* reset the HW */
  509. ks8842_reset_hw(adapter);
  510. ks8842_write_mac_addr(adapter, netdev->dev_addr);
  511. ks8842_update_link_status(netdev, adapter);
  512. err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME,
  513. netdev);
  514. if (err) {
  515. pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err);
  516. return err;
  517. }
  518. return 0;
  519. }
  520. static int ks8842_close(struct net_device *netdev)
  521. {
  522. struct ks8842_adapter *adapter = netdev_priv(netdev);
  523. netdev_dbg(netdev, "%s - entry\n", __func__);
  524. cancel_work_sync(&adapter->timeout_work);
  525. /* free the irq */
  526. free_irq(adapter->irq, netdev);
  527. /* disable the switch */
  528. ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE);
  529. return 0;
  530. }
  531. static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb,
  532. struct net_device *netdev)
  533. {
  534. int ret;
  535. struct ks8842_adapter *adapter = netdev_priv(netdev);
  536. netdev_dbg(netdev, "%s: entry\n", __func__);
  537. ret = ks8842_tx_frame(skb, netdev);
  538. if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8)
  539. netif_stop_queue(netdev);
  540. return ret;
  541. }
  542. static int ks8842_set_mac(struct net_device *netdev, void *p)
  543. {
  544. struct ks8842_adapter *adapter = netdev_priv(netdev);
  545. struct sockaddr *addr = p;
  546. char *mac = (u8 *)addr->sa_data;
  547. netdev_dbg(netdev, "%s: entry\n", __func__);
  548. if (!is_valid_ether_addr(addr->sa_data))
  549. return -EADDRNOTAVAIL;
  550. memcpy(netdev->dev_addr, mac, netdev->addr_len);
  551. ks8842_write_mac_addr(adapter, mac);
  552. return 0;
  553. }
  554. static void ks8842_tx_timeout_work(struct work_struct *work)
  555. {
  556. struct ks8842_adapter *adapter =
  557. container_of(work, struct ks8842_adapter, timeout_work);
  558. struct net_device *netdev = adapter->netdev;
  559. unsigned long flags;
  560. netdev_dbg(netdev, "%s: entry\n", __func__);
  561. spin_lock_irqsave(&adapter->lock, flags);
  562. /* disable interrupts */
  563. ks8842_write16(adapter, 18, 0, REG_IER);
  564. ks8842_write16(adapter, 18, 0xFFFF, REG_ISR);
  565. netif_stop_queue(netdev);
  566. spin_unlock_irqrestore(&adapter->lock, flags);
  567. ks8842_reset_hw(adapter);
  568. ks8842_write_mac_addr(adapter, netdev->dev_addr);
  569. ks8842_update_link_status(netdev, adapter);
  570. }
  571. static void ks8842_tx_timeout(struct net_device *netdev)
  572. {
  573. struct ks8842_adapter *adapter = netdev_priv(netdev);
  574. netdev_dbg(netdev, "%s: entry\n", __func__);
  575. schedule_work(&adapter->timeout_work);
  576. }
  577. static const struct net_device_ops ks8842_netdev_ops = {
  578. .ndo_open = ks8842_open,
  579. .ndo_stop = ks8842_close,
  580. .ndo_start_xmit = ks8842_xmit_frame,
  581. .ndo_set_mac_address = ks8842_set_mac,
  582. .ndo_tx_timeout = ks8842_tx_timeout,
  583. .ndo_validate_addr = eth_validate_addr
  584. };
  585. static const struct ethtool_ops ks8842_ethtool_ops = {
  586. .get_link = ethtool_op_get_link,
  587. };
  588. static int __devinit ks8842_probe(struct platform_device *pdev)
  589. {
  590. int err = -ENOMEM;
  591. struct resource *iomem;
  592. struct net_device *netdev;
  593. struct ks8842_adapter *adapter;
  594. struct ks8842_platform_data *pdata = pdev->dev.platform_data;
  595. u16 id;
  596. unsigned i;
  597. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  598. if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME))
  599. goto err_mem_region;
  600. netdev = alloc_etherdev(sizeof(struct ks8842_adapter));
  601. if (!netdev)
  602. goto err_alloc_etherdev;
  603. SET_NETDEV_DEV(netdev, &pdev->dev);
  604. adapter = netdev_priv(netdev);
  605. adapter->netdev = netdev;
  606. INIT_WORK(&adapter->timeout_work, ks8842_tx_timeout_work);
  607. adapter->hw_addr = ioremap(iomem->start, resource_size(iomem));
  608. adapter->conf_flags = iomem->flags;
  609. if (!adapter->hw_addr)
  610. goto err_ioremap;
  611. adapter->irq = platform_get_irq(pdev, 0);
  612. if (adapter->irq < 0) {
  613. err = adapter->irq;
  614. goto err_get_irq;
  615. }
  616. tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev);
  617. spin_lock_init(&adapter->lock);
  618. netdev->netdev_ops = &ks8842_netdev_ops;
  619. netdev->ethtool_ops = &ks8842_ethtool_ops;
  620. /* Check if a mac address was given */
  621. i = netdev->addr_len;
  622. if (pdata) {
  623. for (i = 0; i < netdev->addr_len; i++)
  624. if (pdata->macaddr[i] != 0)
  625. break;
  626. if (i < netdev->addr_len)
  627. /* an address was passed, use it */
  628. memcpy(netdev->dev_addr, pdata->macaddr,
  629. netdev->addr_len);
  630. }
  631. if (i == netdev->addr_len) {
  632. ks8842_read_mac_addr(adapter, netdev->dev_addr);
  633. if (!is_valid_ether_addr(netdev->dev_addr))
  634. random_ether_addr(netdev->dev_addr);
  635. }
  636. id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE);
  637. strcpy(netdev->name, "eth%d");
  638. err = register_netdev(netdev);
  639. if (err)
  640. goto err_register;
  641. platform_set_drvdata(pdev, netdev);
  642. pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
  643. (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
  644. return 0;
  645. err_register:
  646. err_get_irq:
  647. iounmap(adapter->hw_addr);
  648. err_ioremap:
  649. free_netdev(netdev);
  650. err_alloc_etherdev:
  651. release_mem_region(iomem->start, resource_size(iomem));
  652. err_mem_region:
  653. return err;
  654. }
  655. static int __devexit ks8842_remove(struct platform_device *pdev)
  656. {
  657. struct net_device *netdev = platform_get_drvdata(pdev);
  658. struct ks8842_adapter *adapter = netdev_priv(netdev);
  659. struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  660. unregister_netdev(netdev);
  661. tasklet_kill(&adapter->tasklet);
  662. iounmap(adapter->hw_addr);
  663. free_netdev(netdev);
  664. release_mem_region(iomem->start, resource_size(iomem));
  665. platform_set_drvdata(pdev, NULL);
  666. return 0;
  667. }
  668. static struct platform_driver ks8842_platform_driver = {
  669. .driver = {
  670. .name = DRV_NAME,
  671. .owner = THIS_MODULE,
  672. },
  673. .probe = ks8842_probe,
  674. .remove = ks8842_remove,
  675. };
  676. static int __init ks8842_init(void)
  677. {
  678. return platform_driver_register(&ks8842_platform_driver);
  679. }
  680. static void __exit ks8842_exit(void)
  681. {
  682. platform_driver_unregister(&ks8842_platform_driver);
  683. }
  684. module_init(ks8842_init);
  685. module_exit(ks8842_exit);
  686. MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver");
  687. MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
  688. MODULE_LICENSE("GPL v2");
  689. MODULE_ALIAS("platform:ks8842");