Kconfig 7.9 KB

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  1. # arch/arm/plat-samsung/Kconfig
  2. #
  3. # Copyright 2009 Simtec Electronics
  4. #
  5. # Licensed under GPLv2
  6. config PLAT_SAMSUNG
  7. bool
  8. depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
  9. select NO_IOPORT
  10. select GENERIC_IRQ_CHIP
  11. default y
  12. help
  13. Base platform code for all Samsung SoC based systems
  14. if PLAT_SAMSUNG
  15. # boot configurations
  16. comment "Boot options"
  17. config S3C_BOOT_WATCHDOG
  18. bool "S3C Initialisation watchdog"
  19. depends on S3C2410_WATCHDOG
  20. help
  21. Say y to enable the watchdog during the kernel decompression
  22. stage. If the kernel fails to uncompress, then the watchdog
  23. will trigger a reset and the system should restart.
  24. config S3C_BOOT_ERROR_RESET
  25. bool "S3C Reboot on decompression error"
  26. help
  27. Say y here to use the watchdog to reset the system if the
  28. kernel decompressor detects an error during decompression.
  29. config S3C_BOOT_UART_FORCE_FIFO
  30. bool "Force UART FIFO on during boot process"
  31. default y
  32. help
  33. Say Y here to force the UART FIFOs on during the kernel
  34. uncompressor
  35. config S3C_LOWLEVEL_UART_PORT
  36. int "S3C UART to use for low-level messages"
  37. default 0
  38. help
  39. Choice of which UART port to use for the low-level messages,
  40. such as the `Uncompressing...` at start time. The value of
  41. this configuration should be between zero and two. The port
  42. must have been initialised by the boot-loader before use.
  43. # clock options
  44. config SAMSUNG_CLKSRC
  45. bool
  46. help
  47. Select the clock code for the clksrc implementation
  48. used by newer systems such as the S3C64XX.
  49. # options for IRQ support
  50. config SAMSUNG_IRQ_VIC_TIMER
  51. bool
  52. help
  53. Internal configuration to build the VIC timer interrupt code.
  54. config SAMSUNG_IRQ_UART
  55. bool
  56. help
  57. Internal configuration to build the IRQ UART demux code.
  58. # options for gpio configuration support
  59. config SAMSUNG_GPIOLIB_4BIT
  60. bool
  61. help
  62. GPIOlib file contains the 4 bit modification functions for gpio
  63. configuration. GPIOlib shall be compiled only for S3C64XX and S5P
  64. series of processors.
  65. config S3C_GPIO_CFG_S3C64XX
  66. bool
  67. help
  68. Internal configuration to enable S3C64XX style GPIO configuration
  69. functions.
  70. config S5P_GPIO_DRVSTR
  71. bool
  72. help
  73. Internal configuration to get and set correct GPIO driver strength
  74. helper
  75. config SAMSUNG_GPIO_EXTRA
  76. int "Number of additional GPIO pins"
  77. default 0
  78. help
  79. Use additional GPIO space in addition to the GPIO's the SOC
  80. provides. This allows expanding the GPIO space for use with
  81. GPIO expanders.
  82. config S3C_GPIO_SPACE
  83. int "Space between gpio banks"
  84. default 0
  85. help
  86. Add a number of spare GPIO entries between each bank for debugging
  87. purposes. This allows any problems where an counter overflows from
  88. one bank to another to be caught, at the expense of using a little
  89. more memory.
  90. config S3C_GPIO_TRACK
  91. bool
  92. help
  93. Internal configuration option to enable the s3c specific gpio
  94. chip tracking if the platform requires it.
  95. # ADC driver
  96. config S3C_ADC
  97. bool "ADC common driver support"
  98. help
  99. Core support for the ADC block found in the Samsung SoC systems
  100. for drivers such as the touchscreen and hwmon to use to share
  101. this resource.
  102. # device definitions to compile in
  103. config S3C_DEV_HSMMC
  104. bool
  105. help
  106. Compile in platform device definitions for HSMMC code
  107. config S3C_DEV_HSMMC1
  108. bool
  109. help
  110. Compile in platform device definitions for HSMMC channel 1
  111. config S3C_DEV_HSMMC2
  112. bool
  113. help
  114. Compile in platform device definitions for HSMMC channel 2
  115. config S3C_DEV_HSMMC3
  116. bool
  117. help
  118. Compile in platform device definitions for HSMMC channel 3
  119. config S3C_DEV_HWMON
  120. bool
  121. help
  122. Compile in platform device definitions for HWMON
  123. config S3C_DEV_I2C1
  124. bool
  125. help
  126. Compile in platform device definitions for I2C channel 1
  127. config S3C_DEV_I2C2
  128. bool
  129. help
  130. Compile in platform device definitions for I2C channel 2
  131. config S3C_DEV_I2C3
  132. bool
  133. help
  134. Compile in platform device definition for I2C controller 3
  135. config S3C_DEV_I2C4
  136. bool
  137. help
  138. Compile in platform device definition for I2C controller 4
  139. config S3C_DEV_I2C5
  140. bool
  141. help
  142. Compile in platform device definition for I2C controller 5
  143. config S3C_DEV_I2C6
  144. bool
  145. help
  146. Compile in platform device definition for I2C controller 6
  147. config S3C_DEV_I2C7
  148. bool
  149. help
  150. Compile in platform device definition for I2C controller 7
  151. config S3C_DEV_FB
  152. bool
  153. help
  154. Compile in platform device definition for framebuffer
  155. config S3C_DEV_USB_HOST
  156. bool
  157. help
  158. Compile in platform device definition for USB host.
  159. config S3C_DEV_USB_HSOTG
  160. bool
  161. help
  162. Compile in platform device definition for USB high-speed OtG
  163. config S3C_DEV_WDT
  164. bool
  165. default y if ARCH_S3C2410
  166. help
  167. Complie in platform device definition for Watchdog Timer
  168. config S3C_DEV_NAND
  169. bool
  170. help
  171. Compile in platform device definition for NAND controller
  172. config S3C_DEV_ONENAND
  173. bool
  174. help
  175. Compile in platform device definition for OneNAND controller
  176. config S3C_DEV_RTC
  177. bool
  178. help
  179. Complie in platform device definition for RTC
  180. config SAMSUNG_DEV_ADC
  181. bool
  182. help
  183. Compile in platform device definition for ADC controller
  184. config SAMSUNG_DEV_IDE
  185. bool
  186. help
  187. Compile in platform device definitions for IDE
  188. config S3C64XX_DEV_SPI
  189. bool
  190. help
  191. Compile in platform device definitions for S3C64XX's type
  192. SPI controllers.
  193. config SAMSUNG_DEV_TS
  194. bool
  195. help
  196. Common in platform device definitions for touchscreen device
  197. config SAMSUNG_DEV_KEYPAD
  198. bool
  199. help
  200. Compile in platform device definitions for keypad
  201. config SAMSUNG_DEV_PWM
  202. bool
  203. default y if ARCH_S3C2410
  204. help
  205. Compile in platform device definition for PWM Timer
  206. config SAMSUNG_DEV_BACKLIGHT
  207. bool
  208. depends on SAMSUNG_DEV_PWM
  209. help
  210. Compile in platform device definition LCD backlight with PWM Timer
  211. config S3C24XX_PWM
  212. bool "PWM device support"
  213. select HAVE_PWM
  214. help
  215. Support for exporting the PWM timer blocks via the pwm device
  216. system
  217. # DMA
  218. config S3C_DMA
  219. bool
  220. help
  221. Internal configuration for S3C DMA core
  222. config SAMSUNG_DMADEV
  223. bool
  224. select DMADEVICES
  225. select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
  226. CPU_S5P6450 || CPU_S5P6440)
  227. select ARM_AMBA
  228. help
  229. Use DMA device engine for PL330 DMAC.
  230. comment "Power management"
  231. config SAMSUNG_PM_DEBUG
  232. bool "S3C2410 PM Suspend debug"
  233. depends on PM
  234. help
  235. Say Y here if you want verbose debugging from the PM Suspend and
  236. Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  237. for more information.
  238. config S3C_PM_DEBUG_LED_SMDK
  239. bool "SMDK LED suspend/resume debugging"
  240. depends on PM && (MACH_SMDK6410)
  241. help
  242. Say Y here to enable the use of the SMDK LEDs on the baseboard
  243. for debugging of the state of the suspend and resume process.
  244. Note, this currently only works for S3C64XX based SMDK boards.
  245. config SAMSUNG_PM_CHECK
  246. bool "S3C2410 PM Suspend Memory CRC"
  247. depends on PM && CRC32
  248. help
  249. Enable the PM code's memory area checksum over sleep. This option
  250. will generate CRCs of all blocks of memory, and store them before
  251. going to sleep. The blocks are then checked on resume for any
  252. errors.
  253. Note, this can take several seconds depending on memory size
  254. and CPU speed.
  255. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  256. config SAMSUNG_PM_CHECK_CHUNKSIZE
  257. int "S3C2410 PM Suspend CRC Chunksize (KiB)"
  258. depends on PM && SAMSUNG_PM_CHECK
  259. default 64
  260. help
  261. Set the chunksize in Kilobytes of the CRC for checking memory
  262. corruption over suspend and resume. A smaller value will mean that
  263. the CRC data block will take more memory, but wil identify any
  264. faults with better precision.
  265. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
  266. config SAMSUNG_WAKEMASK
  267. bool
  268. depends on PM
  269. help
  270. Compile support for wakeup-mask controls found on the S3C6400
  271. and above. This code allows a set of interrupt to wakeup-mask
  272. mappings. See <plat/wakeup-mask.h>
  273. comment "Power Domain"
  274. config SAMSUNG_PD
  275. bool "Samsung Power Domain"
  276. depends on PM_RUNTIME
  277. help
  278. Say Y here if you want to control Power Domain by Runtime PM.
  279. endif