sun4d_irq.c 14 KB

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  1. /*
  2. * SS1000/SC2000 interrupt handling.
  3. *
  4. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  5. * Heavily based on arch/sparc/kernel/irq.c.
  6. */
  7. #include <linux/kernel_stat.h>
  8. #include <linux/seq_file.h>
  9. #include <asm/timer.h>
  10. #include <asm/traps.h>
  11. #include <asm/irq.h>
  12. #include <asm/io.h>
  13. #include <asm/sbi.h>
  14. #include <asm/cacheflush.h>
  15. #include "kernel.h"
  16. #include "irq.h"
  17. /* Sun4d interrupts fall roughly into two categories. SBUS and
  18. * cpu local. CPU local interrupts cover the timer interrupts
  19. * and whatnot, and we encode those as normal PILs between
  20. * 0 and 15.
  21. *
  22. * SBUS interrupts are encoded integers including the board number
  23. * (plus one), the SBUS level, and the SBUS slot number. Sun4D
  24. * IRQ dispatch is done by:
  25. *
  26. * 1) Reading the BW local interrupt table in order to get the bus
  27. * interrupt mask.
  28. *
  29. * This table is indexed by SBUS interrupt level which can be
  30. * derived from the PIL we got interrupted on.
  31. *
  32. * 2) For each bus showing interrupt pending from #1, read the
  33. * SBI interrupt state register. This will indicate which slots
  34. * have interrupts pending for that SBUS interrupt level.
  35. */
  36. struct sun4d_timer_regs {
  37. u32 l10_timer_limit;
  38. u32 l10_cur_countx;
  39. u32 l10_limit_noclear;
  40. u32 ctrl;
  41. u32 l10_cur_count;
  42. };
  43. static struct sun4d_timer_regs __iomem *sun4d_timers;
  44. #define TIMER_IRQ 10
  45. #define MAX_STATIC_ALLOC 4
  46. /* Specify which cpu handle interrupts from which board.
  47. * Index is board - value is cpu.
  48. */
  49. static unsigned char board_to_cpu[32];
  50. static struct irqaction *irq_action[NR_IRQS];
  51. static struct sbus_action {
  52. struct irqaction *action;
  53. /* For SMP this needs to be extended */
  54. } *sbus_actions;
  55. static int pil_to_sbus[] = {
  56. 0,
  57. 0,
  58. 1,
  59. 2,
  60. 0,
  61. 3,
  62. 0,
  63. 4,
  64. 0,
  65. 5,
  66. 0,
  67. 6,
  68. 0,
  69. 7,
  70. 0,
  71. 0,
  72. };
  73. static int sbus_to_pil[] = {
  74. 0,
  75. 2,
  76. 3,
  77. 5,
  78. 7,
  79. 9,
  80. 11,
  81. 13,
  82. };
  83. static int nsbi;
  84. /* Exported for sun4d_smp.c */
  85. DEFINE_SPINLOCK(sun4d_imsk_lock);
  86. int show_sun4d_interrupts(struct seq_file *p, void *v)
  87. {
  88. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  89. struct irqaction *action;
  90. unsigned long flags;
  91. #ifdef CONFIG_SMP
  92. int x;
  93. #endif
  94. spin_lock_irqsave(&irq_action_lock, flags);
  95. if (i < NR_IRQS) {
  96. sbusl = pil_to_sbus[i];
  97. if (!sbusl) {
  98. action = *(i + irq_action);
  99. if (!action)
  100. goto out_unlock;
  101. } else {
  102. for (j = 0; j < nsbi; j++) {
  103. for (k = 0; k < 4; k++)
  104. action = sbus_actions[(j << 5) + (sbusl << 2) + k].action;
  105. if (action)
  106. goto found_it;
  107. }
  108. goto out_unlock;
  109. }
  110. found_it: seq_printf(p, "%3d: ", i);
  111. #ifndef CONFIG_SMP
  112. seq_printf(p, "%10u ", kstat_irqs(i));
  113. #else
  114. for_each_online_cpu(x)
  115. seq_printf(p, "%10u ",
  116. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  117. #endif
  118. seq_printf(p, "%c %s",
  119. (action->flags & IRQF_DISABLED) ? '+' : ' ',
  120. action->name);
  121. action = action->next;
  122. for (;;) {
  123. for (; action; action = action->next) {
  124. seq_printf(p, ",%s %s",
  125. (action->flags & IRQF_DISABLED) ? " +" : "",
  126. action->name);
  127. }
  128. if (!sbusl)
  129. break;
  130. k++;
  131. if (k < 4) {
  132. action = sbus_actions[(j << 5) + (sbusl << 2) + k].action;
  133. } else {
  134. j++;
  135. if (j == nsbi)
  136. break;
  137. k = 0;
  138. action = sbus_actions[(j << 5) + (sbusl << 2)].action;
  139. }
  140. }
  141. seq_putc(p, '\n');
  142. }
  143. out_unlock:
  144. spin_unlock_irqrestore(&irq_action_lock, flags);
  145. return 0;
  146. }
  147. void sun4d_free_irq(unsigned int irq, void *dev_id)
  148. {
  149. struct irqaction *action, **actionp;
  150. struct irqaction *tmp = NULL;
  151. unsigned long flags;
  152. spin_lock_irqsave(&irq_action_lock, flags);
  153. if (irq < 15)
  154. actionp = irq + irq_action;
  155. else
  156. actionp = &(sbus_actions[irq - (1 << 5)].action);
  157. action = *actionp;
  158. if (!action) {
  159. printk(KERN_ERR "Trying to free free IRQ%d\n", irq);
  160. goto out_unlock;
  161. }
  162. if (dev_id) {
  163. for (; action; action = action->next) {
  164. if (action->dev_id == dev_id)
  165. break;
  166. tmp = action;
  167. }
  168. if (!action) {
  169. printk(KERN_ERR "Trying to free free shared IRQ%d\n",
  170. irq);
  171. goto out_unlock;
  172. }
  173. } else if (action->flags & IRQF_SHARED) {
  174. printk(KERN_ERR "Trying to free shared IRQ%d with NULL device ID\n",
  175. irq);
  176. goto out_unlock;
  177. }
  178. if (action->flags & SA_STATIC_ALLOC) {
  179. /*
  180. * This interrupt is marked as specially allocated
  181. * so it is a bad idea to free it.
  182. */
  183. printk(KERN_ERR "Attempt to free statically allocated IRQ%d (%s)\n",
  184. irq, action->name);
  185. goto out_unlock;
  186. }
  187. if (tmp)
  188. tmp->next = action->next;
  189. else
  190. *actionp = action->next;
  191. spin_unlock_irqrestore(&irq_action_lock, flags);
  192. synchronize_irq(irq);
  193. spin_lock_irqsave(&irq_action_lock, flags);
  194. kfree(action);
  195. if (!(*actionp))
  196. __disable_irq(irq);
  197. out_unlock:
  198. spin_unlock_irqrestore(&irq_action_lock, flags);
  199. }
  200. void sun4d_handler_irq(int pil, struct pt_regs *regs)
  201. {
  202. struct pt_regs *old_regs;
  203. struct irqaction *action;
  204. int cpu = smp_processor_id();
  205. /* SBUS IRQ level (1 - 7) */
  206. int sbusl = pil_to_sbus[pil];
  207. /* FIXME: Is this necessary?? */
  208. cc_get_ipen();
  209. cc_set_iclr(1 << pil);
  210. old_regs = set_irq_regs(regs);
  211. irq_enter();
  212. kstat_cpu(cpu).irqs[pil]++;
  213. if (!sbusl) {
  214. action = *(pil + irq_action);
  215. if (!action)
  216. unexpected_irq(pil, NULL, regs);
  217. do {
  218. action->handler(pil, action->dev_id);
  219. action = action->next;
  220. } while (action);
  221. } else {
  222. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  223. int sbino;
  224. struct sbus_action *actionp;
  225. unsigned mask, slot;
  226. int sbil = (sbusl << 2);
  227. bw_clear_intr_mask(sbusl, bus_mask);
  228. /* Loop for each pending SBI */
  229. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  230. if (bus_mask & 1) {
  231. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  232. mask &= (0xf << sbil);
  233. actionp = sbus_actions + (sbino << 5) + (sbil);
  234. /* Loop for each pending SBI slot */
  235. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  236. if (mask & slot) {
  237. mask &= ~slot;
  238. action = actionp->action;
  239. if (!action)
  240. unexpected_irq(pil, NULL, regs);
  241. do {
  242. action->handler(pil, action->dev_id);
  243. action = action->next;
  244. } while (action);
  245. release_sbi(SBI2DEVID(sbino), slot);
  246. }
  247. }
  248. }
  249. irq_exit();
  250. set_irq_regs(old_regs);
  251. }
  252. int sun4d_request_irq(unsigned int irq,
  253. irq_handler_t handler,
  254. unsigned long irqflags, const char *devname, void *dev_id)
  255. {
  256. struct irqaction *action, *tmp = NULL, **actionp;
  257. unsigned long flags;
  258. int ret;
  259. if (irq > 14 && irq < (1 << 5)) {
  260. ret = -EINVAL;
  261. goto out;
  262. }
  263. if (!handler) {
  264. ret = -EINVAL;
  265. goto out;
  266. }
  267. spin_lock_irqsave(&irq_action_lock, flags);
  268. if (irq >= (1 << 5))
  269. actionp = &(sbus_actions[irq - (1 << 5)].action);
  270. else
  271. actionp = irq + irq_action;
  272. action = *actionp;
  273. if (action) {
  274. if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
  275. for (tmp = action; tmp->next; tmp = tmp->next)
  276. /* find last entry - tmp used below */;
  277. } else {
  278. ret = -EBUSY;
  279. goto out_unlock;
  280. }
  281. if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
  282. printk(KERN_ERR "Attempt to mix fast and slow interrupts on IRQ%d denied\n",
  283. irq);
  284. ret = -EBUSY;
  285. goto out_unlock;
  286. }
  287. action = NULL; /* Or else! */
  288. }
  289. /* If this is flagged as statically allocated then we use our
  290. * private struct which is never freed.
  291. */
  292. if (irqflags & SA_STATIC_ALLOC) {
  293. if (static_irq_count < MAX_STATIC_ALLOC)
  294. action = &static_irqaction[static_irq_count++];
  295. else
  296. printk(KERN_ERR "Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n",
  297. irq, devname);
  298. }
  299. if (action == NULL)
  300. action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
  301. if (!action) {
  302. ret = -ENOMEM;
  303. goto out_unlock;
  304. }
  305. action->handler = handler;
  306. action->flags = irqflags;
  307. action->name = devname;
  308. action->next = NULL;
  309. action->dev_id = dev_id;
  310. if (tmp)
  311. tmp->next = action;
  312. else
  313. *actionp = action;
  314. __enable_irq(irq);
  315. ret = 0;
  316. out_unlock:
  317. spin_unlock_irqrestore(&irq_action_lock, flags);
  318. out:
  319. return ret;
  320. }
  321. static void sun4d_disable_irq(unsigned int irq)
  322. {
  323. int tid = board_to_cpu[(irq >> 5) - 1];
  324. unsigned long flags;
  325. if (irq < NR_IRQS)
  326. return;
  327. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  328. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  329. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  330. }
  331. static void sun4d_enable_irq(unsigned int irq)
  332. {
  333. int tid = board_to_cpu[(irq >> 5) - 1];
  334. unsigned long flags;
  335. if (irq < NR_IRQS)
  336. return;
  337. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  338. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  339. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  340. }
  341. #ifdef CONFIG_SMP
  342. static void sun4d_set_cpu_int(int cpu, int level)
  343. {
  344. sun4d_send_ipi(cpu, level);
  345. }
  346. static void sun4d_clear_ipi(int cpu, int level)
  347. {
  348. }
  349. static void sun4d_set_udt(int cpu)
  350. {
  351. }
  352. /* Setup IRQ distribution scheme. */
  353. void __init sun4d_distribute_irqs(void)
  354. {
  355. struct device_node *dp;
  356. int cpuid = cpu_logical_map(1);
  357. if (cpuid == -1)
  358. cpuid = cpu_logical_map(0);
  359. for_each_node_by_name(dp, "sbi") {
  360. int devid = of_getintprop_default(dp, "device-id", 0);
  361. int board = of_getintprop_default(dp, "board#", 0);
  362. board_to_cpu[board] = cpuid;
  363. set_sbi_tid(devid, cpuid << 3);
  364. }
  365. printk(KERN_ERR "All sbus IRQs directed to CPU%d\n", cpuid);
  366. }
  367. #endif
  368. static void sun4d_clear_clock_irq(void)
  369. {
  370. sbus_readl(&sun4d_timers->l10_timer_limit);
  371. }
  372. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  373. {
  374. bw_set_prof_limit(cpu, limit);
  375. }
  376. static void __init sun4d_load_profile_irqs(void)
  377. {
  378. int cpu = 0, mid;
  379. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  380. sun4d_load_profile_irq(mid >> 3, 0);
  381. cpu++;
  382. }
  383. }
  384. unsigned int sun4d_build_device_irq(struct platform_device *op,
  385. unsigned int real_irq)
  386. {
  387. static int pil_to_sbus[] = {
  388. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  389. };
  390. struct device_node *dp = op->dev.of_node;
  391. struct device_node *io_unit, *sbi = dp->parent;
  392. const struct linux_prom_registers *regs;
  393. int board, slot;
  394. int sbusl;
  395. while (sbi) {
  396. if (!strcmp(sbi->name, "sbi"))
  397. break;
  398. sbi = sbi->parent;
  399. }
  400. if (!sbi)
  401. goto err_out;
  402. regs = of_get_property(dp, "reg", NULL);
  403. if (!regs)
  404. goto err_out;
  405. slot = regs->which_io;
  406. /*
  407. * If SBI's parent is not io-unit or the io-unit lacks
  408. * a "board#" property, something is very wrong.
  409. */
  410. if (!sbi->parent || strcmp(sbi->parent->name, "io-unit")) {
  411. printk("%s: Error, parent is not io-unit.\n", sbi->full_name);
  412. goto err_out;
  413. }
  414. io_unit = sbi->parent;
  415. board = of_getintprop_default(io_unit, "board#", -1);
  416. if (board == -1) {
  417. printk("%s: Error, lacks board# property.\n", io_unit->full_name);
  418. goto err_out;
  419. }
  420. sbusl = pil_to_sbus[real_irq];
  421. if (sbusl)
  422. return (((board + 1) << 5) + (sbusl << 2) + slot);
  423. err_out:
  424. return real_irq;
  425. }
  426. static void __init sun4d_fixup_trap_table(void)
  427. {
  428. #ifdef CONFIG_SMP
  429. unsigned long flags;
  430. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  431. /* Adjust so that we jump directly to smp4d_ticker */
  432. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  433. /* For SMP we use the level 14 ticker, however the bootup code
  434. * has copied the firmware's level 14 vector into the boot cpu's
  435. * trap table, we must fix this now or we get squashed.
  436. */
  437. local_irq_save(flags);
  438. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  439. trap_table->inst_one = lvl14_save[0];
  440. trap_table->inst_two = lvl14_save[1];
  441. trap_table->inst_three = lvl14_save[2];
  442. trap_table->inst_four = lvl14_save[3];
  443. local_flush_cache_all();
  444. local_irq_restore(flags);
  445. #endif
  446. }
  447. static void __init sun4d_init_timers(irq_handler_t counter_fn)
  448. {
  449. struct device_node *dp;
  450. struct resource res;
  451. const u32 *reg;
  452. int err;
  453. dp = of_find_node_by_name(NULL, "cpu-unit");
  454. if (!dp) {
  455. prom_printf("sun4d_init_timers: Unable to find cpu-unit\n");
  456. prom_halt();
  457. }
  458. /* Which cpu-unit we use is arbitrary, we can view the bootbus timer
  459. * registers via any cpu's mapping. The first 'reg' property is the
  460. * bootbus.
  461. */
  462. reg = of_get_property(dp, "reg", NULL);
  463. of_node_put(dp);
  464. if (!reg) {
  465. prom_printf("sun4d_init_timers: No reg property\n");
  466. prom_halt();
  467. }
  468. res.start = reg[1];
  469. res.end = reg[2] - 1;
  470. res.flags = reg[0] & 0xff;
  471. sun4d_timers = of_ioremap(&res, BW_TIMER_LIMIT,
  472. sizeof(struct sun4d_timer_regs), "user timer");
  473. if (!sun4d_timers) {
  474. prom_printf("sun4d_init_timers: Can't map timer regs\n");
  475. prom_halt();
  476. }
  477. sbus_writel((((1000000/HZ) + 1) << 10), &sun4d_timers->l10_timer_limit);
  478. master_l10_counter = &sun4d_timers->l10_cur_count;
  479. err = request_irq(TIMER_IRQ, counter_fn,
  480. (IRQF_DISABLED | SA_STATIC_ALLOC),
  481. "timer", NULL);
  482. if (err) {
  483. prom_printf("sun4d_init_timers: request_irq() failed with %d\n",
  484. err);
  485. prom_halt();
  486. }
  487. sun4d_load_profile_irqs();
  488. sun4d_fixup_trap_table();
  489. }
  490. void __init sun4d_init_sbi_irq(void)
  491. {
  492. struct device_node *dp;
  493. int target_cpu = 0;
  494. #ifdef CONFIG_SMP
  495. target_cpu = boot_cpu_id;
  496. #endif
  497. nsbi = 0;
  498. for_each_node_by_name(dp, "sbi")
  499. nsbi++;
  500. sbus_actions = kzalloc(nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  501. if (!sbus_actions) {
  502. prom_printf("SUN4D: Cannot allocate sbus_actions, halting.\n");
  503. prom_halt();
  504. }
  505. for_each_node_by_name(dp, "sbi") {
  506. int devid = of_getintprop_default(dp, "device-id", 0);
  507. int board = of_getintprop_default(dp, "board#", 0);
  508. unsigned int mask;
  509. set_sbi_tid(devid, target_cpu << 3);
  510. board_to_cpu[board] = target_cpu;
  511. /* Get rid of pending irqs from PROM */
  512. mask = acquire_sbi(devid, 0xffffffff);
  513. if (mask) {
  514. printk(KERN_ERR "Clearing pending IRQs %08x on SBI %d\n",
  515. mask, board);
  516. release_sbi(devid, mask);
  517. }
  518. }
  519. }
  520. void __init sun4d_init_IRQ(void)
  521. {
  522. local_irq_disable();
  523. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  524. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  525. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  526. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  527. sparc_irq_config.init_timers = sun4d_init_timers;
  528. sparc_irq_config.build_device_irq = sun4d_build_device_irq;
  529. #ifdef CONFIG_SMP
  530. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  531. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  532. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  533. #endif
  534. /* Cannot enable interrupts until OBP ticker is disabled. */
  535. }