ngene-ioctls.h 6.3 KB

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  1. /*
  2. * Copyright (C) 2006-2007 Micronas
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * version 2 only, as published by the Free Software Foundation.
  7. *
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  18. * 02110-1301, USA
  19. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  20. */
  21. #ifndef _NGENE_IOCTLS_H_
  22. #define _NGENE_IOCTLS_H_
  23. #include <linux/ioctl.h>
  24. #include <linux/types.h>
  25. #define NGENE_MAGIC 'n'
  26. typedef struct {
  27. unsigned char I2CAddress;
  28. unsigned char OutLength; /* bytes to write first */
  29. unsigned char InLength; /* bytes to read */
  30. unsigned char OutData[256]; /* output data */
  31. unsigned char InData[256]; /* input data */
  32. } MIC_I2C_READ, *PMIC_I2C_READ;
  33. #define IOCTL_MIC_I2C_READ _IOWR(NGENE_MAGIC, 0x00, MIC_I2C_READ)
  34. typedef struct {
  35. unsigned char I2CAddress;
  36. unsigned char Length;
  37. unsigned char Data[250];
  38. } MIC_I2C_WRITE, *PMIC_I2C_WRITE;
  39. typedef struct {
  40. unsigned char Length;
  41. unsigned char Data[250];
  42. } MIC_I2C_CONTINUE_WRITE, *PMIC_I2C_CONTINUE_WRITE;
  43. #define IOCTL_MIC_I2C_WRITE _IOW(NGENE_MAGIC, 0x01, \
  44. MIC_I2C_WRITE)
  45. #define IOCTL_MIC_I2C_WRITE_NOSTOP _IOW(NGENE_MAGIC, 0x0c, \
  46. MIC_I2C_WRITE)
  47. #define IOCTL_MIC_I2C_CONTINUE_WRITE_NOSTOP _IOW(NGENE_MAGIC, 0x0d, \
  48. MIC_I2C_CONTINUE_WRITE)
  49. #define IOCTL_MIC_I2C_CONTINUE_WRITE _IOW(NGENE_MAGIC, 0x0e, \
  50. MIC_I2C_CONTINUE_WRITE)
  51. typedef struct {
  52. unsigned char ModeSelect; /* see bellow */
  53. unsigned char OutLength; /* bytes to write first */
  54. unsigned char InLength; /* bytes to read */
  55. unsigned char OutData[250]; /* output data */
  56. } MIC_SPI_READ, *PMIC_SPI_READ;
  57. #define IOCTL_MIC_SPI_READ _IOWR(NGENE_MAGIC, 0x02, MIC_SPI_READ)
  58. typedef struct {
  59. unsigned char ModeSelect; /* see below */
  60. unsigned char Length;
  61. unsigned char Data[250];
  62. } MIC_SPI_WRITE, *PMIC_SPI_WRITE;
  63. #define IOCTL_MIC_SPI_WRITE _IOW(NGENE_MAGIC, 0x03, MIC_SPI_READ)
  64. #define IOCTL_MIC_DOWNLOAD_FIRMWARE _IOW(NGENE_MAGIC, 0x06, unsigned char)
  65. #define IOCTL_MIC_NO_OP _IO(NGENE_MAGIC, 0x18)
  66. #define IOCTL_MIC_TUN_RDY _IO(NGENE_MAGIC, 0x07)
  67. #define IOCTL_MIC_DEC_SRATE _IOW(NGENE_MAGIC, 0x0a, int)
  68. #define IOCTL_MIC_DEC_RDY _IO(NGENE_MAGIC, 0x09)
  69. #define IOCTL_MIC_DEC_FREESYNC _IOW(NGENE_MAGIC, 0x08, int)
  70. #define IOCTL_MIC_TUN_DETECT _IOWR(NGENE_MAGIC, 0x0b, int)
  71. typedef struct {
  72. unsigned char Stream; /* < UVI1, UVI2, or TVOUT */
  73. unsigned char Control;
  74. unsigned char Mode;
  75. unsigned short nLines;
  76. unsigned short nBytesPerLine;
  77. unsigned short nVBILines;
  78. unsigned short nBytesPerVBILine;
  79. } MIC_STREAM_CONTROL, *PMIC_STREAM_CONTROL;
  80. enum MIC_STREAM_CONTROL_MODE_BITS {
  81. MSC_MODE_LOOPBACK = 0x80,
  82. MSC_MODE_AVLOOP = 0x40,
  83. MSC_MODE_AUDIO_SPDIF = 0x20,
  84. MSC_MODE_AVSYNC = 0x10,
  85. MSC_MODE_TRANSPORT_STREAM = 0x08,
  86. MSC_MODE_AUDIO_CAPTURE = 0x04,
  87. MSC_MODE_VBI_CAPTURE = 0x02,
  88. MSC_MODE_VIDEO_CAPTURE = 0x01
  89. };
  90. #define IOCTL_MIC_STREAM_CONTROL _IOW(NGENE_MAGIC, 0x22, MIC_STREAM_CONTROL)
  91. typedef struct {
  92. unsigned char Stream; /* < UVI1, UVI2 */
  93. unsigned int Rate; /* < Rate in 100nsec to release the buffers
  94. to the stream filters */
  95. } MIC_SIMULATE_CONTROL, *PMIC_SIMULATE_CONTROL;
  96. #define IOCTL_MIC_SIMULATE_CONTROL _IOW(NGENE_MAGIC, 0x23, \
  97. MIC_SIMULATE_CONTROL)
  98. /*
  99. * IOCTL definitions for the test driver
  100. *
  101. * NOTE: the test driver also supports following IOCTL defined above:
  102. * IOCTL_MIC_NO_OP:
  103. * IOCTL_MIC_RECEIVE_BUFFER:
  104. * IOCTL_MIC_STREAM_CONTROL:
  105. * IOCTL_MIC_I2C_READ:
  106. * IOCTL_MIC_I2C_WRITE:
  107. *
  108. *
  109. * VI2C access to NGene memory (read)
  110. *
  111. * GETMEM in : ULONG start offset
  112. * out : read data (length defined by size of output buffer)
  113. * SETMEM in : ULONG start offset followed by data to be written
  114. * (length defined by size of input buffer)
  115. */
  116. typedef struct {
  117. __u32 Start;
  118. __u32 Length;
  119. __u8 *Data;
  120. } MIC_MEM;
  121. #define IOCTL_MIC_TEST_GETMEM _IOWR(NGENE_MAGIC, 0x90, MIC_MEM)
  122. #define IOCTL_MIC_TEST_SETMEM _IOW(NGENE_MAGIC, 0x91, MIC_MEM)
  123. typedef struct {
  124. __u8 Address;
  125. __u8 Data;
  126. } MIC_IMEM;
  127. #define IOCTL_MIC_SFR_READ _IOWR(NGENE_MAGIC, 0xa2, MIC_IMEM)
  128. #define IOCTL_MIC_SFR_WRITE _IOWR(NGENE_MAGIC, 0xa3, MIC_IMEM)
  129. #define IOCTL_MIC_IRAM_READ _IOWR(NGENE_MAGIC, 0xa4, MIC_IMEM)
  130. #define IOCTL_MIC_IRAM_WRITE _IOWR(NGENE_MAGIC, 0xa5, MIC_IMEM)
  131. /*
  132. * Set Ngene gpio bit
  133. */
  134. typedef struct {
  135. unsigned char Select;
  136. unsigned char Level;
  137. } MIC_SET_GPIO_PIN, *PMIC_SET_GPIO_PIN;
  138. #define IOCTL_MIC_SET_GPIO_PIN _IOWR(NGENE_MAGIC, 0xa6, MIC_SET_GPIO_PIN)
  139. /*
  140. * Uart ioctls:
  141. * These are implemented in the test driver.
  142. *
  143. * Enable UART
  144. *
  145. * In: 1 byte containing baud rate: 0 = 19200, 1 = 9600, 2 = 4800, 3 = 2400
  146. * Out: nothing
  147. */
  148. #define IOCTL_MIC_UART_ENABLE _IOW(NGENE_MAGIC, 0xa9, unsigned char)
  149. /*
  150. * Enable UART
  151. *
  152. * In: nothing
  153. * Out: nothing
  154. */
  155. #define IOCTL_MIC_UART_DISABLE _IO(NGENE_MAGIC, 0xAA)
  156. /*
  157. * Write UART
  158. *
  159. * In: data to write
  160. * Out: nothing
  161. * Note: Call returns immediatly, data are send out asynchrounsly
  162. */
  163. #define IOCTL_MIC_UART_WRITE _IOW(NGENE_MAGIC, 0xAB, unsigned char)
  164. /*
  165. * Read UART
  166. *
  167. * In: nothing
  168. * Out: Data read (since last call)
  169. * Note: Call returns immediatly
  170. */
  171. #define IOCTL_MIC_UART_READ _IOR(NGENE_MAGIC, 0xAC, unsigned char)
  172. /*
  173. * UART Status
  174. *
  175. * In: nothing
  176. * Out: Byte 0 : Transmitter busy,
  177. * Byte 1 : Nbr of characters available for read.
  178. * Note: Call returns immediatly
  179. */
  180. #define IOCTL_MIC_UART_STATUS _IOR(NGENE_MAGIC, 0xAD, unsigned char)
  181. #endif