mt9v032.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773
  1. /*
  2. * Driver for MT9V032 CMOS Image Sensor from Micron
  3. *
  4. * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  5. *
  6. * Based on the MT9M001 driver,
  7. *
  8. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/i2c.h>
  16. #include <linux/log2.h>
  17. #include <linux/mutex.h>
  18. #include <linux/slab.h>
  19. #include <linux/videodev2.h>
  20. #include <linux/v4l2-mediabus.h>
  21. #include <media/mt9v032.h>
  22. #include <media/v4l2-ctrls.h>
  23. #include <media/v4l2-device.h>
  24. #include <media/v4l2-subdev.h>
  25. #define MT9V032_PIXEL_ARRAY_HEIGHT 492
  26. #define MT9V032_PIXEL_ARRAY_WIDTH 782
  27. #define MT9V032_CHIP_VERSION 0x00
  28. #define MT9V032_CHIP_ID_REV1 0x1311
  29. #define MT9V032_CHIP_ID_REV3 0x1313
  30. #define MT9V032_ROW_START 0x01
  31. #define MT9V032_ROW_START_MIN 4
  32. #define MT9V032_ROW_START_DEF 10
  33. #define MT9V032_ROW_START_MAX 482
  34. #define MT9V032_COLUMN_START 0x02
  35. #define MT9V032_COLUMN_START_MIN 1
  36. #define MT9V032_COLUMN_START_DEF 2
  37. #define MT9V032_COLUMN_START_MAX 752
  38. #define MT9V032_WINDOW_HEIGHT 0x03
  39. #define MT9V032_WINDOW_HEIGHT_MIN 1
  40. #define MT9V032_WINDOW_HEIGHT_DEF 480
  41. #define MT9V032_WINDOW_HEIGHT_MAX 480
  42. #define MT9V032_WINDOW_WIDTH 0x04
  43. #define MT9V032_WINDOW_WIDTH_MIN 1
  44. #define MT9V032_WINDOW_WIDTH_DEF 752
  45. #define MT9V032_WINDOW_WIDTH_MAX 752
  46. #define MT9V032_HORIZONTAL_BLANKING 0x05
  47. #define MT9V032_HORIZONTAL_BLANKING_MIN 43
  48. #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
  49. #define MT9V032_VERTICAL_BLANKING 0x06
  50. #define MT9V032_VERTICAL_BLANKING_MIN 4
  51. #define MT9V032_VERTICAL_BLANKING_MAX 3000
  52. #define MT9V032_CHIP_CONTROL 0x07
  53. #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
  54. #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
  55. #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
  56. #define MT9V032_SHUTTER_WIDTH1 0x08
  57. #define MT9V032_SHUTTER_WIDTH2 0x09
  58. #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
  59. #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
  60. #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
  61. #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
  62. #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
  63. #define MT9V032_RESET 0x0c
  64. #define MT9V032_READ_MODE 0x0d
  65. #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
  66. #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
  67. #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
  68. #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
  69. #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
  70. #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
  71. #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
  72. #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
  73. #define MT9V032_PIXEL_OPERATION_MODE 0x0f
  74. #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
  75. #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
  76. #define MT9V032_ANALOG_GAIN 0x35
  77. #define MT9V032_ANALOG_GAIN_MIN 16
  78. #define MT9V032_ANALOG_GAIN_DEF 16
  79. #define MT9V032_ANALOG_GAIN_MAX 64
  80. #define MT9V032_MAX_ANALOG_GAIN 0x36
  81. #define MT9V032_MAX_ANALOG_GAIN_MAX 127
  82. #define MT9V032_FRAME_DARK_AVERAGE 0x42
  83. #define MT9V032_DARK_AVG_THRESH 0x46
  84. #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
  85. #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
  86. #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
  87. #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
  88. #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
  89. #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
  90. #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
  91. #define MT9V032_PIXEL_CLOCK 0x74
  92. #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
  93. #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
  94. #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
  95. #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
  96. #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
  97. #define MT9V032_TEST_PATTERN 0x7f
  98. #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
  99. #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
  100. #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
  101. #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
  102. #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
  103. #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
  104. #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
  105. #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
  106. #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
  107. #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
  108. #define MT9V032_AEC_AGC_ENABLE 0xaf
  109. #define MT9V032_AEC_ENABLE (1 << 0)
  110. #define MT9V032_AGC_ENABLE (1 << 1)
  111. #define MT9V032_THERMAL_INFO 0xc1
  112. struct mt9v032 {
  113. struct v4l2_subdev subdev;
  114. struct media_pad pad;
  115. struct v4l2_mbus_framefmt format;
  116. struct v4l2_rect crop;
  117. struct v4l2_ctrl_handler ctrls;
  118. struct mutex power_lock;
  119. int power_count;
  120. struct mt9v032_platform_data *pdata;
  121. u16 chip_control;
  122. u16 aec_agc;
  123. };
  124. static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
  125. {
  126. return container_of(sd, struct mt9v032, subdev);
  127. }
  128. static int mt9v032_read(struct i2c_client *client, const u8 reg)
  129. {
  130. s32 data = i2c_smbus_read_word_data(client, reg);
  131. dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
  132. swab16(data), reg);
  133. return data < 0 ? data : swab16(data);
  134. }
  135. static int mt9v032_write(struct i2c_client *client, const u8 reg,
  136. const u16 data)
  137. {
  138. dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
  139. data, reg);
  140. return i2c_smbus_write_word_data(client, reg, swab16(data));
  141. }
  142. static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
  143. {
  144. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  145. u16 value = (mt9v032->chip_control & ~clear) | set;
  146. int ret;
  147. ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
  148. if (ret < 0)
  149. return ret;
  150. mt9v032->chip_control = value;
  151. return 0;
  152. }
  153. static int
  154. mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
  155. {
  156. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  157. u16 value = mt9v032->aec_agc;
  158. int ret;
  159. if (enable)
  160. value |= which;
  161. else
  162. value &= ~which;
  163. ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
  164. if (ret < 0)
  165. return ret;
  166. mt9v032->aec_agc = value;
  167. return 0;
  168. }
  169. static int mt9v032_power_on(struct mt9v032 *mt9v032)
  170. {
  171. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  172. int ret;
  173. if (mt9v032->pdata->set_clock) {
  174. mt9v032->pdata->set_clock(&mt9v032->subdev, 25000000);
  175. udelay(1);
  176. }
  177. /* Reset the chip and stop data read out */
  178. ret = mt9v032_write(client, MT9V032_RESET, 1);
  179. if (ret < 0)
  180. return ret;
  181. ret = mt9v032_write(client, MT9V032_RESET, 0);
  182. if (ret < 0)
  183. return ret;
  184. return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
  185. }
  186. static void mt9v032_power_off(struct mt9v032 *mt9v032)
  187. {
  188. if (mt9v032->pdata->set_clock)
  189. mt9v032->pdata->set_clock(&mt9v032->subdev, 0);
  190. }
  191. static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
  192. {
  193. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  194. int ret;
  195. if (!on) {
  196. mt9v032_power_off(mt9v032);
  197. return 0;
  198. }
  199. ret = mt9v032_power_on(mt9v032);
  200. if (ret < 0)
  201. return ret;
  202. /* Configure the pixel clock polarity */
  203. if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
  204. ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK,
  205. MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
  206. if (ret < 0)
  207. return ret;
  208. }
  209. /* Disable the noise correction algorithm and restore the controls. */
  210. ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
  211. if (ret < 0)
  212. return ret;
  213. return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
  214. }
  215. /* -----------------------------------------------------------------------------
  216. * V4L2 subdev video operations
  217. */
  218. static struct v4l2_mbus_framefmt *
  219. __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
  220. unsigned int pad, enum v4l2_subdev_format_whence which)
  221. {
  222. switch (which) {
  223. case V4L2_SUBDEV_FORMAT_TRY:
  224. return v4l2_subdev_get_try_format(fh, pad);
  225. case V4L2_SUBDEV_FORMAT_ACTIVE:
  226. return &mt9v032->format;
  227. default:
  228. return NULL;
  229. }
  230. }
  231. static struct v4l2_rect *
  232. __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
  233. unsigned int pad, enum v4l2_subdev_format_whence which)
  234. {
  235. switch (which) {
  236. case V4L2_SUBDEV_FORMAT_TRY:
  237. return v4l2_subdev_get_try_crop(fh, pad);
  238. case V4L2_SUBDEV_FORMAT_ACTIVE:
  239. return &mt9v032->crop;
  240. default:
  241. return NULL;
  242. }
  243. }
  244. static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
  245. {
  246. const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
  247. | MT9V032_CHIP_CONTROL_DOUT_ENABLE
  248. | MT9V032_CHIP_CONTROL_SEQUENTIAL;
  249. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  250. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  251. struct v4l2_mbus_framefmt *format = &mt9v032->format;
  252. struct v4l2_rect *crop = &mt9v032->crop;
  253. unsigned int hratio;
  254. unsigned int vratio;
  255. int ret;
  256. if (!enable)
  257. return mt9v032_set_chip_control(mt9v032, mode, 0);
  258. /* Configure the window size and row/column bin */
  259. hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
  260. vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
  261. ret = mt9v032_write(client, MT9V032_READ_MODE,
  262. (hratio - 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT |
  263. (vratio - 1) << MT9V032_READ_MODE_COLUMN_BIN_SHIFT);
  264. if (ret < 0)
  265. return ret;
  266. ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
  267. if (ret < 0)
  268. return ret;
  269. ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
  270. if (ret < 0)
  271. return ret;
  272. ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
  273. if (ret < 0)
  274. return ret;
  275. ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
  276. if (ret < 0)
  277. return ret;
  278. ret = mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING,
  279. max(43, 660 - crop->width));
  280. if (ret < 0)
  281. return ret;
  282. /* Switch to master "normal" mode */
  283. return mt9v032_set_chip_control(mt9v032, 0, mode);
  284. }
  285. static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
  286. struct v4l2_subdev_fh *fh,
  287. struct v4l2_subdev_mbus_code_enum *code)
  288. {
  289. if (code->index > 0)
  290. return -EINVAL;
  291. code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  292. return 0;
  293. }
  294. static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
  295. struct v4l2_subdev_fh *fh,
  296. struct v4l2_subdev_frame_size_enum *fse)
  297. {
  298. if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
  299. return -EINVAL;
  300. fse->min_width = MT9V032_WINDOW_WIDTH_DEF / fse->index;
  301. fse->max_width = fse->min_width;
  302. fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / fse->index;
  303. fse->max_height = fse->min_height;
  304. return 0;
  305. }
  306. static int mt9v032_get_format(struct v4l2_subdev *subdev,
  307. struct v4l2_subdev_fh *fh,
  308. struct v4l2_subdev_format *format)
  309. {
  310. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  311. format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
  312. format->which);
  313. return 0;
  314. }
  315. static int mt9v032_set_format(struct v4l2_subdev *subdev,
  316. struct v4l2_subdev_fh *fh,
  317. struct v4l2_subdev_format *format)
  318. {
  319. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  320. struct v4l2_mbus_framefmt *__format;
  321. struct v4l2_rect *__crop;
  322. unsigned int width;
  323. unsigned int height;
  324. unsigned int hratio;
  325. unsigned int vratio;
  326. __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
  327. format->which);
  328. /* Clamp the width and height to avoid dividing by zero. */
  329. width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
  330. max(__crop->width / 8, MT9V032_WINDOW_WIDTH_MIN),
  331. __crop->width);
  332. height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
  333. max(__crop->height / 8, MT9V032_WINDOW_HEIGHT_MIN),
  334. __crop->height);
  335. hratio = DIV_ROUND_CLOSEST(__crop->width, width);
  336. vratio = DIV_ROUND_CLOSEST(__crop->height, height);
  337. __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
  338. format->which);
  339. __format->width = __crop->width / hratio;
  340. __format->height = __crop->height / vratio;
  341. format->format = *__format;
  342. return 0;
  343. }
  344. static int mt9v032_get_crop(struct v4l2_subdev *subdev,
  345. struct v4l2_subdev_fh *fh,
  346. struct v4l2_subdev_crop *crop)
  347. {
  348. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  349. crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
  350. crop->which);
  351. return 0;
  352. }
  353. static int mt9v032_set_crop(struct v4l2_subdev *subdev,
  354. struct v4l2_subdev_fh *fh,
  355. struct v4l2_subdev_crop *crop)
  356. {
  357. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  358. struct v4l2_mbus_framefmt *__format;
  359. struct v4l2_rect *__crop;
  360. struct v4l2_rect rect;
  361. /* Clamp the crop rectangle boundaries and align them to a multiple of 2
  362. * pixels.
  363. */
  364. rect.left = clamp(ALIGN(crop->rect.left, 2),
  365. MT9V032_COLUMN_START_MIN,
  366. MT9V032_COLUMN_START_MAX);
  367. rect.top = clamp(ALIGN(crop->rect.top, 2),
  368. MT9V032_ROW_START_MIN,
  369. MT9V032_ROW_START_MAX);
  370. rect.width = clamp(ALIGN(crop->rect.width, 2),
  371. MT9V032_WINDOW_WIDTH_MIN,
  372. MT9V032_WINDOW_WIDTH_MAX);
  373. rect.height = clamp(ALIGN(crop->rect.height, 2),
  374. MT9V032_WINDOW_HEIGHT_MIN,
  375. MT9V032_WINDOW_HEIGHT_MAX);
  376. rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
  377. rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
  378. __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);
  379. if (rect.width != __crop->width || rect.height != __crop->height) {
  380. /* Reset the output image size if the crop rectangle size has
  381. * been modified.
  382. */
  383. __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
  384. crop->which);
  385. __format->width = rect.width;
  386. __format->height = rect.height;
  387. }
  388. *__crop = rect;
  389. crop->rect = rect;
  390. return 0;
  391. }
  392. /* -----------------------------------------------------------------------------
  393. * V4L2 subdev control operations
  394. */
  395. #define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
  396. static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
  397. {
  398. struct mt9v032 *mt9v032 =
  399. container_of(ctrl->handler, struct mt9v032, ctrls);
  400. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  401. u16 data;
  402. switch (ctrl->id) {
  403. case V4L2_CID_AUTOGAIN:
  404. return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
  405. ctrl->val);
  406. case V4L2_CID_GAIN:
  407. return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);
  408. case V4L2_CID_EXPOSURE_AUTO:
  409. return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
  410. ctrl->val);
  411. case V4L2_CID_EXPOSURE:
  412. return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
  413. ctrl->val);
  414. case V4L2_CID_TEST_PATTERN:
  415. switch (ctrl->val) {
  416. case 0:
  417. data = 0;
  418. break;
  419. case 1:
  420. data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
  421. | MT9V032_TEST_PATTERN_ENABLE;
  422. break;
  423. case 2:
  424. data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
  425. | MT9V032_TEST_PATTERN_ENABLE;
  426. break;
  427. case 3:
  428. data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
  429. | MT9V032_TEST_PATTERN_ENABLE;
  430. break;
  431. default:
  432. data = (ctrl->val << MT9V032_TEST_PATTERN_DATA_SHIFT)
  433. | MT9V032_TEST_PATTERN_USE_DATA
  434. | MT9V032_TEST_PATTERN_ENABLE
  435. | MT9V032_TEST_PATTERN_FLIP;
  436. break;
  437. }
  438. return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
  439. }
  440. return 0;
  441. }
  442. static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
  443. .s_ctrl = mt9v032_s_ctrl,
  444. };
  445. static const struct v4l2_ctrl_config mt9v032_ctrls[] = {
  446. {
  447. .ops = &mt9v032_ctrl_ops,
  448. .id = V4L2_CID_TEST_PATTERN,
  449. .type = V4L2_CTRL_TYPE_INTEGER,
  450. .name = "Test pattern",
  451. .min = 0,
  452. .max = 1023,
  453. .step = 1,
  454. .def = 0,
  455. .flags = 0,
  456. }
  457. };
  458. /* -----------------------------------------------------------------------------
  459. * V4L2 subdev core operations
  460. */
  461. static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
  462. {
  463. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  464. int ret = 0;
  465. mutex_lock(&mt9v032->power_lock);
  466. /* If the power count is modified from 0 to != 0 or from != 0 to 0,
  467. * update the power state.
  468. */
  469. if (mt9v032->power_count == !on) {
  470. ret = __mt9v032_set_power(mt9v032, !!on);
  471. if (ret < 0)
  472. goto done;
  473. }
  474. /* Update the power count. */
  475. mt9v032->power_count += on ? 1 : -1;
  476. WARN_ON(mt9v032->power_count < 0);
  477. done:
  478. mutex_unlock(&mt9v032->power_lock);
  479. return ret;
  480. }
  481. /* -----------------------------------------------------------------------------
  482. * V4L2 subdev internal operations
  483. */
  484. static int mt9v032_registered(struct v4l2_subdev *subdev)
  485. {
  486. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  487. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  488. s32 data;
  489. int ret;
  490. dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
  491. client->addr);
  492. ret = mt9v032_power_on(mt9v032);
  493. if (ret < 0) {
  494. dev_err(&client->dev, "MT9V032 power up failed\n");
  495. return ret;
  496. }
  497. /* Read and check the sensor version */
  498. data = mt9v032_read(client, MT9V032_CHIP_VERSION);
  499. if (data != MT9V032_CHIP_ID_REV1 && data != MT9V032_CHIP_ID_REV3) {
  500. dev_err(&client->dev, "MT9V032 not detected, wrong version "
  501. "0x%04x\n", data);
  502. return -ENODEV;
  503. }
  504. mt9v032_power_off(mt9v032);
  505. dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n",
  506. client->addr);
  507. return ret;
  508. }
  509. static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  510. {
  511. struct v4l2_mbus_framefmt *format;
  512. struct v4l2_rect *crop;
  513. crop = v4l2_subdev_get_try_crop(fh, 0);
  514. crop->left = MT9V032_COLUMN_START_DEF;
  515. crop->top = MT9V032_ROW_START_DEF;
  516. crop->width = MT9V032_WINDOW_WIDTH_DEF;
  517. crop->height = MT9V032_WINDOW_HEIGHT_DEF;
  518. format = v4l2_subdev_get_try_format(fh, 0);
  519. format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  520. format->width = MT9V032_WINDOW_WIDTH_DEF;
  521. format->height = MT9V032_WINDOW_HEIGHT_DEF;
  522. format->field = V4L2_FIELD_NONE;
  523. format->colorspace = V4L2_COLORSPACE_SRGB;
  524. return mt9v032_set_power(subdev, 1);
  525. }
  526. static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  527. {
  528. return mt9v032_set_power(subdev, 0);
  529. }
  530. static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
  531. .s_power = mt9v032_set_power,
  532. };
  533. static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
  534. .s_stream = mt9v032_s_stream,
  535. };
  536. static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
  537. .enum_mbus_code = mt9v032_enum_mbus_code,
  538. .enum_frame_size = mt9v032_enum_frame_size,
  539. .get_fmt = mt9v032_get_format,
  540. .set_fmt = mt9v032_set_format,
  541. .get_crop = mt9v032_get_crop,
  542. .set_crop = mt9v032_set_crop,
  543. };
  544. static struct v4l2_subdev_ops mt9v032_subdev_ops = {
  545. .core = &mt9v032_subdev_core_ops,
  546. .video = &mt9v032_subdev_video_ops,
  547. .pad = &mt9v032_subdev_pad_ops,
  548. };
  549. static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
  550. .registered = mt9v032_registered,
  551. .open = mt9v032_open,
  552. .close = mt9v032_close,
  553. };
  554. /* -----------------------------------------------------------------------------
  555. * Driver initialization and probing
  556. */
  557. static int mt9v032_probe(struct i2c_client *client,
  558. const struct i2c_device_id *did)
  559. {
  560. struct mt9v032 *mt9v032;
  561. unsigned int i;
  562. int ret;
  563. if (!i2c_check_functionality(client->adapter,
  564. I2C_FUNC_SMBUS_WORD_DATA)) {
  565. dev_warn(&client->adapter->dev,
  566. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  567. return -EIO;
  568. }
  569. mt9v032 = kzalloc(sizeof(*mt9v032), GFP_KERNEL);
  570. if (!mt9v032)
  571. return -ENOMEM;
  572. mutex_init(&mt9v032->power_lock);
  573. mt9v032->pdata = client->dev.platform_data;
  574. v4l2_ctrl_handler_init(&mt9v032->ctrls, ARRAY_SIZE(mt9v032_ctrls) + 4);
  575. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  576. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  577. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  578. V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
  579. MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
  580. v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  581. V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
  582. V4L2_EXPOSURE_AUTO);
  583. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  584. V4L2_CID_EXPOSURE, MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
  585. MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1,
  586. MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
  587. for (i = 0; i < ARRAY_SIZE(mt9v032_ctrls); ++i)
  588. v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_ctrls[i], NULL);
  589. mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
  590. if (mt9v032->ctrls.error)
  591. printk(KERN_INFO "%s: control initialization error %d\n",
  592. __func__, mt9v032->ctrls.error);
  593. mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
  594. mt9v032->crop.top = MT9V032_ROW_START_DEF;
  595. mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
  596. mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
  597. mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  598. mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
  599. mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
  600. mt9v032->format.field = V4L2_FIELD_NONE;
  601. mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
  602. mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
  603. v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
  604. mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
  605. mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  606. mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
  607. ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
  608. if (ret < 0)
  609. kfree(mt9v032);
  610. return ret;
  611. }
  612. static int mt9v032_remove(struct i2c_client *client)
  613. {
  614. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  615. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  616. v4l2_device_unregister_subdev(subdev);
  617. media_entity_cleanup(&subdev->entity);
  618. kfree(mt9v032);
  619. return 0;
  620. }
  621. static const struct i2c_device_id mt9v032_id[] = {
  622. { "mt9v032", 0 },
  623. { }
  624. };
  625. MODULE_DEVICE_TABLE(i2c, mt9v032_id);
  626. static struct i2c_driver mt9v032_driver = {
  627. .driver = {
  628. .name = "mt9v032",
  629. },
  630. .probe = mt9v032_probe,
  631. .remove = mt9v032_remove,
  632. .id_table = mt9v032_id,
  633. };
  634. static int __init mt9v032_init(void)
  635. {
  636. return i2c_add_driver(&mt9v032_driver);
  637. }
  638. static void __exit mt9v032_exit(void)
  639. {
  640. i2c_del_driver(&mt9v032_driver);
  641. }
  642. module_init(mt9v032_init);
  643. module_exit(mt9v032_exit);
  644. MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
  645. MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
  646. MODULE_LICENSE("GPL");