coda.c 57 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101
  1. /*
  2. * Coda multi-standard codec IP
  3. *
  4. * Copyright (C) 2012 Vista Silicon S.L.
  5. * Javier Martin, <javier.martin@vista-silicon.com>
  6. * Xavier Duret
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/firmware.h>
  16. #include <linux/genalloc.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/module.h>
  21. #include <linux/of_device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/slab.h>
  24. #include <linux/videodev2.h>
  25. #include <linux/of.h>
  26. #include <linux/platform_data/coda.h>
  27. #include <media/v4l2-ctrls.h>
  28. #include <media/v4l2-device.h>
  29. #include <media/v4l2-ioctl.h>
  30. #include <media/v4l2-mem2mem.h>
  31. #include <media/videobuf2-core.h>
  32. #include <media/videobuf2-dma-contig.h>
  33. #include "coda.h"
  34. #define CODA_NAME "coda"
  35. #define CODA_MAX_INSTANCES 4
  36. #define CODA_FMO_BUF_SIZE 32
  37. #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  38. #define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  39. #define CODA_PARA_BUF_SIZE (10 * 1024)
  40. #define CODA_ISRAM_SIZE (2048 * 2)
  41. #define CODADX6_IRAM_SIZE 0xb000
  42. #define CODA7_IRAM_SIZE 0x14000 /* 81920 bytes */
  43. #define CODA_MAX_FRAMEBUFFERS 2
  44. #define MAX_W 720
  45. #define MAX_H 576
  46. #define CODA_MAX_FRAME_SIZE 0x90000
  47. #define FMO_SLICE_SAVE_BUF_SIZE (32)
  48. #define CODA_DEFAULT_GAMMA 4096
  49. #define MIN_W 176
  50. #define MIN_H 144
  51. #define MAX_W 720
  52. #define MAX_H 576
  53. #define S_ALIGN 1 /* multiple of 2 */
  54. #define W_ALIGN 1 /* multiple of 2 */
  55. #define H_ALIGN 1 /* multiple of 2 */
  56. #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  57. static int coda_debug;
  58. module_param(coda_debug, int, 0);
  59. MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  60. enum {
  61. V4L2_M2M_SRC = 0,
  62. V4L2_M2M_DST = 1,
  63. };
  64. enum coda_fmt_type {
  65. CODA_FMT_ENC,
  66. CODA_FMT_RAW,
  67. };
  68. enum coda_inst_type {
  69. CODA_INST_ENCODER,
  70. CODA_INST_DECODER,
  71. };
  72. enum coda_product {
  73. CODA_DX6 = 0xf001,
  74. CODA_7541 = 0xf012,
  75. };
  76. struct coda_fmt {
  77. char *name;
  78. u32 fourcc;
  79. enum coda_fmt_type type;
  80. };
  81. struct coda_devtype {
  82. char *firmware;
  83. enum coda_product product;
  84. struct coda_fmt *formats;
  85. unsigned int num_formats;
  86. size_t workbuf_size;
  87. };
  88. /* Per-queue, driver-specific private data */
  89. struct coda_q_data {
  90. unsigned int width;
  91. unsigned int height;
  92. unsigned int sizeimage;
  93. struct coda_fmt *fmt;
  94. };
  95. struct coda_aux_buf {
  96. void *vaddr;
  97. dma_addr_t paddr;
  98. u32 size;
  99. };
  100. struct coda_dev {
  101. struct v4l2_device v4l2_dev;
  102. struct video_device vfd;
  103. struct platform_device *plat_dev;
  104. const struct coda_devtype *devtype;
  105. void __iomem *regs_base;
  106. struct clk *clk_per;
  107. struct clk *clk_ahb;
  108. struct coda_aux_buf codebuf;
  109. struct coda_aux_buf workbuf;
  110. struct gen_pool *iram_pool;
  111. long unsigned int iram_vaddr;
  112. long unsigned int iram_paddr;
  113. unsigned long iram_size;
  114. spinlock_t irqlock;
  115. struct mutex dev_mutex;
  116. struct v4l2_m2m_dev *m2m_dev;
  117. struct vb2_alloc_ctx *alloc_ctx;
  118. struct list_head instances;
  119. unsigned long instance_mask;
  120. struct delayed_work timeout;
  121. struct completion done;
  122. };
  123. struct coda_params {
  124. u8 rot_mode;
  125. u8 h264_intra_qp;
  126. u8 h264_inter_qp;
  127. u8 mpeg4_intra_qp;
  128. u8 mpeg4_inter_qp;
  129. u8 gop_size;
  130. int codec_mode;
  131. enum v4l2_mpeg_video_multi_slice_mode slice_mode;
  132. u32 framerate;
  133. u16 bitrate;
  134. u32 slice_max_bits;
  135. u32 slice_max_mb;
  136. };
  137. struct coda_ctx {
  138. struct coda_dev *dev;
  139. struct list_head list;
  140. int aborting;
  141. int rawstreamon;
  142. int compstreamon;
  143. u32 isequence;
  144. struct coda_q_data q_data[2];
  145. enum coda_inst_type inst_type;
  146. enum v4l2_colorspace colorspace;
  147. struct coda_params params;
  148. struct v4l2_m2m_ctx *m2m_ctx;
  149. struct v4l2_ctrl_handler ctrls;
  150. struct v4l2_fh fh;
  151. int gopcounter;
  152. char vpu_header[3][64];
  153. int vpu_header_size[3];
  154. struct coda_aux_buf parabuf;
  155. struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
  156. int num_internal_frames;
  157. int idx;
  158. };
  159. static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
  160. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
  161. static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
  162. static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
  163. {
  164. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  165. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  166. writel(data, dev->regs_base + reg);
  167. }
  168. static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
  169. {
  170. u32 data;
  171. data = readl(dev->regs_base + reg);
  172. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  173. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  174. return data;
  175. }
  176. static inline unsigned long coda_isbusy(struct coda_dev *dev)
  177. {
  178. return coda_read(dev, CODA_REG_BIT_BUSY);
  179. }
  180. static inline int coda_is_initialized(struct coda_dev *dev)
  181. {
  182. return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
  183. }
  184. static int coda_wait_timeout(struct coda_dev *dev)
  185. {
  186. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  187. while (coda_isbusy(dev)) {
  188. if (time_after(jiffies, timeout))
  189. return -ETIMEDOUT;
  190. }
  191. return 0;
  192. }
  193. static void coda_command_async(struct coda_ctx *ctx, int cmd)
  194. {
  195. struct coda_dev *dev = ctx->dev;
  196. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  197. coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  198. coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  199. coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  200. }
  201. static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  202. {
  203. struct coda_dev *dev = ctx->dev;
  204. coda_command_async(ctx, cmd);
  205. return coda_wait_timeout(dev);
  206. }
  207. static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
  208. enum v4l2_buf_type type)
  209. {
  210. switch (type) {
  211. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  212. return &(ctx->q_data[V4L2_M2M_SRC]);
  213. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  214. return &(ctx->q_data[V4L2_M2M_DST]);
  215. default:
  216. BUG();
  217. }
  218. return NULL;
  219. }
  220. /*
  221. * Add one array of supported formats for each version of Coda:
  222. * i.MX27 -> codadx6
  223. * i.MX51 -> coda7
  224. * i.MX6 -> coda960
  225. */
  226. static struct coda_fmt codadx6_formats[] = {
  227. {
  228. .name = "YUV 4:2:0 Planar",
  229. .fourcc = V4L2_PIX_FMT_YUV420,
  230. .type = CODA_FMT_RAW,
  231. },
  232. {
  233. .name = "H264 Encoded Stream",
  234. .fourcc = V4L2_PIX_FMT_H264,
  235. .type = CODA_FMT_ENC,
  236. },
  237. {
  238. .name = "MPEG4 Encoded Stream",
  239. .fourcc = V4L2_PIX_FMT_MPEG4,
  240. .type = CODA_FMT_ENC,
  241. },
  242. };
  243. static struct coda_fmt coda7_formats[] = {
  244. {
  245. .name = "YUV 4:2:0 Planar",
  246. .fourcc = V4L2_PIX_FMT_YUV420,
  247. .type = CODA_FMT_RAW,
  248. },
  249. {
  250. .name = "H264 Encoded Stream",
  251. .fourcc = V4L2_PIX_FMT_H264,
  252. .type = CODA_FMT_ENC,
  253. },
  254. {
  255. .name = "MPEG4 Encoded Stream",
  256. .fourcc = V4L2_PIX_FMT_MPEG4,
  257. .type = CODA_FMT_ENC,
  258. },
  259. };
  260. static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
  261. {
  262. struct coda_fmt *formats = dev->devtype->formats;
  263. int num_formats = dev->devtype->num_formats;
  264. unsigned int k;
  265. for (k = 0; k < num_formats; k++) {
  266. if (formats[k].fourcc == f->fmt.pix.pixelformat)
  267. break;
  268. }
  269. if (k == num_formats)
  270. return NULL;
  271. return &formats[k];
  272. }
  273. /*
  274. * V4L2 ioctl() operations.
  275. */
  276. static int vidioc_querycap(struct file *file, void *priv,
  277. struct v4l2_capability *cap)
  278. {
  279. strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
  280. strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
  281. strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
  282. /*
  283. * This is only a mem-to-mem video device. The capture and output
  284. * device capability flags are left only for backward compatibility
  285. * and are scheduled for removal.
  286. */
  287. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
  288. V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  289. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  290. return 0;
  291. }
  292. static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
  293. enum coda_fmt_type type)
  294. {
  295. struct coda_ctx *ctx = fh_to_ctx(priv);
  296. struct coda_dev *dev = ctx->dev;
  297. struct coda_fmt *formats = dev->devtype->formats;
  298. struct coda_fmt *fmt;
  299. int num_formats = dev->devtype->num_formats;
  300. int i, num = 0;
  301. for (i = 0; i < num_formats; i++) {
  302. if (formats[i].type == type) {
  303. if (num == f->index)
  304. break;
  305. ++num;
  306. }
  307. }
  308. if (i < num_formats) {
  309. fmt = &formats[i];
  310. strlcpy(f->description, fmt->name, sizeof(f->description));
  311. f->pixelformat = fmt->fourcc;
  312. return 0;
  313. }
  314. /* Format not found */
  315. return -EINVAL;
  316. }
  317. static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
  318. struct v4l2_fmtdesc *f)
  319. {
  320. return enum_fmt(priv, f, CODA_FMT_ENC);
  321. }
  322. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  323. struct v4l2_fmtdesc *f)
  324. {
  325. return enum_fmt(priv, f, CODA_FMT_RAW);
  326. }
  327. static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
  328. {
  329. struct vb2_queue *vq;
  330. struct coda_q_data *q_data;
  331. struct coda_ctx *ctx = fh_to_ctx(priv);
  332. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  333. if (!vq)
  334. return -EINVAL;
  335. q_data = get_q_data(ctx, f->type);
  336. f->fmt.pix.field = V4L2_FIELD_NONE;
  337. f->fmt.pix.pixelformat = q_data->fmt->fourcc;
  338. f->fmt.pix.width = q_data->width;
  339. f->fmt.pix.height = q_data->height;
  340. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
  341. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  342. else /* encoded formats h.264/mpeg4 */
  343. f->fmt.pix.bytesperline = 0;
  344. f->fmt.pix.sizeimage = q_data->sizeimage;
  345. f->fmt.pix.colorspace = ctx->colorspace;
  346. return 0;
  347. }
  348. static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
  349. {
  350. enum v4l2_field field;
  351. field = f->fmt.pix.field;
  352. if (field == V4L2_FIELD_ANY)
  353. field = V4L2_FIELD_NONE;
  354. else if (V4L2_FIELD_NONE != field)
  355. return -EINVAL;
  356. /* V4L2 specification suggests the driver corrects the format struct
  357. * if any of the dimensions is unsupported */
  358. f->fmt.pix.field = field;
  359. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
  360. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  361. W_ALIGN, &f->fmt.pix.height,
  362. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  363. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  364. f->fmt.pix.sizeimage = f->fmt.pix.width *
  365. f->fmt.pix.height * 3 / 2;
  366. } else { /*encoded formats h.264/mpeg4 */
  367. f->fmt.pix.bytesperline = 0;
  368. f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
  369. }
  370. return 0;
  371. }
  372. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  373. struct v4l2_format *f)
  374. {
  375. int ret;
  376. struct coda_fmt *fmt;
  377. struct coda_ctx *ctx = fh_to_ctx(priv);
  378. fmt = find_format(ctx->dev, f);
  379. /*
  380. * Since decoding support is not implemented yet do not allow
  381. * CODA_FMT_RAW formats in the capture interface.
  382. */
  383. if (!fmt || !(fmt->type == CODA_FMT_ENC))
  384. f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
  385. f->fmt.pix.colorspace = ctx->colorspace;
  386. ret = vidioc_try_fmt(ctx->dev, f);
  387. if (ret < 0)
  388. return ret;
  389. return 0;
  390. }
  391. static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
  392. struct v4l2_format *f)
  393. {
  394. struct coda_ctx *ctx = fh_to_ctx(priv);
  395. struct coda_fmt *fmt;
  396. int ret;
  397. fmt = find_format(ctx->dev, f);
  398. /*
  399. * Since decoding support is not implemented yet do not allow
  400. * CODA_FMT formats in the capture interface.
  401. */
  402. if (!fmt || !(fmt->type == CODA_FMT_RAW))
  403. f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
  404. if (!f->fmt.pix.colorspace)
  405. f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
  406. ret = vidioc_try_fmt(ctx->dev, f);
  407. if (ret < 0)
  408. return ret;
  409. return 0;
  410. }
  411. static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
  412. {
  413. struct coda_q_data *q_data;
  414. struct vb2_queue *vq;
  415. int ret;
  416. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  417. if (!vq)
  418. return -EINVAL;
  419. q_data = get_q_data(ctx, f->type);
  420. if (!q_data)
  421. return -EINVAL;
  422. if (vb2_is_busy(vq)) {
  423. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  424. return -EBUSY;
  425. }
  426. ret = vidioc_try_fmt(ctx->dev, f);
  427. if (ret)
  428. return ret;
  429. q_data->fmt = find_format(ctx->dev, f);
  430. q_data->width = f->fmt.pix.width;
  431. q_data->height = f->fmt.pix.height;
  432. q_data->sizeimage = f->fmt.pix.sizeimage;
  433. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  434. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  435. f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
  436. return 0;
  437. }
  438. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  439. struct v4l2_format *f)
  440. {
  441. int ret;
  442. ret = vidioc_try_fmt_vid_cap(file, priv, f);
  443. if (ret)
  444. return ret;
  445. return vidioc_s_fmt(fh_to_ctx(priv), f);
  446. }
  447. static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
  448. struct v4l2_format *f)
  449. {
  450. struct coda_ctx *ctx = fh_to_ctx(priv);
  451. int ret;
  452. ret = vidioc_try_fmt_vid_out(file, priv, f);
  453. if (ret)
  454. return ret;
  455. ret = vidioc_s_fmt(ctx, f);
  456. if (ret)
  457. ctx->colorspace = f->fmt.pix.colorspace;
  458. return ret;
  459. }
  460. static int vidioc_reqbufs(struct file *file, void *priv,
  461. struct v4l2_requestbuffers *reqbufs)
  462. {
  463. struct coda_ctx *ctx = fh_to_ctx(priv);
  464. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  465. }
  466. static int vidioc_querybuf(struct file *file, void *priv,
  467. struct v4l2_buffer *buf)
  468. {
  469. struct coda_ctx *ctx = fh_to_ctx(priv);
  470. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  471. }
  472. static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  473. {
  474. struct coda_ctx *ctx = fh_to_ctx(priv);
  475. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  476. }
  477. static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
  478. {
  479. struct coda_ctx *ctx = fh_to_ctx(priv);
  480. return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  481. }
  482. static int vidioc_streamon(struct file *file, void *priv,
  483. enum v4l2_buf_type type)
  484. {
  485. struct coda_ctx *ctx = fh_to_ctx(priv);
  486. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  487. }
  488. static int vidioc_streamoff(struct file *file, void *priv,
  489. enum v4l2_buf_type type)
  490. {
  491. struct coda_ctx *ctx = fh_to_ctx(priv);
  492. return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  493. }
  494. static const struct v4l2_ioctl_ops coda_ioctl_ops = {
  495. .vidioc_querycap = vidioc_querycap,
  496. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  497. .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
  498. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  499. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  500. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  501. .vidioc_g_fmt_vid_out = vidioc_g_fmt,
  502. .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
  503. .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
  504. .vidioc_reqbufs = vidioc_reqbufs,
  505. .vidioc_querybuf = vidioc_querybuf,
  506. .vidioc_qbuf = vidioc_qbuf,
  507. .vidioc_dqbuf = vidioc_dqbuf,
  508. .vidioc_streamon = vidioc_streamon,
  509. .vidioc_streamoff = vidioc_streamoff,
  510. };
  511. /*
  512. * Mem-to-mem operations.
  513. */
  514. static void coda_device_run(void *m2m_priv)
  515. {
  516. struct coda_ctx *ctx = m2m_priv;
  517. struct coda_q_data *q_data_src, *q_data_dst;
  518. struct vb2_buffer *src_buf, *dst_buf;
  519. struct coda_dev *dev = ctx->dev;
  520. int force_ipicture;
  521. int quant_param = 0;
  522. u32 picture_y, picture_cb, picture_cr;
  523. u32 pic_stream_buffer_addr, pic_stream_buffer_size;
  524. u32 dst_fourcc;
  525. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  526. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  527. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  528. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  529. dst_fourcc = q_data_dst->fmt->fourcc;
  530. src_buf->v4l2_buf.sequence = ctx->isequence;
  531. dst_buf->v4l2_buf.sequence = ctx->isequence;
  532. ctx->isequence++;
  533. /*
  534. * Workaround coda firmware BUG that only marks the first
  535. * frame as IDR. This is a problem for some decoders that can't
  536. * recover when a frame is lost.
  537. */
  538. if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
  539. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  540. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  541. } else {
  542. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  543. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  544. }
  545. /*
  546. * Copy headers at the beginning of the first frame for H.264 only.
  547. * In MPEG4 they are already copied by the coda.
  548. */
  549. if (src_buf->v4l2_buf.sequence == 0) {
  550. pic_stream_buffer_addr =
  551. vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
  552. ctx->vpu_header_size[0] +
  553. ctx->vpu_header_size[1] +
  554. ctx->vpu_header_size[2];
  555. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
  556. ctx->vpu_header_size[0] -
  557. ctx->vpu_header_size[1] -
  558. ctx->vpu_header_size[2];
  559. memcpy(vb2_plane_vaddr(dst_buf, 0),
  560. &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
  561. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
  562. &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
  563. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
  564. ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
  565. ctx->vpu_header_size[2]);
  566. } else {
  567. pic_stream_buffer_addr =
  568. vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  569. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
  570. }
  571. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  572. force_ipicture = 1;
  573. switch (dst_fourcc) {
  574. case V4L2_PIX_FMT_H264:
  575. quant_param = ctx->params.h264_intra_qp;
  576. break;
  577. case V4L2_PIX_FMT_MPEG4:
  578. quant_param = ctx->params.mpeg4_intra_qp;
  579. break;
  580. default:
  581. v4l2_warn(&ctx->dev->v4l2_dev,
  582. "cannot set intra qp, fmt not supported\n");
  583. break;
  584. }
  585. } else {
  586. force_ipicture = 0;
  587. switch (dst_fourcc) {
  588. case V4L2_PIX_FMT_H264:
  589. quant_param = ctx->params.h264_inter_qp;
  590. break;
  591. case V4L2_PIX_FMT_MPEG4:
  592. quant_param = ctx->params.mpeg4_inter_qp;
  593. break;
  594. default:
  595. v4l2_warn(&ctx->dev->v4l2_dev,
  596. "cannot set inter qp, fmt not supported\n");
  597. break;
  598. }
  599. }
  600. /* submit */
  601. coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
  602. coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
  603. picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
  604. picture_cb = picture_y + q_data_src->width * q_data_src->height;
  605. picture_cr = picture_cb + q_data_src->width / 2 *
  606. q_data_src->height / 2;
  607. coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
  608. coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
  609. coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
  610. coda_write(dev, force_ipicture << 1 & 0x2,
  611. CODA_CMD_ENC_PIC_OPTION);
  612. coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
  613. coda_write(dev, pic_stream_buffer_size / 1024,
  614. CODA_CMD_ENC_PIC_BB_SIZE);
  615. if (dev->devtype->product == CODA_7541) {
  616. coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
  617. CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
  618. CODA7_REG_BIT_AXI_SRAM_USE);
  619. }
  620. /* 1 second timeout in case CODA locks up */
  621. schedule_delayed_work(&dev->timeout, HZ);
  622. INIT_COMPLETION(dev->done);
  623. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  624. }
  625. static int coda_job_ready(void *m2m_priv)
  626. {
  627. struct coda_ctx *ctx = m2m_priv;
  628. /*
  629. * For both 'P' and 'key' frame cases 1 picture
  630. * and 1 frame are needed.
  631. */
  632. if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
  633. !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  634. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  635. "not ready: not enough video buffers.\n");
  636. return 0;
  637. }
  638. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  639. "job ready\n");
  640. return 1;
  641. }
  642. static void coda_job_abort(void *priv)
  643. {
  644. struct coda_ctx *ctx = priv;
  645. struct coda_dev *dev = ctx->dev;
  646. ctx->aborting = 1;
  647. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  648. "Aborting task\n");
  649. v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
  650. }
  651. static void coda_lock(void *m2m_priv)
  652. {
  653. struct coda_ctx *ctx = m2m_priv;
  654. struct coda_dev *pcdev = ctx->dev;
  655. mutex_lock(&pcdev->dev_mutex);
  656. }
  657. static void coda_unlock(void *m2m_priv)
  658. {
  659. struct coda_ctx *ctx = m2m_priv;
  660. struct coda_dev *pcdev = ctx->dev;
  661. mutex_unlock(&pcdev->dev_mutex);
  662. }
  663. static struct v4l2_m2m_ops coda_m2m_ops = {
  664. .device_run = coda_device_run,
  665. .job_ready = coda_job_ready,
  666. .job_abort = coda_job_abort,
  667. .lock = coda_lock,
  668. .unlock = coda_unlock,
  669. };
  670. static void set_default_params(struct coda_ctx *ctx)
  671. {
  672. struct coda_dev *dev = ctx->dev;
  673. ctx->params.codec_mode = CODA_MODE_INVALID;
  674. ctx->colorspace = V4L2_COLORSPACE_REC709;
  675. ctx->params.framerate = 30;
  676. ctx->aborting = 0;
  677. /* Default formats for output and input queues */
  678. ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
  679. ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
  680. ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
  681. ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
  682. ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
  683. ctx->q_data[V4L2_M2M_DST].width = MAX_W;
  684. ctx->q_data[V4L2_M2M_DST].height = MAX_H;
  685. ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
  686. }
  687. /*
  688. * Queue operations
  689. */
  690. static int coda_queue_setup(struct vb2_queue *vq,
  691. const struct v4l2_format *fmt,
  692. unsigned int *nbuffers, unsigned int *nplanes,
  693. unsigned int sizes[], void *alloc_ctxs[])
  694. {
  695. struct coda_ctx *ctx = vb2_get_drv_priv(vq);
  696. struct coda_q_data *q_data;
  697. unsigned int size;
  698. q_data = get_q_data(ctx, vq->type);
  699. size = q_data->sizeimage;
  700. *nplanes = 1;
  701. sizes[0] = size;
  702. alloc_ctxs[0] = ctx->dev->alloc_ctx;
  703. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  704. "get %d buffer(s) of size %d each.\n", *nbuffers, size);
  705. return 0;
  706. }
  707. static int coda_buf_prepare(struct vb2_buffer *vb)
  708. {
  709. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  710. struct coda_q_data *q_data;
  711. q_data = get_q_data(ctx, vb->vb2_queue->type);
  712. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  713. v4l2_warn(&ctx->dev->v4l2_dev,
  714. "%s data will not fit into plane (%lu < %lu)\n",
  715. __func__, vb2_plane_size(vb, 0),
  716. (long)q_data->sizeimage);
  717. return -EINVAL;
  718. }
  719. vb2_set_plane_payload(vb, 0, q_data->sizeimage);
  720. return 0;
  721. }
  722. static void coda_buf_queue(struct vb2_buffer *vb)
  723. {
  724. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  725. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  726. }
  727. static void coda_wait_prepare(struct vb2_queue *q)
  728. {
  729. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  730. coda_unlock(ctx);
  731. }
  732. static void coda_wait_finish(struct vb2_queue *q)
  733. {
  734. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  735. coda_lock(ctx);
  736. }
  737. static void coda_free_framebuffers(struct coda_ctx *ctx)
  738. {
  739. int i;
  740. for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
  741. if (ctx->internal_frames[i].vaddr) {
  742. dma_free_coherent(&ctx->dev->plat_dev->dev,
  743. ctx->internal_frames[i].size,
  744. ctx->internal_frames[i].vaddr,
  745. ctx->internal_frames[i].paddr);
  746. ctx->internal_frames[i].vaddr = NULL;
  747. }
  748. }
  749. }
  750. static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
  751. {
  752. struct coda_dev *dev = ctx->dev;
  753. int height = q_data->height;
  754. int width = q_data->width;
  755. u32 *p;
  756. int i;
  757. /* Allocate frame buffers */
  758. ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
  759. for (i = 0; i < ctx->num_internal_frames; i++) {
  760. ctx->internal_frames[i].size = q_data->sizeimage;
  761. if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
  762. ctx->internal_frames[i].size += width / 2 * height / 2;
  763. ctx->internal_frames[i].vaddr = dma_alloc_coherent(
  764. &dev->plat_dev->dev, ctx->internal_frames[i].size,
  765. &ctx->internal_frames[i].paddr, GFP_KERNEL);
  766. if (!ctx->internal_frames[i].vaddr) {
  767. coda_free_framebuffers(ctx);
  768. return -ENOMEM;
  769. }
  770. }
  771. /* Register frame buffers in the parameter buffer */
  772. p = ctx->parabuf.vaddr;
  773. if (dev->devtype->product == CODA_DX6) {
  774. for (i = 0; i < ctx->num_internal_frames; i++) {
  775. p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
  776. p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
  777. p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
  778. }
  779. } else {
  780. for (i = 0; i < ctx->num_internal_frames; i += 2) {
  781. p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
  782. p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
  783. p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
  784. if (fourcc == V4L2_PIX_FMT_H264)
  785. p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
  786. if (i + 1 < ctx->num_internal_frames) {
  787. p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
  788. p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
  789. p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
  790. if (fourcc == V4L2_PIX_FMT_H264)
  791. p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
  792. }
  793. }
  794. }
  795. return 0;
  796. }
  797. static int coda_h264_padding(int size, char *p)
  798. {
  799. int nal_size;
  800. int diff;
  801. diff = size - (size & ~0x7);
  802. if (diff == 0)
  803. return 0;
  804. nal_size = coda_filler_size[diff];
  805. memcpy(p, coda_filler_nal, nal_size);
  806. /* Add rbsp stop bit and trailing at the end */
  807. *(p + nal_size - 1) = 0x80;
  808. return nal_size;
  809. }
  810. static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
  811. {
  812. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  813. struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
  814. u32 bitstream_buf, bitstream_size;
  815. struct coda_dev *dev = ctx->dev;
  816. struct coda_q_data *q_data_src, *q_data_dst;
  817. struct vb2_buffer *buf;
  818. u32 dst_fourcc;
  819. u32 value;
  820. int ret;
  821. if (count < 1)
  822. return -EINVAL;
  823. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
  824. ctx->rawstreamon = 1;
  825. else
  826. ctx->compstreamon = 1;
  827. /* Don't start the coda unless both queues are on */
  828. if (!(ctx->rawstreamon & ctx->compstreamon))
  829. return 0;
  830. if (coda_isbusy(dev))
  831. if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
  832. return -EBUSY;
  833. ctx->gopcounter = ctx->params.gop_size - 1;
  834. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  835. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  836. bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
  837. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  838. bitstream_size = q_data_dst->sizeimage;
  839. dst_fourcc = q_data_dst->fmt->fourcc;
  840. /* Find out whether coda must encode or decode */
  841. if (q_data_src->fmt->type == CODA_FMT_RAW &&
  842. q_data_dst->fmt->type == CODA_FMT_ENC) {
  843. ctx->inst_type = CODA_INST_ENCODER;
  844. } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
  845. q_data_dst->fmt->type == CODA_FMT_RAW) {
  846. ctx->inst_type = CODA_INST_DECODER;
  847. v4l2_err(v4l2_dev, "decoding not supported.\n");
  848. return -EINVAL;
  849. } else {
  850. v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
  851. return -EINVAL;
  852. }
  853. if (!coda_is_initialized(dev)) {
  854. v4l2_err(v4l2_dev, "coda is not initialized.\n");
  855. return -EFAULT;
  856. }
  857. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  858. coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
  859. coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
  860. switch (dev->devtype->product) {
  861. case CODA_DX6:
  862. coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
  863. CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  864. break;
  865. default:
  866. coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
  867. CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  868. }
  869. if (dev->devtype->product == CODA_DX6) {
  870. /* Configure the coda */
  871. coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
  872. }
  873. /* Could set rotation here if needed */
  874. switch (dev->devtype->product) {
  875. case CODA_DX6:
  876. value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
  877. break;
  878. default:
  879. value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
  880. }
  881. value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  882. coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
  883. coda_write(dev, ctx->params.framerate,
  884. CODA_CMD_ENC_SEQ_SRC_F_RATE);
  885. switch (dst_fourcc) {
  886. case V4L2_PIX_FMT_MPEG4:
  887. if (dev->devtype->product == CODA_DX6)
  888. ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
  889. else
  890. ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
  891. coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
  892. coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
  893. break;
  894. case V4L2_PIX_FMT_H264:
  895. if (dev->devtype->product == CODA_DX6)
  896. ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
  897. else
  898. ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
  899. coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
  900. coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
  901. break;
  902. default:
  903. v4l2_err(v4l2_dev,
  904. "dst format (0x%08x) invalid.\n", dst_fourcc);
  905. return -EINVAL;
  906. }
  907. switch (ctx->params.slice_mode) {
  908. case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
  909. value = 0;
  910. break;
  911. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
  912. value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  913. value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  914. value |= 1 & CODA_SLICING_MODE_MASK;
  915. break;
  916. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
  917. value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  918. value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  919. value |= 1 & CODA_SLICING_MODE_MASK;
  920. break;
  921. }
  922. coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
  923. value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
  924. coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
  925. if (ctx->params.bitrate) {
  926. /* Rate control enabled */
  927. value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
  928. value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
  929. } else {
  930. value = 0;
  931. }
  932. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
  933. coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
  934. coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
  935. coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
  936. coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
  937. /* set default gamma */
  938. value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
  939. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
  940. value = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
  941. value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
  942. coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
  943. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  944. value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
  945. value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
  946. value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
  947. if (dev->devtype->product == CODA_DX6) {
  948. coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
  949. } else {
  950. coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
  951. coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
  952. }
  953. }
  954. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
  955. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  956. return -ETIMEDOUT;
  957. }
  958. if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
  959. return -EFAULT;
  960. ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
  961. if (ret < 0)
  962. return ret;
  963. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  964. coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
  965. if (dev->devtype->product != CODA_DX6) {
  966. coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
  967. coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  968. coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  969. coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  970. coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  971. coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  972. }
  973. if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
  974. v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  975. return -ETIMEDOUT;
  976. }
  977. /* Save stream headers */
  978. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  979. switch (dst_fourcc) {
  980. case V4L2_PIX_FMT_H264:
  981. /*
  982. * Get SPS in the first frame and copy it to an
  983. * intermediate buffer.
  984. */
  985. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  986. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  987. coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
  988. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  989. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  990. return -ETIMEDOUT;
  991. }
  992. ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  993. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  994. memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
  995. ctx->vpu_header_size[0]);
  996. /*
  997. * Get PPS in the first frame and copy it to an
  998. * intermediate buffer.
  999. */
  1000. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  1001. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  1002. coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
  1003. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  1004. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  1005. return -ETIMEDOUT;
  1006. }
  1007. ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  1008. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1009. memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
  1010. ctx->vpu_header_size[1]);
  1011. /*
  1012. * Length of H.264 headers is variable and thus it might not be
  1013. * aligned for the coda to append the encoded frame. In that is
  1014. * the case a filler NAL must be added to header 2.
  1015. */
  1016. ctx->vpu_header_size[2] = coda_h264_padding(
  1017. (ctx->vpu_header_size[0] +
  1018. ctx->vpu_header_size[1]),
  1019. ctx->vpu_header[2]);
  1020. break;
  1021. case V4L2_PIX_FMT_MPEG4:
  1022. /*
  1023. * Get VOS in the first frame and copy it to an
  1024. * intermediate buffer
  1025. */
  1026. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  1027. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  1028. coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
  1029. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  1030. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  1031. return -ETIMEDOUT;
  1032. }
  1033. ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  1034. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1035. memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
  1036. ctx->vpu_header_size[0]);
  1037. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  1038. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  1039. coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
  1040. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  1041. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
  1042. return -ETIMEDOUT;
  1043. }
  1044. ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  1045. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1046. memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
  1047. ctx->vpu_header_size[1]);
  1048. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
  1049. coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
  1050. coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
  1051. if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
  1052. v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
  1053. return -ETIMEDOUT;
  1054. }
  1055. ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
  1056. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1057. memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
  1058. ctx->vpu_header_size[2]);
  1059. break;
  1060. default:
  1061. /* No more formats need to save headers at the moment */
  1062. break;
  1063. }
  1064. return 0;
  1065. }
  1066. static int coda_stop_streaming(struct vb2_queue *q)
  1067. {
  1068. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1069. struct coda_dev *dev = ctx->dev;
  1070. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1071. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1072. "%s: output\n", __func__);
  1073. ctx->rawstreamon = 0;
  1074. } else {
  1075. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1076. "%s: capture\n", __func__);
  1077. ctx->compstreamon = 0;
  1078. }
  1079. /* Don't stop the coda unless both queues are off */
  1080. if (ctx->rawstreamon || ctx->compstreamon)
  1081. return 0;
  1082. if (coda_isbusy(dev)) {
  1083. if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
  1084. v4l2_warn(&dev->v4l2_dev,
  1085. "%s: timeout, sending SEQ_END anyway\n", __func__);
  1086. }
  1087. }
  1088. cancel_delayed_work(&dev->timeout);
  1089. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1090. "%s: sent command 'SEQ_END' to coda\n", __func__);
  1091. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  1092. v4l2_err(&dev->v4l2_dev,
  1093. "CODA_COMMAND_SEQ_END failed\n");
  1094. return -ETIMEDOUT;
  1095. }
  1096. coda_free_framebuffers(ctx);
  1097. return 0;
  1098. }
  1099. static struct vb2_ops coda_qops = {
  1100. .queue_setup = coda_queue_setup,
  1101. .buf_prepare = coda_buf_prepare,
  1102. .buf_queue = coda_buf_queue,
  1103. .wait_prepare = coda_wait_prepare,
  1104. .wait_finish = coda_wait_finish,
  1105. .start_streaming = coda_start_streaming,
  1106. .stop_streaming = coda_stop_streaming,
  1107. };
  1108. static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
  1109. {
  1110. struct coda_ctx *ctx =
  1111. container_of(ctrl->handler, struct coda_ctx, ctrls);
  1112. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1113. "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
  1114. switch (ctrl->id) {
  1115. case V4L2_CID_HFLIP:
  1116. if (ctrl->val)
  1117. ctx->params.rot_mode |= CODA_MIR_HOR;
  1118. else
  1119. ctx->params.rot_mode &= ~CODA_MIR_HOR;
  1120. break;
  1121. case V4L2_CID_VFLIP:
  1122. if (ctrl->val)
  1123. ctx->params.rot_mode |= CODA_MIR_VER;
  1124. else
  1125. ctx->params.rot_mode &= ~CODA_MIR_VER;
  1126. break;
  1127. case V4L2_CID_MPEG_VIDEO_BITRATE:
  1128. ctx->params.bitrate = ctrl->val / 1000;
  1129. break;
  1130. case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
  1131. ctx->params.gop_size = ctrl->val;
  1132. break;
  1133. case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
  1134. ctx->params.h264_intra_qp = ctrl->val;
  1135. break;
  1136. case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
  1137. ctx->params.h264_inter_qp = ctrl->val;
  1138. break;
  1139. case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
  1140. ctx->params.mpeg4_intra_qp = ctrl->val;
  1141. break;
  1142. case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
  1143. ctx->params.mpeg4_inter_qp = ctrl->val;
  1144. break;
  1145. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
  1146. ctx->params.slice_mode = ctrl->val;
  1147. break;
  1148. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
  1149. ctx->params.slice_max_mb = ctrl->val;
  1150. break;
  1151. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
  1152. ctx->params.slice_max_bits = ctrl->val * 8;
  1153. break;
  1154. case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
  1155. break;
  1156. default:
  1157. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1158. "Invalid control, id=%d, val=%d\n",
  1159. ctrl->id, ctrl->val);
  1160. return -EINVAL;
  1161. }
  1162. return 0;
  1163. }
  1164. static struct v4l2_ctrl_ops coda_ctrl_ops = {
  1165. .s_ctrl = coda_s_ctrl,
  1166. };
  1167. static int coda_ctrls_setup(struct coda_ctx *ctx)
  1168. {
  1169. v4l2_ctrl_handler_init(&ctx->ctrls, 9);
  1170. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1171. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1172. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1173. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1174. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1175. V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
  1176. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1177. V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
  1178. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1179. V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
  1180. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1181. V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
  1182. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1183. V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
  1184. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1185. V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
  1186. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1187. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
  1188. V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
  1189. V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
  1190. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1191. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
  1192. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1193. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
  1194. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1195. V4L2_CID_MPEG_VIDEO_HEADER_MODE,
  1196. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
  1197. (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
  1198. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
  1199. if (ctx->ctrls.error) {
  1200. v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
  1201. ctx->ctrls.error);
  1202. return -EINVAL;
  1203. }
  1204. return v4l2_ctrl_handler_setup(&ctx->ctrls);
  1205. }
  1206. static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
  1207. struct vb2_queue *dst_vq)
  1208. {
  1209. struct coda_ctx *ctx = priv;
  1210. int ret;
  1211. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  1212. src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  1213. src_vq->drv_priv = ctx;
  1214. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  1215. src_vq->ops = &coda_qops;
  1216. src_vq->mem_ops = &vb2_dma_contig_memops;
  1217. src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  1218. ret = vb2_queue_init(src_vq);
  1219. if (ret)
  1220. return ret;
  1221. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1222. dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
  1223. dst_vq->drv_priv = ctx;
  1224. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  1225. dst_vq->ops = &coda_qops;
  1226. dst_vq->mem_ops = &vb2_dma_contig_memops;
  1227. dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  1228. return vb2_queue_init(dst_vq);
  1229. }
  1230. static int coda_next_free_instance(struct coda_dev *dev)
  1231. {
  1232. return ffz(dev->instance_mask);
  1233. }
  1234. static int coda_open(struct file *file)
  1235. {
  1236. struct coda_dev *dev = video_drvdata(file);
  1237. struct coda_ctx *ctx = NULL;
  1238. int ret = 0;
  1239. int idx;
  1240. idx = coda_next_free_instance(dev);
  1241. if (idx >= CODA_MAX_INSTANCES)
  1242. return -EBUSY;
  1243. set_bit(idx, &dev->instance_mask);
  1244. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  1245. if (!ctx)
  1246. return -ENOMEM;
  1247. v4l2_fh_init(&ctx->fh, video_devdata(file));
  1248. file->private_data = &ctx->fh;
  1249. v4l2_fh_add(&ctx->fh);
  1250. ctx->dev = dev;
  1251. ctx->idx = idx;
  1252. set_default_params(ctx);
  1253. ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
  1254. &coda_queue_init);
  1255. if (IS_ERR(ctx->m2m_ctx)) {
  1256. int ret = PTR_ERR(ctx->m2m_ctx);
  1257. v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
  1258. __func__, ret);
  1259. goto err;
  1260. }
  1261. ret = coda_ctrls_setup(ctx);
  1262. if (ret) {
  1263. v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
  1264. goto err;
  1265. }
  1266. ctx->fh.ctrl_handler = &ctx->ctrls;
  1267. ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
  1268. CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
  1269. if (!ctx->parabuf.vaddr) {
  1270. v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
  1271. ret = -ENOMEM;
  1272. goto err;
  1273. }
  1274. coda_lock(ctx);
  1275. list_add(&ctx->list, &dev->instances);
  1276. coda_unlock(ctx);
  1277. clk_prepare_enable(dev->clk_per);
  1278. clk_prepare_enable(dev->clk_ahb);
  1279. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
  1280. ctx->idx, ctx);
  1281. return 0;
  1282. err:
  1283. v4l2_fh_del(&ctx->fh);
  1284. v4l2_fh_exit(&ctx->fh);
  1285. kfree(ctx);
  1286. return ret;
  1287. }
  1288. static int coda_release(struct file *file)
  1289. {
  1290. struct coda_dev *dev = video_drvdata(file);
  1291. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1292. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
  1293. ctx);
  1294. coda_lock(ctx);
  1295. list_del(&ctx->list);
  1296. coda_unlock(ctx);
  1297. dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
  1298. ctx->parabuf.vaddr, ctx->parabuf.paddr);
  1299. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  1300. v4l2_ctrl_handler_free(&ctx->ctrls);
  1301. clk_disable_unprepare(dev->clk_per);
  1302. clk_disable_unprepare(dev->clk_ahb);
  1303. v4l2_fh_del(&ctx->fh);
  1304. v4l2_fh_exit(&ctx->fh);
  1305. clear_bit(ctx->idx, &dev->instance_mask);
  1306. kfree(ctx);
  1307. return 0;
  1308. }
  1309. static unsigned int coda_poll(struct file *file,
  1310. struct poll_table_struct *wait)
  1311. {
  1312. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1313. int ret;
  1314. coda_lock(ctx);
  1315. ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  1316. coda_unlock(ctx);
  1317. return ret;
  1318. }
  1319. static int coda_mmap(struct file *file, struct vm_area_struct *vma)
  1320. {
  1321. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  1322. return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  1323. }
  1324. static const struct v4l2_file_operations coda_fops = {
  1325. .owner = THIS_MODULE,
  1326. .open = coda_open,
  1327. .release = coda_release,
  1328. .poll = coda_poll,
  1329. .unlocked_ioctl = video_ioctl2,
  1330. .mmap = coda_mmap,
  1331. };
  1332. static irqreturn_t coda_irq_handler(int irq, void *data)
  1333. {
  1334. struct vb2_buffer *src_buf, *dst_buf;
  1335. struct coda_dev *dev = data;
  1336. u32 wr_ptr, start_ptr;
  1337. struct coda_ctx *ctx;
  1338. cancel_delayed_work(&dev->timeout);
  1339. /* read status register to attend the IRQ */
  1340. coda_read(dev, CODA_REG_BIT_INT_STATUS);
  1341. coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
  1342. CODA_REG_BIT_INT_CLEAR);
  1343. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  1344. if (ctx == NULL) {
  1345. v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
  1346. return IRQ_HANDLED;
  1347. }
  1348. if (ctx->aborting) {
  1349. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1350. "task has been aborted\n");
  1351. return IRQ_HANDLED;
  1352. }
  1353. if (coda_isbusy(ctx->dev)) {
  1354. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1355. "coda is still busy!!!!\n");
  1356. return IRQ_NONE;
  1357. }
  1358. complete(&dev->done);
  1359. src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  1360. dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  1361. /* Get results from the coda */
  1362. coda_read(dev, CODA_RET_ENC_PIC_TYPE);
  1363. start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
  1364. wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
  1365. /* Calculate bytesused field */
  1366. if (dst_buf->v4l2_buf.sequence == 0) {
  1367. dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
  1368. ctx->vpu_header_size[0] +
  1369. ctx->vpu_header_size[1] +
  1370. ctx->vpu_header_size[2];
  1371. } else {
  1372. dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
  1373. }
  1374. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
  1375. wr_ptr - start_ptr);
  1376. coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
  1377. coda_read(dev, CODA_RET_ENC_PIC_FLAG);
  1378. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  1379. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  1380. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  1381. } else {
  1382. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  1383. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  1384. }
  1385. dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
  1386. dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
  1387. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  1388. v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
  1389. ctx->gopcounter--;
  1390. if (ctx->gopcounter < 0)
  1391. ctx->gopcounter = ctx->params.gop_size - 1;
  1392. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1393. "job finished: encoding frame (%d) (%s)\n",
  1394. dst_buf->v4l2_buf.sequence,
  1395. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  1396. "KEYFRAME" : "PFRAME");
  1397. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  1398. return IRQ_HANDLED;
  1399. }
  1400. static void coda_timeout(struct work_struct *work)
  1401. {
  1402. struct coda_ctx *ctx;
  1403. struct coda_dev *dev = container_of(to_delayed_work(work),
  1404. struct coda_dev, timeout);
  1405. if (completion_done(&dev->done))
  1406. return;
  1407. complete(&dev->done);
  1408. v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
  1409. mutex_lock(&dev->dev_mutex);
  1410. list_for_each_entry(ctx, &dev->instances, list) {
  1411. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1412. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1413. }
  1414. mutex_unlock(&dev->dev_mutex);
  1415. }
  1416. static u32 coda_supported_firmwares[] = {
  1417. CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
  1418. CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
  1419. };
  1420. static bool coda_firmware_supported(u32 vernum)
  1421. {
  1422. int i;
  1423. for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
  1424. if (vernum == coda_supported_firmwares[i])
  1425. return true;
  1426. return false;
  1427. }
  1428. static char *coda_product_name(int product)
  1429. {
  1430. static char buf[9];
  1431. switch (product) {
  1432. case CODA_DX6:
  1433. return "CodaDx6";
  1434. case CODA_7541:
  1435. return "CODA7541";
  1436. default:
  1437. snprintf(buf, sizeof(buf), "(0x%04x)", product);
  1438. return buf;
  1439. }
  1440. }
  1441. static int coda_hw_init(struct coda_dev *dev)
  1442. {
  1443. u16 product, major, minor, release;
  1444. u32 data;
  1445. u16 *p;
  1446. int i;
  1447. clk_prepare_enable(dev->clk_per);
  1448. clk_prepare_enable(dev->clk_ahb);
  1449. /*
  1450. * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
  1451. * The 16-bit chars in the code buffer are in memory access
  1452. * order, re-sort them to CODA order for register download.
  1453. * Data in this SRAM survives a reboot.
  1454. */
  1455. p = (u16 *)dev->codebuf.vaddr;
  1456. if (dev->devtype->product == CODA_DX6) {
  1457. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  1458. data = CODA_DOWN_ADDRESS_SET(i) |
  1459. CODA_DOWN_DATA_SET(p[i ^ 1]);
  1460. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  1461. }
  1462. } else {
  1463. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  1464. data = CODA_DOWN_ADDRESS_SET(i) |
  1465. CODA_DOWN_DATA_SET(p[round_down(i, 4) +
  1466. 3 - (i % 4)]);
  1467. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  1468. }
  1469. }
  1470. /* Tell the BIT where to find everything it needs */
  1471. coda_write(dev, dev->workbuf.paddr,
  1472. CODA_REG_BIT_WORK_BUF_ADDR);
  1473. coda_write(dev, dev->codebuf.paddr,
  1474. CODA_REG_BIT_CODE_BUF_ADDR);
  1475. coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
  1476. /* Set default values */
  1477. switch (dev->devtype->product) {
  1478. case CODA_DX6:
  1479. coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  1480. break;
  1481. default:
  1482. coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  1483. }
  1484. coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
  1485. if (dev->devtype->product != CODA_DX6)
  1486. coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
  1487. coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
  1488. CODA_REG_BIT_INT_ENABLE);
  1489. /* Reset VPU and start processor */
  1490. data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
  1491. data |= CODA_REG_RESET_ENABLE;
  1492. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  1493. udelay(10);
  1494. data &= ~CODA_REG_RESET_ENABLE;
  1495. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  1496. coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
  1497. /* Load firmware */
  1498. coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
  1499. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  1500. coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
  1501. coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
  1502. coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
  1503. if (coda_wait_timeout(dev)) {
  1504. clk_disable_unprepare(dev->clk_per);
  1505. clk_disable_unprepare(dev->clk_ahb);
  1506. v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
  1507. return -EIO;
  1508. }
  1509. /* Check we are compatible with the loaded firmware */
  1510. data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
  1511. product = CODA_FIRMWARE_PRODUCT(data);
  1512. major = CODA_FIRMWARE_MAJOR(data);
  1513. minor = CODA_FIRMWARE_MINOR(data);
  1514. release = CODA_FIRMWARE_RELEASE(data);
  1515. clk_disable_unprepare(dev->clk_per);
  1516. clk_disable_unprepare(dev->clk_ahb);
  1517. if (product != dev->devtype->product) {
  1518. v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
  1519. " Version: %u.%u.%u\n",
  1520. coda_product_name(dev->devtype->product),
  1521. coda_product_name(product), major, minor, release);
  1522. return -EINVAL;
  1523. }
  1524. v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
  1525. coda_product_name(product));
  1526. if (coda_firmware_supported(data)) {
  1527. v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
  1528. major, minor, release);
  1529. } else {
  1530. v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
  1531. "%u.%u.%u\n", major, minor, release);
  1532. }
  1533. return 0;
  1534. }
  1535. static void coda_fw_callback(const struct firmware *fw, void *context)
  1536. {
  1537. struct coda_dev *dev = context;
  1538. struct platform_device *pdev = dev->plat_dev;
  1539. int ret;
  1540. if (!fw) {
  1541. v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
  1542. return;
  1543. }
  1544. /* allocate auxiliary per-device code buffer for the BIT processor */
  1545. dev->codebuf.size = fw->size;
  1546. dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
  1547. &dev->codebuf.paddr,
  1548. GFP_KERNEL);
  1549. if (!dev->codebuf.vaddr) {
  1550. dev_err(&pdev->dev, "failed to allocate code buffer\n");
  1551. return;
  1552. }
  1553. /* Copy the whole firmware image to the code buffer */
  1554. memcpy(dev->codebuf.vaddr, fw->data, fw->size);
  1555. release_firmware(fw);
  1556. ret = coda_hw_init(dev);
  1557. if (ret) {
  1558. v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
  1559. return;
  1560. }
  1561. dev->vfd.fops = &coda_fops,
  1562. dev->vfd.ioctl_ops = &coda_ioctl_ops;
  1563. dev->vfd.release = video_device_release_empty,
  1564. dev->vfd.lock = &dev->dev_mutex;
  1565. dev->vfd.v4l2_dev = &dev->v4l2_dev;
  1566. dev->vfd.vfl_dir = VFL_DIR_M2M;
  1567. snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
  1568. video_set_drvdata(&dev->vfd, dev);
  1569. dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1570. if (IS_ERR(dev->alloc_ctx)) {
  1571. v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
  1572. return;
  1573. }
  1574. dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
  1575. if (IS_ERR(dev->m2m_dev)) {
  1576. v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
  1577. goto rel_ctx;
  1578. }
  1579. ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
  1580. if (ret) {
  1581. v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
  1582. goto rel_m2m;
  1583. }
  1584. v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
  1585. dev->vfd.num);
  1586. return;
  1587. rel_m2m:
  1588. v4l2_m2m_release(dev->m2m_dev);
  1589. rel_ctx:
  1590. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  1591. }
  1592. static int coda_firmware_request(struct coda_dev *dev)
  1593. {
  1594. char *fw = dev->devtype->firmware;
  1595. dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
  1596. coda_product_name(dev->devtype->product));
  1597. return request_firmware_nowait(THIS_MODULE, true,
  1598. fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
  1599. }
  1600. enum coda_platform {
  1601. CODA_IMX27,
  1602. CODA_IMX53,
  1603. };
  1604. static const struct coda_devtype coda_devdata[] = {
  1605. [CODA_IMX27] = {
  1606. .firmware = "v4l-codadx6-imx27.bin",
  1607. .product = CODA_DX6,
  1608. .formats = codadx6_formats,
  1609. .num_formats = ARRAY_SIZE(codadx6_formats),
  1610. },
  1611. [CODA_IMX53] = {
  1612. .firmware = "v4l-coda7541-imx53.bin",
  1613. .product = CODA_7541,
  1614. .formats = coda7_formats,
  1615. .num_formats = ARRAY_SIZE(coda7_formats),
  1616. },
  1617. };
  1618. static struct platform_device_id coda_platform_ids[] = {
  1619. { .name = "coda-imx27", .driver_data = CODA_IMX27 },
  1620. { .name = "coda-imx53", .driver_data = CODA_IMX53 },
  1621. { /* sentinel */ }
  1622. };
  1623. MODULE_DEVICE_TABLE(platform, coda_platform_ids);
  1624. #ifdef CONFIG_OF
  1625. static const struct of_device_id coda_dt_ids[] = {
  1626. { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
  1627. { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
  1628. { /* sentinel */ }
  1629. };
  1630. MODULE_DEVICE_TABLE(of, coda_dt_ids);
  1631. #endif
  1632. static int coda_probe(struct platform_device *pdev)
  1633. {
  1634. const struct of_device_id *of_id =
  1635. of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
  1636. const struct platform_device_id *pdev_id;
  1637. struct coda_platform_data *pdata = pdev->dev.platform_data;
  1638. struct device_node *np = pdev->dev.of_node;
  1639. struct gen_pool *pool;
  1640. struct coda_dev *dev;
  1641. struct resource *res;
  1642. int ret, irq;
  1643. dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
  1644. if (!dev) {
  1645. dev_err(&pdev->dev, "Not enough memory for %s\n",
  1646. CODA_NAME);
  1647. return -ENOMEM;
  1648. }
  1649. spin_lock_init(&dev->irqlock);
  1650. INIT_LIST_HEAD(&dev->instances);
  1651. INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
  1652. init_completion(&dev->done);
  1653. complete(&dev->done);
  1654. dev->plat_dev = pdev;
  1655. dev->clk_per = devm_clk_get(&pdev->dev, "per");
  1656. if (IS_ERR(dev->clk_per)) {
  1657. dev_err(&pdev->dev, "Could not get per clock\n");
  1658. return PTR_ERR(dev->clk_per);
  1659. }
  1660. dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
  1661. if (IS_ERR(dev->clk_ahb)) {
  1662. dev_err(&pdev->dev, "Could not get ahb clock\n");
  1663. return PTR_ERR(dev->clk_ahb);
  1664. }
  1665. /* Get memory for physical registers */
  1666. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1667. if (res == NULL) {
  1668. dev_err(&pdev->dev, "failed to get memory region resource\n");
  1669. return -ENOENT;
  1670. }
  1671. if (devm_request_mem_region(&pdev->dev, res->start,
  1672. resource_size(res), CODA_NAME) == NULL) {
  1673. dev_err(&pdev->dev, "failed to request memory region\n");
  1674. return -ENOENT;
  1675. }
  1676. dev->regs_base = devm_ioremap(&pdev->dev, res->start,
  1677. resource_size(res));
  1678. if (!dev->regs_base) {
  1679. dev_err(&pdev->dev, "failed to ioremap address region\n");
  1680. return -ENOENT;
  1681. }
  1682. /* IRQ */
  1683. irq = platform_get_irq(pdev, 0);
  1684. if (irq < 0) {
  1685. dev_err(&pdev->dev, "failed to get irq resource\n");
  1686. return -ENOENT;
  1687. }
  1688. if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
  1689. 0, CODA_NAME, dev) < 0) {
  1690. dev_err(&pdev->dev, "failed to request irq\n");
  1691. return -ENOENT;
  1692. }
  1693. /* Get IRAM pool from device tree or platform data */
  1694. pool = of_get_named_gen_pool(np, "iram", 0);
  1695. if (!pool && pdata)
  1696. pool = dev_get_gen_pool(pdata->iram_dev);
  1697. if (!pool) {
  1698. dev_err(&pdev->dev, "iram pool not available\n");
  1699. return -ENOMEM;
  1700. }
  1701. dev->iram_pool = pool;
  1702. ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
  1703. if (ret)
  1704. return ret;
  1705. mutex_init(&dev->dev_mutex);
  1706. pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
  1707. if (of_id) {
  1708. dev->devtype = of_id->data;
  1709. } else if (pdev_id) {
  1710. dev->devtype = &coda_devdata[pdev_id->driver_data];
  1711. } else {
  1712. v4l2_device_unregister(&dev->v4l2_dev);
  1713. return -EINVAL;
  1714. }
  1715. /* allocate auxiliary per-device buffers for the BIT processor */
  1716. switch (dev->devtype->product) {
  1717. case CODA_DX6:
  1718. dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
  1719. break;
  1720. default:
  1721. dev->workbuf.size = CODA7_WORK_BUF_SIZE;
  1722. }
  1723. dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
  1724. &dev->workbuf.paddr,
  1725. GFP_KERNEL);
  1726. if (!dev->workbuf.vaddr) {
  1727. dev_err(&pdev->dev, "failed to allocate work buffer\n");
  1728. v4l2_device_unregister(&dev->v4l2_dev);
  1729. return -ENOMEM;
  1730. }
  1731. if (dev->devtype->product == CODA_DX6)
  1732. dev->iram_size = CODADX6_IRAM_SIZE;
  1733. else
  1734. dev->iram_size = CODA7_IRAM_SIZE;
  1735. dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
  1736. if (!dev->iram_vaddr) {
  1737. dev_err(&pdev->dev, "unable to alloc iram\n");
  1738. return -ENOMEM;
  1739. }
  1740. dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
  1741. dev->iram_vaddr);
  1742. platform_set_drvdata(pdev, dev);
  1743. return coda_firmware_request(dev);
  1744. }
  1745. static int coda_remove(struct platform_device *pdev)
  1746. {
  1747. struct coda_dev *dev = platform_get_drvdata(pdev);
  1748. video_unregister_device(&dev->vfd);
  1749. if (dev->m2m_dev)
  1750. v4l2_m2m_release(dev->m2m_dev);
  1751. if (dev->alloc_ctx)
  1752. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  1753. v4l2_device_unregister(&dev->v4l2_dev);
  1754. if (dev->iram_vaddr)
  1755. gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
  1756. if (dev->codebuf.vaddr)
  1757. dma_free_coherent(&pdev->dev, dev->codebuf.size,
  1758. &dev->codebuf.vaddr, dev->codebuf.paddr);
  1759. if (dev->workbuf.vaddr)
  1760. dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
  1761. dev->workbuf.paddr);
  1762. return 0;
  1763. }
  1764. static struct platform_driver coda_driver = {
  1765. .probe = coda_probe,
  1766. .remove = coda_remove,
  1767. .driver = {
  1768. .name = CODA_NAME,
  1769. .owner = THIS_MODULE,
  1770. .of_match_table = of_match_ptr(coda_dt_ids),
  1771. },
  1772. .id_table = coda_platform_ids,
  1773. };
  1774. module_platform_driver(coda_driver);
  1775. MODULE_LICENSE("GPL");
  1776. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
  1777. MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");