nm256.c 44 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  51. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  52. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  53. static int playback_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  54. static int capture_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  55. static int force_ac97[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled as default */
  56. static int buffer_top[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* not specified */
  57. static int use_cache[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  58. static int vaio_hack[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  59. static int reset_workaround[SNDRV_CARDS];
  60. module_param_array(index, int, NULL, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param_array(id, charp, NULL, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param_array(enable, bool, NULL, 0444);
  65. MODULE_PARM_DESC(enable, "Enable this soundcard.");
  66. module_param_array(playback_bufsize, int, NULL, 0444);
  67. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param_array(capture_bufsize, int, NULL, 0444);
  69. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  70. module_param_array(force_ac97, bool, NULL, 0444);
  71. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  72. module_param_array(buffer_top, int, NULL, 0444);
  73. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  74. module_param_array(use_cache, bool, NULL, 0444);
  75. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  76. module_param_array(vaio_hack, bool, NULL, 0444);
  77. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  78. module_param_array(reset_workaround, bool, NULL, 0444);
  79. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  80. /*
  81. * hw definitions
  82. */
  83. /* The BIOS signature. */
  84. #define NM_SIGNATURE 0x4e4d0000
  85. /* Signature mask. */
  86. #define NM_SIG_MASK 0xffff0000
  87. /* Size of the second memory area. */
  88. #define NM_PORT2_SIZE 4096
  89. /* The base offset of the mixer in the second memory area. */
  90. #define NM_MIXER_OFFSET 0x600
  91. /* The maximum size of a coefficient entry. */
  92. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  93. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  94. /* The interrupt register. */
  95. #define NM_INT_REG 0xa04
  96. /* And its bits. */
  97. #define NM_PLAYBACK_INT 0x40
  98. #define NM_RECORD_INT 0x100
  99. #define NM_MISC_INT_1 0x4000
  100. #define NM_MISC_INT_2 0x1
  101. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  102. /* The AV's "mixer ready" status bit and location. */
  103. #define NM_MIXER_STATUS_OFFSET 0xa04
  104. #define NM_MIXER_READY_MASK 0x0800
  105. #define NM_MIXER_PRESENCE 0xa06
  106. #define NM_PRESENCE_MASK 0x0050
  107. #define NM_PRESENCE_VALUE 0x0040
  108. /*
  109. * For the ZX. It uses the same interrupt register, but it holds 32
  110. * bits instead of 16.
  111. */
  112. #define NM2_PLAYBACK_INT 0x10000
  113. #define NM2_RECORD_INT 0x80000
  114. #define NM2_MISC_INT_1 0x8
  115. #define NM2_MISC_INT_2 0x2
  116. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  117. /* The ZX's "mixer ready" status bit and location. */
  118. #define NM2_MIXER_STATUS_OFFSET 0xa06
  119. #define NM2_MIXER_READY_MASK 0x0800
  120. /* The playback registers start from here. */
  121. #define NM_PLAYBACK_REG_OFFSET 0x0
  122. /* The record registers start from here. */
  123. #define NM_RECORD_REG_OFFSET 0x200
  124. /* The rate register is located 2 bytes from the start of the register area. */
  125. #define NM_RATE_REG_OFFSET 2
  126. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  127. #define NM_RATE_STEREO 1
  128. #define NM_RATE_BITS_16 2
  129. #define NM_RATE_MASK 0xf0
  130. /* Playback enable register. */
  131. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  132. #define NM_PLAYBACK_ENABLE_FLAG 1
  133. #define NM_PLAYBACK_ONESHOT 2
  134. #define NM_PLAYBACK_FREERUN 4
  135. /* Mutes the audio output. */
  136. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  137. #define NM_AUDIO_MUTE_LEFT 0x8000
  138. #define NM_AUDIO_MUTE_RIGHT 0x0080
  139. /* Recording enable register. */
  140. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  141. #define NM_RECORD_ENABLE_FLAG 1
  142. #define NM_RECORD_FREERUN 2
  143. /* coefficient buffer pointer */
  144. #define NM_COEFF_START_OFFSET 0x1c
  145. #define NM_COEFF_END_OFFSET 0x20
  146. /* DMA buffer offsets */
  147. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  148. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  149. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  150. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  151. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  152. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  153. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  154. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  155. /*
  156. * type definitions
  157. */
  158. typedef struct snd_nm256 nm256_t;
  159. typedef struct snd_nm256_stream nm256_stream_t;
  160. struct snd_nm256_stream {
  161. nm256_t *chip;
  162. snd_pcm_substream_t *substream;
  163. int running;
  164. int suspended;
  165. u32 buf; /* offset from chip->buffer */
  166. int bufsize; /* buffer size in bytes */
  167. void __iomem *bufptr; /* mapped pointer */
  168. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  169. int dma_size; /* buffer size of the substream in bytes */
  170. int period_size; /* period size in bytes */
  171. int periods; /* # of periods */
  172. int shift; /* bit shifts */
  173. int cur_period; /* current period # */
  174. };
  175. struct snd_nm256 {
  176. snd_card_t *card;
  177. void __iomem *cport; /* control port */
  178. struct resource *res_cport; /* its resource */
  179. unsigned long cport_addr; /* physical address */
  180. void __iomem *buffer; /* buffer */
  181. struct resource *res_buffer; /* its resource */
  182. unsigned long buffer_addr; /* buffer phyiscal address */
  183. u32 buffer_start; /* start offset from pci resource 0 */
  184. u32 buffer_end; /* end offset */
  185. u32 buffer_size; /* total buffer size */
  186. u32 all_coeff_buf; /* coefficient buffer */
  187. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  188. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  189. unsigned int use_cache: 1; /* use one big coef. table */
  190. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  191. int mixer_base; /* register offset of ac97 mixer */
  192. int mixer_status_offset; /* offset of mixer status reg. */
  193. int mixer_status_mask; /* bit mask to test the mixer status */
  194. int irq;
  195. int irq_acks;
  196. irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
  197. int badintrcount; /* counter to check bogus interrupts */
  198. struct semaphore irq_mutex;
  199. nm256_stream_t streams[2];
  200. ac97_t *ac97;
  201. snd_pcm_t *pcm;
  202. struct pci_dev *pci;
  203. spinlock_t reg_lock;
  204. };
  205. /*
  206. * include coefficient table
  207. */
  208. #include "nm256_coef.c"
  209. /*
  210. * PCI ids
  211. */
  212. #ifndef PCI_VENDOR_ID_NEOMAGIC
  213. #define PCI_VENDOR_ID_NEOMEGIC 0x10c8
  214. #endif
  215. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO
  216. #define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
  217. #endif
  218. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO
  219. #define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
  220. #endif
  221. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO
  222. #define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
  223. #endif
  224. static struct pci_device_id snd_nm256_ids[] = {
  225. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  226. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  227. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  228. {0,},
  229. };
  230. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  231. /*
  232. * lowlvel stuffs
  233. */
  234. static inline u8
  235. snd_nm256_readb(nm256_t *chip, int offset)
  236. {
  237. return readb(chip->cport + offset);
  238. }
  239. static inline u16
  240. snd_nm256_readw(nm256_t *chip, int offset)
  241. {
  242. return readw(chip->cport + offset);
  243. }
  244. static inline u32
  245. snd_nm256_readl(nm256_t *chip, int offset)
  246. {
  247. return readl(chip->cport + offset);
  248. }
  249. static inline void
  250. snd_nm256_writeb(nm256_t *chip, int offset, u8 val)
  251. {
  252. writeb(val, chip->cport + offset);
  253. }
  254. static inline void
  255. snd_nm256_writew(nm256_t *chip, int offset, u16 val)
  256. {
  257. writew(val, chip->cport + offset);
  258. }
  259. static inline void
  260. snd_nm256_writel(nm256_t *chip, int offset, u32 val)
  261. {
  262. writel(val, chip->cport + offset);
  263. }
  264. static inline void
  265. snd_nm256_write_buffer(nm256_t *chip, void *src, int offset, int size)
  266. {
  267. offset -= chip->buffer_start;
  268. #ifdef SNDRV_CONFIG_DEBUG
  269. if (offset < 0 || offset >= chip->buffer_size) {
  270. snd_printk("write_buffer invalid offset = %d size = %d\n", offset, size);
  271. return;
  272. }
  273. #endif
  274. memcpy_toio(chip->buffer + offset, src, size);
  275. }
  276. /*
  277. * coefficient handlers -- what a magic!
  278. */
  279. static u16
  280. snd_nm256_get_start_offset(int which)
  281. {
  282. u16 offset = 0;
  283. while (which-- > 0)
  284. offset += coefficient_sizes[which];
  285. return offset;
  286. }
  287. static void
  288. snd_nm256_load_one_coefficient(nm256_t *chip, int stream, u32 port, int which)
  289. {
  290. u32 coeff_buf = chip->coeff_buf[stream];
  291. u16 offset = snd_nm256_get_start_offset(which);
  292. u16 size = coefficient_sizes[which];
  293. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  294. snd_nm256_writel(chip, port, coeff_buf);
  295. /* ??? Record seems to behave differently than playback. */
  296. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  297. size--;
  298. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  299. }
  300. static void
  301. snd_nm256_load_coefficient(nm256_t *chip, int stream, int number)
  302. {
  303. /* The enable register for the specified engine. */
  304. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  305. u32 addr = NM_COEFF_START_OFFSET;
  306. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  307. if (snd_nm256_readb(chip, poffset) & 1) {
  308. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  309. return;
  310. }
  311. /* The recording engine uses coefficient values 8-15. */
  312. number &= 7;
  313. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  314. number += 8;
  315. if (! chip->use_cache) {
  316. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  317. return;
  318. }
  319. if (! chip->coeffs_current) {
  320. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  321. NM_TOTAL_COEFF_COUNT * 4);
  322. chip->coeffs_current = 1;
  323. } else {
  324. u32 base = chip->all_coeff_buf;
  325. u32 offset = snd_nm256_get_start_offset(number);
  326. u32 end_offset = offset + coefficient_sizes[number];
  327. snd_nm256_writel(chip, addr, base + offset);
  328. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  329. end_offset--;
  330. snd_nm256_writel(chip, addr + 4, base + end_offset);
  331. }
  332. }
  333. /* The actual rates supported by the card. */
  334. static unsigned int samplerates[8] = {
  335. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  336. };
  337. static snd_pcm_hw_constraint_list_t constraints_rates = {
  338. .count = ARRAY_SIZE(samplerates),
  339. .list = samplerates,
  340. .mask = 0,
  341. };
  342. /*
  343. * return the index of the target rate
  344. */
  345. static int
  346. snd_nm256_fixed_rate(unsigned int rate)
  347. {
  348. unsigned int i;
  349. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  350. if (rate == samplerates[i])
  351. return i;
  352. }
  353. snd_BUG();
  354. return 0;
  355. }
  356. /*
  357. * set sample rate and format
  358. */
  359. static void
  360. snd_nm256_set_format(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  361. {
  362. snd_pcm_runtime_t *runtime = substream->runtime;
  363. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  364. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  365. s->shift = 0;
  366. if (snd_pcm_format_width(runtime->format) == 16) {
  367. ratebits |= NM_RATE_BITS_16;
  368. s->shift++;
  369. }
  370. if (runtime->channels > 1) {
  371. ratebits |= NM_RATE_STEREO;
  372. s->shift++;
  373. }
  374. runtime->rate = samplerates[rate_index];
  375. switch (substream->stream) {
  376. case SNDRV_PCM_STREAM_PLAYBACK:
  377. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  378. snd_nm256_writeb(chip,
  379. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  380. ratebits);
  381. break;
  382. case SNDRV_PCM_STREAM_CAPTURE:
  383. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  384. snd_nm256_writeb(chip,
  385. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  386. ratebits);
  387. break;
  388. }
  389. }
  390. /* acquire interrupt */
  391. static int snd_nm256_acquire_irq(nm256_t *chip)
  392. {
  393. down(&chip->irq_mutex);
  394. if (chip->irq < 0) {
  395. if (request_irq(chip->pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ,
  396. chip->card->driver, (void*)chip)) {
  397. snd_printk("unable to grab IRQ %d\n", chip->pci->irq);
  398. up(&chip->irq_mutex);
  399. return -EBUSY;
  400. }
  401. chip->irq = chip->pci->irq;
  402. }
  403. chip->irq_acks++;
  404. up(&chip->irq_mutex);
  405. return 0;
  406. }
  407. /* release interrupt */
  408. static void snd_nm256_release_irq(nm256_t *chip)
  409. {
  410. down(&chip->irq_mutex);
  411. if (chip->irq_acks > 0)
  412. chip->irq_acks--;
  413. if (chip->irq_acks == 0 && chip->irq >= 0) {
  414. free_irq(chip->irq, (void*)chip);
  415. chip->irq = -1;
  416. }
  417. up(&chip->irq_mutex);
  418. }
  419. /*
  420. * start / stop
  421. */
  422. /* update the watermark (current period) */
  423. static void snd_nm256_pcm_mark(nm256_t *chip, nm256_stream_t *s, int reg)
  424. {
  425. s->cur_period++;
  426. s->cur_period %= s->periods;
  427. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  428. }
  429. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  430. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  431. static void
  432. snd_nm256_playback_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  433. {
  434. /* program buffer pointers */
  435. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  436. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  437. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  438. snd_nm256_playback_mark(chip, s);
  439. /* Enable playback engine and interrupts. */
  440. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  441. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  442. /* Enable both channels. */
  443. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  444. }
  445. static void
  446. snd_nm256_capture_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  447. {
  448. /* program buffer pointers */
  449. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  450. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  451. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  452. snd_nm256_capture_mark(chip, s);
  453. /* Enable playback engine and interrupts. */
  454. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  455. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  456. }
  457. /* Stop the play engine. */
  458. static void
  459. snd_nm256_playback_stop(nm256_t *chip)
  460. {
  461. /* Shut off sound from both channels. */
  462. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  463. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  464. /* Disable play engine. */
  465. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  466. }
  467. static void
  468. snd_nm256_capture_stop(nm256_t *chip)
  469. {
  470. /* Disable recording engine. */
  471. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  472. }
  473. static int
  474. snd_nm256_playback_trigger(snd_pcm_substream_t *substream, int cmd)
  475. {
  476. nm256_t *chip = snd_pcm_substream_chip(substream);
  477. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  478. int err = 0;
  479. snd_assert(s != NULL, return -ENXIO);
  480. spin_lock(&chip->reg_lock);
  481. switch (cmd) {
  482. case SNDRV_PCM_TRIGGER_RESUME:
  483. s->suspended = 0;
  484. /* fallthru */
  485. case SNDRV_PCM_TRIGGER_START:
  486. if (! s->running) {
  487. snd_nm256_playback_start(chip, s, substream);
  488. s->running = 1;
  489. }
  490. break;
  491. case SNDRV_PCM_TRIGGER_SUSPEND:
  492. s->suspended = 1;
  493. /* fallthru */
  494. case SNDRV_PCM_TRIGGER_STOP:
  495. if (s->running) {
  496. snd_nm256_playback_stop(chip);
  497. s->running = 0;
  498. }
  499. break;
  500. default:
  501. err = -EINVAL;
  502. break;
  503. }
  504. spin_unlock(&chip->reg_lock);
  505. return err;
  506. }
  507. static int
  508. snd_nm256_capture_trigger(snd_pcm_substream_t *substream, int cmd)
  509. {
  510. nm256_t *chip = snd_pcm_substream_chip(substream);
  511. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  512. int err = 0;
  513. snd_assert(s != NULL, return -ENXIO);
  514. spin_lock(&chip->reg_lock);
  515. switch (cmd) {
  516. case SNDRV_PCM_TRIGGER_START:
  517. case SNDRV_PCM_TRIGGER_RESUME:
  518. if (! s->running) {
  519. snd_nm256_capture_start(chip, s, substream);
  520. s->running = 1;
  521. }
  522. break;
  523. case SNDRV_PCM_TRIGGER_STOP:
  524. case SNDRV_PCM_TRIGGER_SUSPEND:
  525. if (s->running) {
  526. snd_nm256_capture_stop(chip);
  527. s->running = 0;
  528. }
  529. break;
  530. default:
  531. err = -EINVAL;
  532. break;
  533. }
  534. spin_unlock(&chip->reg_lock);
  535. return err;
  536. }
  537. /*
  538. * prepare playback/capture channel
  539. */
  540. static int snd_nm256_pcm_prepare(snd_pcm_substream_t *substream)
  541. {
  542. nm256_t *chip = snd_pcm_substream_chip(substream);
  543. snd_pcm_runtime_t *runtime = substream->runtime;
  544. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  545. snd_assert(s, return -ENXIO);
  546. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  547. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  548. s->periods = substream->runtime->periods;
  549. s->cur_period = 0;
  550. spin_lock_irq(&chip->reg_lock);
  551. s->running = 0;
  552. snd_nm256_set_format(chip, s, substream);
  553. spin_unlock_irq(&chip->reg_lock);
  554. return 0;
  555. }
  556. /*
  557. * get the current pointer
  558. */
  559. static snd_pcm_uframes_t
  560. snd_nm256_playback_pointer(snd_pcm_substream_t * substream)
  561. {
  562. nm256_t *chip = snd_pcm_substream_chip(substream);
  563. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  564. unsigned long curp;
  565. snd_assert(s, return 0);
  566. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  567. curp %= s->dma_size;
  568. return bytes_to_frames(substream->runtime, curp);
  569. }
  570. static snd_pcm_uframes_t
  571. snd_nm256_capture_pointer(snd_pcm_substream_t * substream)
  572. {
  573. nm256_t *chip = snd_pcm_substream_chip(substream);
  574. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  575. unsigned long curp;
  576. snd_assert(s != NULL, return 0);
  577. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  578. curp %= s->dma_size;
  579. return bytes_to_frames(substream->runtime, curp);
  580. }
  581. /* Remapped I/O space can be accessible as pointer on i386 */
  582. /* This might be changed in the future */
  583. #ifndef __i386__
  584. /*
  585. * silence / copy for playback
  586. */
  587. static int
  588. snd_nm256_playback_silence(snd_pcm_substream_t *substream,
  589. int channel, /* not used (interleaved data) */
  590. snd_pcm_uframes_t pos,
  591. snd_pcm_uframes_t count)
  592. {
  593. snd_pcm_runtime_t *runtime = substream->runtime;
  594. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  595. count = frames_to_bytes(runtime, count);
  596. pos = frames_to_bytes(runtime, pos);
  597. memset_io(s->bufptr + pos, 0, count);
  598. return 0;
  599. }
  600. static int
  601. snd_nm256_playback_copy(snd_pcm_substream_t *substream,
  602. int channel, /* not used (interleaved data) */
  603. snd_pcm_uframes_t pos,
  604. void __user *src,
  605. snd_pcm_uframes_t count)
  606. {
  607. snd_pcm_runtime_t *runtime = substream->runtime;
  608. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  609. count = frames_to_bytes(runtime, count);
  610. pos = frames_to_bytes(runtime, pos);
  611. if (copy_from_user_toio(s->bufptr + pos, src, count))
  612. return -EFAULT;
  613. return 0;
  614. }
  615. /*
  616. * copy to user
  617. */
  618. static int
  619. snd_nm256_capture_copy(snd_pcm_substream_t *substream,
  620. int channel, /* not used (interleaved data) */
  621. snd_pcm_uframes_t pos,
  622. void __user *dst,
  623. snd_pcm_uframes_t count)
  624. {
  625. snd_pcm_runtime_t *runtime = substream->runtime;
  626. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  627. count = frames_to_bytes(runtime, count);
  628. pos = frames_to_bytes(runtime, pos);
  629. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  630. return -EFAULT;
  631. return 0;
  632. }
  633. #endif /* !__i386__ */
  634. /*
  635. * update playback/capture watermarks
  636. */
  637. /* spinlock held! */
  638. static void
  639. snd_nm256_playback_update(nm256_t *chip)
  640. {
  641. nm256_stream_t *s;
  642. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  643. if (s->running && s->substream) {
  644. spin_unlock(&chip->reg_lock);
  645. snd_pcm_period_elapsed(s->substream);
  646. spin_lock(&chip->reg_lock);
  647. snd_nm256_playback_mark(chip, s);
  648. }
  649. }
  650. /* spinlock held! */
  651. static void
  652. snd_nm256_capture_update(nm256_t *chip)
  653. {
  654. nm256_stream_t *s;
  655. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  656. if (s->running && s->substream) {
  657. spin_unlock(&chip->reg_lock);
  658. snd_pcm_period_elapsed(s->substream);
  659. spin_lock(&chip->reg_lock);
  660. snd_nm256_capture_mark(chip, s);
  661. }
  662. }
  663. /*
  664. * hardware info
  665. */
  666. static snd_pcm_hardware_t snd_nm256_playback =
  667. {
  668. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  669. SNDRV_PCM_INFO_INTERLEAVED |
  670. /*SNDRV_PCM_INFO_PAUSE |*/
  671. SNDRV_PCM_INFO_RESUME,
  672. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  673. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  674. .rate_min = 8000,
  675. .rate_max = 48000,
  676. .channels_min = 1,
  677. .channels_max = 2,
  678. .periods_min = 2,
  679. .periods_max = 1024,
  680. .buffer_bytes_max = 128 * 1024,
  681. .period_bytes_min = 256,
  682. .period_bytes_max = 128 * 1024,
  683. };
  684. static snd_pcm_hardware_t snd_nm256_capture =
  685. {
  686. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  687. SNDRV_PCM_INFO_INTERLEAVED |
  688. /*SNDRV_PCM_INFO_PAUSE |*/
  689. SNDRV_PCM_INFO_RESUME,
  690. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  691. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  692. .rate_min = 8000,
  693. .rate_max = 48000,
  694. .channels_min = 1,
  695. .channels_max = 2,
  696. .periods_min = 2,
  697. .periods_max = 1024,
  698. .buffer_bytes_max = 128 * 1024,
  699. .period_bytes_min = 256,
  700. .period_bytes_max = 128 * 1024,
  701. };
  702. /* set dma transfer size */
  703. static int snd_nm256_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params)
  704. {
  705. /* area and addr are already set and unchanged */
  706. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  707. return 0;
  708. }
  709. /*
  710. * open
  711. */
  712. static void snd_nm256_setup_stream(nm256_t *chip, nm256_stream_t *s,
  713. snd_pcm_substream_t *substream,
  714. snd_pcm_hardware_t *hw_ptr)
  715. {
  716. snd_pcm_runtime_t *runtime = substream->runtime;
  717. s->running = 0;
  718. runtime->hw = *hw_ptr;
  719. runtime->hw.buffer_bytes_max = s->bufsize;
  720. runtime->hw.period_bytes_max = s->bufsize / 2;
  721. runtime->dma_area = (void*) s->bufptr;
  722. runtime->dma_addr = s->bufptr_addr;
  723. runtime->dma_bytes = s->bufsize;
  724. runtime->private_data = s;
  725. s->substream = substream;
  726. snd_pcm_set_sync(substream);
  727. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  728. &constraints_rates);
  729. }
  730. static int
  731. snd_nm256_playback_open(snd_pcm_substream_t *substream)
  732. {
  733. nm256_t *chip = snd_pcm_substream_chip(substream);
  734. if (snd_nm256_acquire_irq(chip) < 0)
  735. return -EBUSY;
  736. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  737. substream, &snd_nm256_playback);
  738. return 0;
  739. }
  740. static int
  741. snd_nm256_capture_open(snd_pcm_substream_t *substream)
  742. {
  743. nm256_t *chip = snd_pcm_substream_chip(substream);
  744. if (snd_nm256_acquire_irq(chip) < 0)
  745. return -EBUSY;
  746. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  747. substream, &snd_nm256_capture);
  748. return 0;
  749. }
  750. /*
  751. * close - we don't have to do special..
  752. */
  753. static int
  754. snd_nm256_playback_close(snd_pcm_substream_t *substream)
  755. {
  756. nm256_t *chip = snd_pcm_substream_chip(substream);
  757. snd_nm256_release_irq(chip);
  758. return 0;
  759. }
  760. static int
  761. snd_nm256_capture_close(snd_pcm_substream_t *substream)
  762. {
  763. nm256_t *chip = snd_pcm_substream_chip(substream);
  764. snd_nm256_release_irq(chip);
  765. return 0;
  766. }
  767. /*
  768. * create a pcm instance
  769. */
  770. static snd_pcm_ops_t snd_nm256_playback_ops = {
  771. .open = snd_nm256_playback_open,
  772. .close = snd_nm256_playback_close,
  773. .ioctl = snd_pcm_lib_ioctl,
  774. .hw_params = snd_nm256_pcm_hw_params,
  775. .prepare = snd_nm256_pcm_prepare,
  776. .trigger = snd_nm256_playback_trigger,
  777. .pointer = snd_nm256_playback_pointer,
  778. #ifndef __i386__
  779. .copy = snd_nm256_playback_copy,
  780. .silence = snd_nm256_playback_silence,
  781. #endif
  782. .mmap = snd_pcm_lib_mmap_iomem,
  783. };
  784. static snd_pcm_ops_t snd_nm256_capture_ops = {
  785. .open = snd_nm256_capture_open,
  786. .close = snd_nm256_capture_close,
  787. .ioctl = snd_pcm_lib_ioctl,
  788. .hw_params = snd_nm256_pcm_hw_params,
  789. .prepare = snd_nm256_pcm_prepare,
  790. .trigger = snd_nm256_capture_trigger,
  791. .pointer = snd_nm256_capture_pointer,
  792. #ifndef __i386__
  793. .copy = snd_nm256_capture_copy,
  794. #endif
  795. .mmap = snd_pcm_lib_mmap_iomem,
  796. };
  797. static int __devinit
  798. snd_nm256_pcm(nm256_t *chip, int device)
  799. {
  800. snd_pcm_t *pcm;
  801. int i, err;
  802. for (i = 0; i < 2; i++) {
  803. nm256_stream_t *s = &chip->streams[i];
  804. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  805. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  806. }
  807. err = snd_pcm_new(chip->card, chip->card->driver, device,
  808. 1, 1, &pcm);
  809. if (err < 0)
  810. return err;
  811. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  812. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  813. pcm->private_data = chip;
  814. pcm->info_flags = 0;
  815. chip->pcm = pcm;
  816. return 0;
  817. }
  818. /*
  819. * Initialize the hardware.
  820. */
  821. static void
  822. snd_nm256_init_chip(nm256_t *chip)
  823. {
  824. /* Reset everything. */
  825. snd_nm256_writeb(chip, 0x0, 0x11);
  826. snd_nm256_writew(chip, 0x214, 0);
  827. /* stop sounds.. */
  828. //snd_nm256_playback_stop(chip);
  829. //snd_nm256_capture_stop(chip);
  830. }
  831. static irqreturn_t
  832. snd_nm256_intr_check(nm256_t *chip)
  833. {
  834. if (chip->badintrcount++ > 1000) {
  835. /*
  836. * I'm not sure if the best thing is to stop the card from
  837. * playing or just release the interrupt (after all, we're in
  838. * a bad situation, so doing fancy stuff may not be such a good
  839. * idea).
  840. *
  841. * I worry about the card engine continuing to play noise
  842. * over and over, however--that could become a very
  843. * obnoxious problem. And we know that when this usually
  844. * happens things are fairly safe, it just means the user's
  845. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  846. */
  847. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  848. snd_nm256_playback_stop(chip);
  849. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  850. snd_nm256_capture_stop(chip);
  851. chip->badintrcount = 0;
  852. return IRQ_HANDLED;
  853. }
  854. return IRQ_NONE;
  855. }
  856. /*
  857. * Handle a potential interrupt for the device referred to by DEV_ID.
  858. *
  859. * I don't like the cut-n-paste job here either between the two routines,
  860. * but there are sufficient differences between the two interrupt handlers
  861. * that parameterizing it isn't all that great either. (Could use a macro,
  862. * I suppose...yucky bleah.)
  863. */
  864. static irqreturn_t
  865. snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
  866. {
  867. nm256_t *chip = dev_id;
  868. u16 status;
  869. u8 cbyte;
  870. status = snd_nm256_readw(chip, NM_INT_REG);
  871. /* Not ours. */
  872. if (status == 0)
  873. return snd_nm256_intr_check(chip);
  874. chip->badintrcount = 0;
  875. /* Rather boring; check for individual interrupts and process them. */
  876. spin_lock(&chip->reg_lock);
  877. if (status & NM_PLAYBACK_INT) {
  878. status &= ~NM_PLAYBACK_INT;
  879. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  880. snd_nm256_playback_update(chip);
  881. }
  882. if (status & NM_RECORD_INT) {
  883. status &= ~NM_RECORD_INT;
  884. NM_ACK_INT(chip, NM_RECORD_INT);
  885. snd_nm256_capture_update(chip);
  886. }
  887. if (status & NM_MISC_INT_1) {
  888. status &= ~NM_MISC_INT_1;
  889. NM_ACK_INT(chip, NM_MISC_INT_1);
  890. snd_printd("NM256: Got misc interrupt #1\n");
  891. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  892. cbyte = snd_nm256_readb(chip, 0x400);
  893. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  894. }
  895. if (status & NM_MISC_INT_2) {
  896. status &= ~NM_MISC_INT_2;
  897. NM_ACK_INT(chip, NM_MISC_INT_2);
  898. snd_printd("NM256: Got misc interrupt #2\n");
  899. cbyte = snd_nm256_readb(chip, 0x400);
  900. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  901. }
  902. /* Unknown interrupt. */
  903. if (status) {
  904. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  905. status);
  906. /* Pray. */
  907. NM_ACK_INT(chip, status);
  908. }
  909. spin_unlock(&chip->reg_lock);
  910. return IRQ_HANDLED;
  911. }
  912. /*
  913. * Handle a potential interrupt for the device referred to by DEV_ID.
  914. * This handler is for the 256ZX, and is very similar to the non-ZX
  915. * routine.
  916. */
  917. static irqreturn_t
  918. snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
  919. {
  920. nm256_t *chip = dev_id;
  921. u32 status;
  922. u8 cbyte;
  923. status = snd_nm256_readl(chip, NM_INT_REG);
  924. /* Not ours. */
  925. if (status == 0)
  926. return snd_nm256_intr_check(chip);
  927. chip->badintrcount = 0;
  928. /* Rather boring; check for individual interrupts and process them. */
  929. spin_lock(&chip->reg_lock);
  930. if (status & NM2_PLAYBACK_INT) {
  931. status &= ~NM2_PLAYBACK_INT;
  932. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  933. snd_nm256_playback_update(chip);
  934. }
  935. if (status & NM2_RECORD_INT) {
  936. status &= ~NM2_RECORD_INT;
  937. NM2_ACK_INT(chip, NM2_RECORD_INT);
  938. snd_nm256_capture_update(chip);
  939. }
  940. if (status & NM2_MISC_INT_1) {
  941. status &= ~NM2_MISC_INT_1;
  942. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  943. snd_printd("NM256: Got misc interrupt #1\n");
  944. cbyte = snd_nm256_readb(chip, 0x400);
  945. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  946. }
  947. if (status & NM2_MISC_INT_2) {
  948. status &= ~NM2_MISC_INT_2;
  949. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  950. snd_printd("NM256: Got misc interrupt #2\n");
  951. cbyte = snd_nm256_readb(chip, 0x400);
  952. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  953. }
  954. /* Unknown interrupt. */
  955. if (status) {
  956. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  957. status);
  958. /* Pray. */
  959. NM2_ACK_INT(chip, status);
  960. }
  961. spin_unlock(&chip->reg_lock);
  962. return IRQ_HANDLED;
  963. }
  964. /*
  965. * AC97 interface
  966. */
  967. /*
  968. * Waits for the mixer to become ready to be written; returns a zero value
  969. * if it timed out.
  970. */
  971. static int
  972. snd_nm256_ac97_ready(nm256_t *chip)
  973. {
  974. int timeout = 10;
  975. u32 testaddr;
  976. u16 testb;
  977. testaddr = chip->mixer_status_offset;
  978. testb = chip->mixer_status_mask;
  979. /*
  980. * Loop around waiting for the mixer to become ready.
  981. */
  982. while (timeout-- > 0) {
  983. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  984. return 1;
  985. udelay(100);
  986. }
  987. return 0;
  988. }
  989. /*
  990. */
  991. static unsigned short
  992. snd_nm256_ac97_read(ac97_t *ac97, unsigned short reg)
  993. {
  994. nm256_t *chip = ac97->private_data;
  995. int res;
  996. if (reg >= 128)
  997. return 0;
  998. if (! snd_nm256_ac97_ready(chip))
  999. return 0;
  1000. res = snd_nm256_readw(chip, chip->mixer_base + reg);
  1001. /* Magic delay. Bleah yucky. */
  1002. msleep(1);
  1003. return res;
  1004. }
  1005. /*
  1006. */
  1007. static void
  1008. snd_nm256_ac97_write(ac97_t *ac97,
  1009. unsigned short reg, unsigned short val)
  1010. {
  1011. nm256_t *chip = ac97->private_data;
  1012. int tries = 2;
  1013. u32 base;
  1014. base = chip->mixer_base;
  1015. snd_nm256_ac97_ready(chip);
  1016. /* Wait for the write to take, too. */
  1017. while (tries-- > 0) {
  1018. snd_nm256_writew(chip, base + reg, val);
  1019. msleep(1); /* a little delay here seems better.. */
  1020. if (snd_nm256_ac97_ready(chip))
  1021. return;
  1022. }
  1023. snd_printd("nm256: ac97 codec not ready..\n");
  1024. }
  1025. /* initialize the ac97 into a known state */
  1026. static void
  1027. snd_nm256_ac97_reset(ac97_t *ac97)
  1028. {
  1029. nm256_t *chip = ac97->private_data;
  1030. /* Reset the mixer. 'Tis magic! */
  1031. snd_nm256_writeb(chip, 0x6c0, 1);
  1032. if (! chip->reset_workaround) {
  1033. /* Dell latitude LS will lock up by this */
  1034. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1035. }
  1036. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1037. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1038. }
  1039. /* create an ac97 mixer interface */
  1040. static int __devinit
  1041. snd_nm256_mixer(nm256_t *chip)
  1042. {
  1043. ac97_bus_t *pbus;
  1044. ac97_template_t ac97;
  1045. int i, err;
  1046. static ac97_bus_ops_t ops = {
  1047. .reset = snd_nm256_ac97_reset,
  1048. .write = snd_nm256_ac97_write,
  1049. .read = snd_nm256_ac97_read,
  1050. };
  1051. /* looks like nm256 hangs up when unexpected registers are touched... */
  1052. static int mixer_regs[] = {
  1053. AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
  1054. AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
  1055. AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
  1056. AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
  1057. /*AC97_EXTENDED_ID,*/
  1058. AC97_VENDOR_ID1, AC97_VENDOR_ID2,
  1059. -1
  1060. };
  1061. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1062. return err;
  1063. memset(&ac97, 0, sizeof(ac97));
  1064. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1065. ac97.limited_regs = 1;
  1066. for (i = 0; mixer_regs[i] >= 0; i++)
  1067. set_bit(mixer_regs[i], ac97.reg_accessed);
  1068. ac97.private_data = chip;
  1069. pbus->no_vra = 1;
  1070. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1071. if (err < 0)
  1072. return err;
  1073. if (! (chip->ac97->id & (0xf0000000))) {
  1074. /* looks like an invalid id */
  1075. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1076. }
  1077. return 0;
  1078. }
  1079. /*
  1080. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1081. * the associated address as the end of our audio buffer in the video
  1082. * RAM.
  1083. */
  1084. static int __devinit
  1085. snd_nm256_peek_for_sig(nm256_t *chip)
  1086. {
  1087. /* The signature is located 1K below the end of video RAM. */
  1088. void __iomem *temp;
  1089. /* Default buffer end is 5120 bytes below the top of RAM. */
  1090. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1091. u32 sig;
  1092. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1093. if (temp == NULL) {
  1094. snd_printk("Unable to scan for card signature in video RAM\n");
  1095. return -EBUSY;
  1096. }
  1097. sig = readl(temp);
  1098. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1099. u32 pointer = readl(temp + 4);
  1100. /*
  1101. * If it's obviously invalid, don't use it
  1102. */
  1103. if (pointer == 0xffffffff ||
  1104. pointer < chip->buffer_size ||
  1105. pointer > chip->buffer_end) {
  1106. snd_printk("invalid signature found: 0x%x\n", pointer);
  1107. iounmap(temp);
  1108. return -ENODEV;
  1109. } else {
  1110. pointer_found = pointer;
  1111. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", pointer);
  1112. }
  1113. }
  1114. iounmap(temp);
  1115. chip->buffer_end = pointer_found;
  1116. return 0;
  1117. }
  1118. #ifdef CONFIG_PM
  1119. /*
  1120. * APM event handler, so the card is properly reinitialized after a power
  1121. * event.
  1122. */
  1123. static int nm256_suspend(snd_card_t *card, pm_message_t state)
  1124. {
  1125. nm256_t *chip = card->pm_private_data;
  1126. snd_pcm_suspend_all(chip->pcm);
  1127. snd_ac97_suspend(chip->ac97);
  1128. chip->coeffs_current = 0;
  1129. pci_disable_device(chip->pci);
  1130. return 0;
  1131. }
  1132. static int nm256_resume(snd_card_t *card)
  1133. {
  1134. nm256_t *chip = card->pm_private_data;
  1135. int i;
  1136. /* Perform a full reset on the hardware */
  1137. pci_enable_device(chip->pci);
  1138. snd_nm256_init_chip(chip);
  1139. /* restore ac97 */
  1140. snd_ac97_resume(chip->ac97);
  1141. for (i = 0; i < 2; i++) {
  1142. nm256_stream_t *s = &chip->streams[i];
  1143. if (s->substream && s->suspended) {
  1144. spin_lock_irq(&chip->reg_lock);
  1145. snd_nm256_set_format(chip, s, s->substream);
  1146. spin_unlock_irq(&chip->reg_lock);
  1147. }
  1148. }
  1149. return 0;
  1150. }
  1151. #endif /* CONFIG_PM */
  1152. static int snd_nm256_free(nm256_t *chip)
  1153. {
  1154. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1155. snd_nm256_playback_stop(chip);
  1156. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1157. snd_nm256_capture_stop(chip);
  1158. if (chip->irq >= 0)
  1159. synchronize_irq(chip->irq);
  1160. if (chip->cport)
  1161. iounmap(chip->cport);
  1162. if (chip->buffer)
  1163. iounmap(chip->buffer);
  1164. if (chip->res_cport) {
  1165. release_resource(chip->res_cport);
  1166. kfree_nocheck(chip->res_cport);
  1167. }
  1168. if (chip->res_buffer) {
  1169. release_resource(chip->res_buffer);
  1170. kfree_nocheck(chip->res_buffer);
  1171. }
  1172. if (chip->irq >= 0)
  1173. free_irq(chip->irq, (void*)chip);
  1174. pci_disable_device(chip->pci);
  1175. kfree(chip);
  1176. return 0;
  1177. }
  1178. static int snd_nm256_dev_free(snd_device_t *device)
  1179. {
  1180. nm256_t *chip = device->device_data;
  1181. return snd_nm256_free(chip);
  1182. }
  1183. static int __devinit
  1184. snd_nm256_create(snd_card_t *card, struct pci_dev *pci,
  1185. int play_bufsize, int capt_bufsize,
  1186. int force_load,
  1187. u32 buffertop,
  1188. int usecache,
  1189. nm256_t **chip_ret)
  1190. {
  1191. nm256_t *chip;
  1192. int err, pval;
  1193. static snd_device_ops_t ops = {
  1194. .dev_free = snd_nm256_dev_free,
  1195. };
  1196. u32 addr;
  1197. *chip_ret = NULL;
  1198. if ((err = pci_enable_device(pci)) < 0)
  1199. return err;
  1200. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  1201. if (chip == NULL) {
  1202. pci_disable_device(pci);
  1203. return -ENOMEM;
  1204. }
  1205. chip->card = card;
  1206. chip->pci = pci;
  1207. chip->use_cache = usecache;
  1208. spin_lock_init(&chip->reg_lock);
  1209. chip->irq = -1;
  1210. init_MUTEX(&chip->irq_mutex);
  1211. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = play_bufsize;
  1212. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capt_bufsize;
  1213. /*
  1214. * The NM256 has two memory ports. The first port is nothing
  1215. * more than a chunk of video RAM, which is used as the I/O ring
  1216. * buffer. The second port has the actual juicy stuff (like the
  1217. * mixer and the playback engine control registers).
  1218. */
  1219. chip->buffer_addr = pci_resource_start(pci, 0);
  1220. chip->cport_addr = pci_resource_start(pci, 1);
  1221. /* Init the memory port info. */
  1222. /* remap control port (#2) */
  1223. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1224. card->driver);
  1225. if (chip->res_cport == NULL) {
  1226. snd_printk("memory region 0x%lx (size 0x%x) busy\n",
  1227. chip->cport_addr, NM_PORT2_SIZE);
  1228. err = -EBUSY;
  1229. goto __error;
  1230. }
  1231. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1232. if (chip->cport == NULL) {
  1233. snd_printk("unable to map control port %lx\n", chip->cport_addr);
  1234. err = -ENOMEM;
  1235. goto __error;
  1236. }
  1237. if (!strcmp(card->driver, "NM256AV")) {
  1238. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1239. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1240. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1241. if (! force_load) {
  1242. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1243. printk(KERN_ERR " force the driver to load by passing in the module parameter\n");
  1244. printk(KERN_ERR " force_ac97=1\n");
  1245. printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
  1246. err = -ENXIO;
  1247. goto __error;
  1248. }
  1249. }
  1250. chip->buffer_end = 2560 * 1024;
  1251. chip->interrupt = snd_nm256_interrupt;
  1252. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1253. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1254. } else {
  1255. /* Not sure if there is any relevant detect for the ZX or not. */
  1256. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1257. chip->buffer_end = 6144 * 1024;
  1258. else
  1259. chip->buffer_end = 4096 * 1024;
  1260. chip->interrupt = snd_nm256_interrupt_zx;
  1261. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1262. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1263. }
  1264. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1265. if (chip->use_cache)
  1266. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1267. else
  1268. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1269. if (buffertop >= chip->buffer_size && buffertop < chip->buffer_end)
  1270. chip->buffer_end = buffertop;
  1271. else {
  1272. /* get buffer end pointer from signature */
  1273. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1274. goto __error;
  1275. }
  1276. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1277. chip->buffer_addr += chip->buffer_start;
  1278. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1279. chip->buffer_start, chip->buffer_end);
  1280. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1281. chip->buffer_size,
  1282. card->driver);
  1283. if (chip->res_buffer == NULL) {
  1284. snd_printk("nm256: buffer 0x%lx (size 0x%x) busy\n",
  1285. chip->buffer_addr, chip->buffer_size);
  1286. err = -EBUSY;
  1287. goto __error;
  1288. }
  1289. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1290. if (chip->buffer == NULL) {
  1291. err = -ENOMEM;
  1292. snd_printk("unable to map ring buffer at %lx\n", chip->buffer_addr);
  1293. goto __error;
  1294. }
  1295. /* set offsets */
  1296. addr = chip->buffer_start;
  1297. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1298. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1299. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1300. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1301. if (chip->use_cache) {
  1302. chip->all_coeff_buf = addr;
  1303. } else {
  1304. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1305. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1306. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1307. }
  1308. /* Fixed setting. */
  1309. chip->mixer_base = NM_MIXER_OFFSET;
  1310. chip->coeffs_current = 0;
  1311. snd_nm256_init_chip(chip);
  1312. // pci_set_master(pci); /* needed? */
  1313. snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip);
  1314. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1315. goto __error;
  1316. snd_card_set_dev(card, &pci->dev);
  1317. *chip_ret = chip;
  1318. return 0;
  1319. __error:
  1320. snd_nm256_free(chip);
  1321. return err;
  1322. }
  1323. struct nm256_quirk {
  1324. unsigned short vendor;
  1325. unsigned short device;
  1326. int type;
  1327. };
  1328. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND };
  1329. static struct nm256_quirk nm256_quirks[] __devinitdata = {
  1330. /* HP omnibook 4150 has cs4232 codec internally */
  1331. { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
  1332. /* Sony PCG-F305 */
  1333. { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
  1334. /* Dell Latitude LS */
  1335. { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
  1336. { } /* terminator */
  1337. };
  1338. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1339. const struct pci_device_id *pci_id)
  1340. {
  1341. static int dev;
  1342. snd_card_t *card;
  1343. nm256_t *chip;
  1344. int err;
  1345. unsigned int xbuffer_top;
  1346. struct nm256_quirk *q;
  1347. u16 subsystem_vendor, subsystem_device;
  1348. if (dev >= SNDRV_CARDS)
  1349. return -ENODEV;
  1350. if (!enable[dev]) {
  1351. dev++;
  1352. return -ENOENT;
  1353. }
  1354. pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
  1355. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
  1356. for (q = nm256_quirks; q->vendor; q++) {
  1357. if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
  1358. switch (q->type) {
  1359. case NM_BLACKLISTED:
  1360. printk(KERN_INFO "nm256: The device is blacklisted. Loading stopped\n");
  1361. return -ENODEV;
  1362. case NM_RESET_WORKAROUND:
  1363. reset_workaround[dev] = 1;
  1364. break;
  1365. }
  1366. }
  1367. }
  1368. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1369. if (card == NULL)
  1370. return -ENOMEM;
  1371. switch (pci->device) {
  1372. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1373. strcpy(card->driver, "NM256AV");
  1374. break;
  1375. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1376. strcpy(card->driver, "NM256ZX");
  1377. break;
  1378. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1379. strcpy(card->driver, "NM256XL+");
  1380. break;
  1381. default:
  1382. snd_printk("invalid device id 0x%x\n", pci->device);
  1383. snd_card_free(card);
  1384. return -EINVAL;
  1385. }
  1386. if (vaio_hack[dev])
  1387. xbuffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1388. else
  1389. xbuffer_top = buffer_top[dev];
  1390. if (playback_bufsize[dev] < 4)
  1391. playback_bufsize[dev] = 4;
  1392. if (playback_bufsize[dev] > 128)
  1393. playback_bufsize[dev] = 128;
  1394. if (capture_bufsize[dev] < 4)
  1395. capture_bufsize[dev] = 4;
  1396. if (capture_bufsize[dev] > 128)
  1397. capture_bufsize[dev] = 128;
  1398. if ((err = snd_nm256_create(card, pci,
  1399. playback_bufsize[dev] * 1024, /* in bytes */
  1400. capture_bufsize[dev] * 1024, /* in bytes */
  1401. force_ac97[dev],
  1402. xbuffer_top,
  1403. use_cache[dev],
  1404. &chip)) < 0) {
  1405. snd_card_free(card);
  1406. return err;
  1407. }
  1408. if (reset_workaround[dev]) {
  1409. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1410. chip->reset_workaround = 1;
  1411. }
  1412. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1413. (err = snd_nm256_mixer(chip)) < 0) {
  1414. snd_card_free(card);
  1415. return err;
  1416. }
  1417. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1418. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1419. card->shortname,
  1420. chip->buffer_addr, chip->cport_addr, chip->irq);
  1421. if ((err = snd_card_register(card)) < 0) {
  1422. snd_card_free(card);
  1423. return err;
  1424. }
  1425. pci_set_drvdata(pci, card);
  1426. dev++;
  1427. return 0;
  1428. }
  1429. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1430. {
  1431. snd_card_free(pci_get_drvdata(pci));
  1432. pci_set_drvdata(pci, NULL);
  1433. }
  1434. static struct pci_driver driver = {
  1435. .name = "NeoMagic 256",
  1436. .id_table = snd_nm256_ids,
  1437. .probe = snd_nm256_probe,
  1438. .remove = __devexit_p(snd_nm256_remove),
  1439. SND_PCI_PM_CALLBACKS
  1440. };
  1441. static int __init alsa_card_nm256_init(void)
  1442. {
  1443. return pci_register_driver(&driver);
  1444. }
  1445. static void __exit alsa_card_nm256_exit(void)
  1446. {
  1447. pci_unregister_driver(&driver);
  1448. }
  1449. module_init(alsa_card_nm256_init)
  1450. module_exit(alsa_card_nm256_exit)