ice1724.c 65 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <sound/driver.h>
  25. #include <asm/io.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/moduleparam.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "juli.h"
  47. #include "phase.h"
  48. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  49. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  50. MODULE_LICENSE("GPL");
  51. MODULE_SUPPORTED_DEVICE("{"
  52. REVO_DEVICE_DESC
  53. AMP_AUDIO2000_DEVICE_DESC
  54. AUREON_DEVICE_DESC
  55. VT1720_MOBO_DEVICE_DESC
  56. PONTIS_DEVICE_DESC
  57. PRODIGY192_DEVICE_DESC
  58. JULI_DEVICE_DESC
  59. PHASE_DEVICE_DESC
  60. "{VIA,VT1720},"
  61. "{VIA,VT1724},"
  62. "{ICEnsemble,Generic ICE1724},"
  63. "{ICEnsemble,Generic Envy24HT}"
  64. "{ICEnsemble,Generic Envy24PT}}");
  65. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  66. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  67. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  68. static char *model[SNDRV_CARDS];
  69. module_param_array(index, int, NULL, 0444);
  70. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  71. module_param_array(id, charp, NULL, 0444);
  72. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  73. module_param_array(enable, bool, NULL, 0444);
  74. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  75. module_param_array(model, charp, NULL, 0444);
  76. MODULE_PARM_DESC(model, "Use the given board model.");
  77. #ifndef PCI_VENDOR_ID_ICE
  78. #define PCI_VENDOR_ID_ICE 0x1412
  79. #endif
  80. #ifndef PCI_DEVICE_ID_VT1724
  81. #define PCI_DEVICE_ID_VT1724 0x1724
  82. #endif
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /* check whether the clock mode is spdif-in */
  96. static inline int is_spdif_master(ice1712_t *ice)
  97. {
  98. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  99. }
  100. static inline int is_pro_rate_locked(ice1712_t *ice)
  101. {
  102. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  103. }
  104. /*
  105. * ac97 section
  106. */
  107. static unsigned char snd_vt1724_ac97_ready(ice1712_t *ice)
  108. {
  109. unsigned char old_cmd;
  110. int tm;
  111. for (tm = 0; tm < 0x10000; tm++) {
  112. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  113. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  114. continue;
  115. if (!(old_cmd & VT1724_AC97_READY))
  116. continue;
  117. return old_cmd;
  118. }
  119. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  120. return old_cmd;
  121. }
  122. static int snd_vt1724_ac97_wait_bit(ice1712_t *ice, unsigned char bit)
  123. {
  124. int tm;
  125. for (tm = 0; tm < 0x10000; tm++)
  126. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  127. return 0;
  128. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  129. return -EIO;
  130. }
  131. static void snd_vt1724_ac97_write(ac97_t *ac97,
  132. unsigned short reg,
  133. unsigned short val)
  134. {
  135. ice1712_t *ice = (ice1712_t *)ac97->private_data;
  136. unsigned char old_cmd;
  137. old_cmd = snd_vt1724_ac97_ready(ice);
  138. old_cmd &= ~VT1724_AC97_ID_MASK;
  139. old_cmd |= ac97->num;
  140. outb(reg, ICEMT1724(ice, AC97_INDEX));
  141. outw(val, ICEMT1724(ice, AC97_DATA));
  142. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  143. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  144. }
  145. static unsigned short snd_vt1724_ac97_read(ac97_t *ac97, unsigned short reg)
  146. {
  147. ice1712_t *ice = (ice1712_t *)ac97->private_data;
  148. unsigned char old_cmd;
  149. old_cmd = snd_vt1724_ac97_ready(ice);
  150. old_cmd &= ~VT1724_AC97_ID_MASK;
  151. old_cmd |= ac97->num;
  152. outb(reg, ICEMT1724(ice, AC97_INDEX));
  153. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  154. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  155. return ~0;
  156. return inw(ICEMT1724(ice, AC97_DATA));
  157. }
  158. /*
  159. * GPIO operations
  160. */
  161. /* set gpio direction 0 = read, 1 = write */
  162. static void snd_vt1724_set_gpio_dir(ice1712_t *ice, unsigned int data)
  163. {
  164. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  165. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  166. }
  167. /* set the gpio mask (0 = writable) */
  168. static void snd_vt1724_set_gpio_mask(ice1712_t *ice, unsigned int data)
  169. {
  170. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  171. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  172. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  173. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  174. }
  175. static void snd_vt1724_set_gpio_data(ice1712_t *ice, unsigned int data)
  176. {
  177. outw(data, ICEREG1724(ice, GPIO_DATA));
  178. if (! ice->vt1720)
  179. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  180. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  181. }
  182. static unsigned int snd_vt1724_get_gpio_data(ice1712_t *ice)
  183. {
  184. unsigned int data;
  185. if (! ice->vt1720)
  186. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  187. else
  188. data = 0;
  189. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  190. return data;
  191. }
  192. /*
  193. * Interrupt handler
  194. */
  195. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  196. {
  197. ice1712_t *ice = dev_id;
  198. unsigned char status;
  199. int handled = 0;
  200. while (1) {
  201. status = inb(ICEREG1724(ice, IRQSTAT));
  202. if (status == 0)
  203. break;
  204. handled = 1;
  205. /* these should probably be separated at some point,
  206. but as we don't currently have MPU support on the board I will leave it */
  207. if ((status & VT1724_IRQ_MPU_RX)||(status & VT1724_IRQ_MPU_TX)) {
  208. if (ice->rmidi[0])
  209. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  210. outb(status & (VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX), ICEREG1724(ice, IRQSTAT));
  211. status &= ~(VT1724_IRQ_MPU_RX|VT1724_IRQ_MPU_TX);
  212. }
  213. if (status & VT1724_IRQ_MTPCM) {
  214. /*
  215. * Multi-track PCM
  216. * PCM assignment are:
  217. * Playback DMA0 (M/C) = playback_pro_substream
  218. * Playback DMA1 = playback_con_substream_ds[0]
  219. * Playback DMA2 = playback_con_substream_ds[1]
  220. * Playback DMA3 = playback_con_substream_ds[2]
  221. * Playback DMA4 (SPDIF) = playback_con_substream
  222. * Record DMA0 = capture_pro_substream
  223. * Record DMA1 = capture_con_substream
  224. */
  225. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  226. if (mtstat & VT1724_MULTI_PDMA0) {
  227. if (ice->playback_pro_substream)
  228. snd_pcm_period_elapsed(ice->playback_pro_substream);
  229. }
  230. if (mtstat & VT1724_MULTI_RDMA0) {
  231. if (ice->capture_pro_substream)
  232. snd_pcm_period_elapsed(ice->capture_pro_substream);
  233. }
  234. if (mtstat & VT1724_MULTI_PDMA1) {
  235. if (ice->playback_con_substream_ds[0])
  236. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  237. }
  238. if (mtstat & VT1724_MULTI_PDMA2) {
  239. if (ice->playback_con_substream_ds[1])
  240. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  241. }
  242. if (mtstat & VT1724_MULTI_PDMA3) {
  243. if (ice->playback_con_substream_ds[2])
  244. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  245. }
  246. if (mtstat & VT1724_MULTI_PDMA4) {
  247. if (ice->playback_con_substream)
  248. snd_pcm_period_elapsed(ice->playback_con_substream);
  249. }
  250. if (mtstat & VT1724_MULTI_RDMA1) {
  251. if (ice->capture_con_substream)
  252. snd_pcm_period_elapsed(ice->capture_con_substream);
  253. }
  254. /* ack anyway to avoid freeze */
  255. outb(mtstat, ICEMT1724(ice, IRQ));
  256. /* ought to really handle this properly */
  257. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  258. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  259. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  260. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  261. /* If I don't do this, I get machine lockup due to continual interrupts */
  262. }
  263. }
  264. }
  265. return IRQ_RETVAL(handled);
  266. }
  267. /*
  268. * PCM code - professional part (multitrack)
  269. */
  270. static unsigned int rates[] = {
  271. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  272. 32000, 44100, 48000, 64000, 88200, 96000,
  273. 176400, 192000,
  274. };
  275. static snd_pcm_hw_constraint_list_t hw_constraints_rates_96 = {
  276. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  277. .list = rates,
  278. .mask = 0,
  279. };
  280. static snd_pcm_hw_constraint_list_t hw_constraints_rates_48 = {
  281. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  282. .list = rates,
  283. .mask = 0,
  284. };
  285. static snd_pcm_hw_constraint_list_t hw_constraints_rates_192 = {
  286. .count = ARRAY_SIZE(rates),
  287. .list = rates,
  288. .mask = 0,
  289. };
  290. struct vt1724_pcm_reg {
  291. unsigned int addr; /* ADDR register offset */
  292. unsigned int size; /* SIZE register offset */
  293. unsigned int count; /* COUNT register offset */
  294. unsigned int start; /* start & pause bit */
  295. };
  296. static int snd_vt1724_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
  297. {
  298. ice1712_t *ice = snd_pcm_substream_chip(substream);
  299. unsigned char what;
  300. unsigned char old;
  301. struct list_head *pos;
  302. snd_pcm_substream_t *s;
  303. what = 0;
  304. snd_pcm_group_for_each(pos, substream) {
  305. struct vt1724_pcm_reg *reg;
  306. s = snd_pcm_group_substream_entry(pos);
  307. reg = s->runtime->private_data;
  308. what |= reg->start;
  309. snd_pcm_trigger_done(s, substream);
  310. }
  311. switch (cmd) {
  312. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  313. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  314. spin_lock(&ice->reg_lock);
  315. old = inb(ICEMT1724(ice, DMA_PAUSE));
  316. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  317. old |= what;
  318. else
  319. old &= ~what;
  320. outb(old, ICEMT1724(ice, DMA_PAUSE));
  321. spin_unlock(&ice->reg_lock);
  322. break;
  323. case SNDRV_PCM_TRIGGER_START:
  324. case SNDRV_PCM_TRIGGER_STOP:
  325. spin_lock(&ice->reg_lock);
  326. old = inb(ICEMT1724(ice, DMA_CONTROL));
  327. if (cmd == SNDRV_PCM_TRIGGER_START)
  328. old |= what;
  329. else
  330. old &= ~what;
  331. outb(old, ICEMT1724(ice, DMA_CONTROL));
  332. spin_unlock(&ice->reg_lock);
  333. break;
  334. default:
  335. return -EINVAL;
  336. }
  337. return 0;
  338. }
  339. /*
  340. */
  341. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  342. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  343. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  344. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  345. static int get_max_rate(ice1712_t *ice)
  346. {
  347. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  348. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  349. return 192000;
  350. else
  351. return 96000;
  352. } else
  353. return 48000;
  354. }
  355. static void snd_vt1724_set_pro_rate(ice1712_t *ice, unsigned int rate, int force)
  356. {
  357. unsigned long flags;
  358. unsigned char val, old;
  359. unsigned int i, mclk_change;
  360. if (rate > get_max_rate(ice))
  361. return;
  362. switch (rate) {
  363. case 8000: val = 6; break;
  364. case 9600: val = 3; break;
  365. case 11025: val = 10; break;
  366. case 12000: val = 2; break;
  367. case 16000: val = 5; break;
  368. case 22050: val = 9; break;
  369. case 24000: val = 1; break;
  370. case 32000: val = 4; break;
  371. case 44100: val = 8; break;
  372. case 48000: val = 0; break;
  373. case 64000: val = 15; break;
  374. case 88200: val = 11; break;
  375. case 96000: val = 7; break;
  376. case 176400: val = 12; break;
  377. case 192000: val = 14; break;
  378. default:
  379. snd_BUG();
  380. val = 0;
  381. break;
  382. }
  383. spin_lock_irqsave(&ice->reg_lock, flags);
  384. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  385. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  386. /* running? we cannot change the rate now... */
  387. spin_unlock_irqrestore(&ice->reg_lock, flags);
  388. return;
  389. }
  390. if (!force && is_pro_rate_locked(ice)) {
  391. spin_unlock_irqrestore(&ice->reg_lock, flags);
  392. return;
  393. }
  394. old = inb(ICEMT1724(ice, RATE));
  395. if (force || old != val)
  396. outb(val, ICEMT1724(ice, RATE));
  397. else if (rate == ice->cur_rate) {
  398. spin_unlock_irqrestore(&ice->reg_lock, flags);
  399. return;
  400. }
  401. ice->cur_rate = rate;
  402. /* check MT02 */
  403. mclk_change = 0;
  404. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  405. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  406. if (rate > 96000)
  407. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  408. else
  409. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  410. if (val != old) {
  411. outb(val, ICEMT1724(ice, I2S_FORMAT));
  412. mclk_change = 1;
  413. }
  414. }
  415. spin_unlock_irqrestore(&ice->reg_lock, flags);
  416. if (mclk_change && ice->gpio.i2s_mclk_changed)
  417. ice->gpio.i2s_mclk_changed(ice);
  418. if (ice->gpio.set_pro_rate)
  419. ice->gpio.set_pro_rate(ice, rate);
  420. /* set up codecs */
  421. for (i = 0; i < ice->akm_codecs; i++) {
  422. if (ice->akm[i].ops.set_rate_val)
  423. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  424. }
  425. if (ice->spdif.ops.setup_rate)
  426. ice->spdif.ops.setup_rate(ice, rate);
  427. }
  428. static int snd_vt1724_pcm_hw_params(snd_pcm_substream_t * substream,
  429. snd_pcm_hw_params_t * hw_params)
  430. {
  431. ice1712_t *ice = snd_pcm_substream_chip(substream);
  432. int i, chs;
  433. chs = params_channels(hw_params);
  434. down(&ice->open_mutex);
  435. /* mark surround channels */
  436. if (substream == ice->playback_pro_substream) {
  437. /* PDMA0 can be multi-channel up to 8 */
  438. chs = chs / 2 - 1;
  439. for (i = 0; i < chs; i++) {
  440. if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
  441. up(&ice->open_mutex);
  442. return -EBUSY;
  443. }
  444. ice->pcm_reserved[i] = substream;
  445. }
  446. for (; i < 3; i++) {
  447. if (ice->pcm_reserved[i] == substream)
  448. ice->pcm_reserved[i] = NULL;
  449. }
  450. } else {
  451. for (i = 0; i < 3; i++) {
  452. /* check individual playback stream */
  453. if (ice->playback_con_substream_ds[i] == substream) {
  454. if (ice->pcm_reserved[i] && ice->pcm_reserved[i] != substream) {
  455. up(&ice->open_mutex);
  456. return -EBUSY;
  457. }
  458. ice->pcm_reserved[i] = substream;
  459. break;
  460. }
  461. }
  462. }
  463. up(&ice->open_mutex);
  464. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  465. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  466. }
  467. static int snd_vt1724_pcm_hw_free(snd_pcm_substream_t * substream)
  468. {
  469. ice1712_t *ice = snd_pcm_substream_chip(substream);
  470. int i;
  471. down(&ice->open_mutex);
  472. /* unmark surround channels */
  473. for (i = 0; i < 3; i++)
  474. if (ice->pcm_reserved[i] == substream)
  475. ice->pcm_reserved[i] = NULL;
  476. up(&ice->open_mutex);
  477. return snd_pcm_lib_free_pages(substream);
  478. }
  479. static int snd_vt1724_playback_pro_prepare(snd_pcm_substream_t * substream)
  480. {
  481. ice1712_t *ice = snd_pcm_substream_chip(substream);
  482. unsigned char val;
  483. unsigned int size;
  484. spin_lock_irq(&ice->reg_lock);
  485. val = (8 - substream->runtime->channels) >> 1;
  486. outb(val, ICEMT1724(ice, BURST));
  487. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  488. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  489. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  490. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  491. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  492. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  493. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  494. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  495. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  496. spin_unlock_irq(&ice->reg_lock);
  497. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  498. return 0;
  499. }
  500. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(snd_pcm_substream_t * substream)
  501. {
  502. ice1712_t *ice = snd_pcm_substream_chip(substream);
  503. size_t ptr;
  504. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  505. return 0;
  506. #if 0 /* read PLAYBACK_ADDR */
  507. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  508. if (ptr < substream->runtime->dma_addr) {
  509. snd_printd("ice1724: invalid negative ptr\n");
  510. return 0;
  511. }
  512. ptr -= substream->runtime->dma_addr;
  513. ptr = bytes_to_frames(substream->runtime, ptr);
  514. if (ptr >= substream->runtime->buffer_size) {
  515. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->period_size);
  516. return 0;
  517. }
  518. #else /* read PLAYBACK_SIZE */
  519. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  520. ptr = (ptr + 1) << 2;
  521. ptr = bytes_to_frames(substream->runtime, ptr);
  522. if (! ptr)
  523. ;
  524. else if (ptr <= substream->runtime->buffer_size)
  525. ptr = substream->runtime->buffer_size - ptr;
  526. else {
  527. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
  528. ptr = 0;
  529. }
  530. #endif
  531. return ptr;
  532. }
  533. static int snd_vt1724_pcm_prepare(snd_pcm_substream_t *substream)
  534. {
  535. ice1712_t *ice = snd_pcm_substream_chip(substream);
  536. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  537. spin_lock_irq(&ice->reg_lock);
  538. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  539. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, ice->profi_port + reg->size);
  540. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ice->profi_port + reg->count);
  541. spin_unlock_irq(&ice->reg_lock);
  542. return 0;
  543. }
  544. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(snd_pcm_substream_t *substream)
  545. {
  546. ice1712_t *ice = snd_pcm_substream_chip(substream);
  547. struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  548. size_t ptr;
  549. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  550. return 0;
  551. #if 0 /* use ADDR register */
  552. ptr = inl(ice->profi_port + reg->addr);
  553. ptr -= substream->runtime->dma_addr;
  554. return bytes_to_frames(substream->runtime, ptr);
  555. #else /* use SIZE register */
  556. ptr = inw(ice->profi_port + reg->size);
  557. ptr = (ptr + 1) << 2;
  558. ptr = bytes_to_frames(substream->runtime, ptr);
  559. if (! ptr)
  560. ;
  561. else if (ptr <= substream->runtime->buffer_size)
  562. ptr = substream->runtime->buffer_size - ptr;
  563. else {
  564. snd_printd("ice1724: invalid ptr %d (size=%d)\n", (int)ptr, (int)substream->runtime->buffer_size);
  565. ptr = 0;
  566. }
  567. return ptr;
  568. #endif
  569. }
  570. static struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  571. .addr = VT1724_MT_PLAYBACK_ADDR,
  572. .size = VT1724_MT_PLAYBACK_SIZE,
  573. .count = VT1724_MT_PLAYBACK_COUNT,
  574. .start = VT1724_PDMA0_START,
  575. };
  576. static struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  577. .addr = VT1724_MT_CAPTURE_ADDR,
  578. .size = VT1724_MT_CAPTURE_SIZE,
  579. .count = VT1724_MT_CAPTURE_COUNT,
  580. .start = VT1724_RDMA0_START,
  581. };
  582. static snd_pcm_hardware_t snd_vt1724_playback_pro =
  583. {
  584. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  585. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  586. SNDRV_PCM_INFO_MMAP_VALID |
  587. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  588. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  589. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  590. .rate_min = 8000,
  591. .rate_max = 192000,
  592. .channels_min = 2,
  593. .channels_max = 8,
  594. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  595. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  596. .period_bytes_max = (1UL << 21),
  597. .periods_min = 2,
  598. .periods_max = 1024,
  599. };
  600. static snd_pcm_hardware_t snd_vt1724_spdif =
  601. {
  602. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  603. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  604. SNDRV_PCM_INFO_MMAP_VALID |
  605. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  606. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  607. .rates = SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|SNDRV_PCM_RATE_48000,
  608. .rate_min = 32000,
  609. .rate_max = 48000,
  610. .channels_min = 2,
  611. .channels_max = 2,
  612. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  613. .period_bytes_min = 2 * 4 * 2,
  614. .period_bytes_max = (1UL << 18),
  615. .periods_min = 2,
  616. .periods_max = 1024,
  617. };
  618. static snd_pcm_hardware_t snd_vt1724_2ch_stereo =
  619. {
  620. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  621. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  622. SNDRV_PCM_INFO_MMAP_VALID |
  623. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  624. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  625. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  626. .rate_min = 8000,
  627. .rate_max = 192000,
  628. .channels_min = 2,
  629. .channels_max = 2,
  630. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  631. .period_bytes_min = 2 * 4 * 2,
  632. .period_bytes_max = (1UL << 18),
  633. .periods_min = 2,
  634. .periods_max = 1024,
  635. };
  636. /*
  637. * set rate constraints
  638. */
  639. static int set_rate_constraints(ice1712_t *ice, snd_pcm_substream_t *substream)
  640. {
  641. snd_pcm_runtime_t *runtime = substream->runtime;
  642. if (ice->hw_rates) {
  643. /* hardware specific */
  644. runtime->hw.rate_min = ice->hw_rates->list[0];
  645. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  646. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  647. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, ice->hw_rates);
  648. }
  649. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  650. /* I2S */
  651. /* VT1720 doesn't support more than 96kHz */
  652. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  653. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_192);
  654. else {
  655. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000;
  656. runtime->hw.rate_max = 96000;
  657. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_96);
  658. }
  659. } else if (ice->ac97) {
  660. /* ACLINK */
  661. runtime->hw.rate_max = 48000;
  662. runtime->hw.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000;
  663. return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates_48);
  664. }
  665. return 0;
  666. }
  667. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  668. * actually used
  669. */
  670. #define VT1724_BUFFER_ALIGN 0x20
  671. static int snd_vt1724_playback_pro_open(snd_pcm_substream_t * substream)
  672. {
  673. snd_pcm_runtime_t *runtime = substream->runtime;
  674. ice1712_t *ice = snd_pcm_substream_chip(substream);
  675. int chs;
  676. runtime->private_data = &vt1724_playback_pro_reg;
  677. ice->playback_pro_substream = substream;
  678. runtime->hw = snd_vt1724_playback_pro;
  679. snd_pcm_set_sync(substream);
  680. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  681. set_rate_constraints(ice, substream);
  682. down(&ice->open_mutex);
  683. /* calculate the currently available channels */
  684. for (chs = 0; chs < 3; chs++) {
  685. if (ice->pcm_reserved[chs])
  686. break;
  687. }
  688. chs = (chs + 1) * 2;
  689. runtime->hw.channels_max = chs;
  690. if (chs > 2) /* channels must be even */
  691. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  692. up(&ice->open_mutex);
  693. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  694. VT1724_BUFFER_ALIGN);
  695. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  696. VT1724_BUFFER_ALIGN);
  697. return 0;
  698. }
  699. static int snd_vt1724_capture_pro_open(snd_pcm_substream_t * substream)
  700. {
  701. ice1712_t *ice = snd_pcm_substream_chip(substream);
  702. snd_pcm_runtime_t *runtime = substream->runtime;
  703. runtime->private_data = &vt1724_capture_pro_reg;
  704. ice->capture_pro_substream = substream;
  705. runtime->hw = snd_vt1724_2ch_stereo;
  706. snd_pcm_set_sync(substream);
  707. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  708. set_rate_constraints(ice, substream);
  709. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  710. VT1724_BUFFER_ALIGN);
  711. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  712. VT1724_BUFFER_ALIGN);
  713. return 0;
  714. }
  715. static int snd_vt1724_playback_pro_close(snd_pcm_substream_t * substream)
  716. {
  717. ice1712_t *ice = snd_pcm_substream_chip(substream);
  718. if (PRO_RATE_RESET)
  719. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  720. ice->playback_pro_substream = NULL;
  721. return 0;
  722. }
  723. static int snd_vt1724_capture_pro_close(snd_pcm_substream_t * substream)
  724. {
  725. ice1712_t *ice = snd_pcm_substream_chip(substream);
  726. if (PRO_RATE_RESET)
  727. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  728. ice->capture_pro_substream = NULL;
  729. return 0;
  730. }
  731. static snd_pcm_ops_t snd_vt1724_playback_pro_ops = {
  732. .open = snd_vt1724_playback_pro_open,
  733. .close = snd_vt1724_playback_pro_close,
  734. .ioctl = snd_pcm_lib_ioctl,
  735. .hw_params = snd_vt1724_pcm_hw_params,
  736. .hw_free = snd_vt1724_pcm_hw_free,
  737. .prepare = snd_vt1724_playback_pro_prepare,
  738. .trigger = snd_vt1724_pcm_trigger,
  739. .pointer = snd_vt1724_playback_pro_pointer,
  740. };
  741. static snd_pcm_ops_t snd_vt1724_capture_pro_ops = {
  742. .open = snd_vt1724_capture_pro_open,
  743. .close = snd_vt1724_capture_pro_close,
  744. .ioctl = snd_pcm_lib_ioctl,
  745. .hw_params = snd_vt1724_pcm_hw_params,
  746. .hw_free = snd_vt1724_pcm_hw_free,
  747. .prepare = snd_vt1724_pcm_prepare,
  748. .trigger = snd_vt1724_pcm_trigger,
  749. .pointer = snd_vt1724_pcm_pointer,
  750. };
  751. static int __devinit snd_vt1724_pcm_profi(ice1712_t * ice, int device)
  752. {
  753. snd_pcm_t *pcm;
  754. int err;
  755. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  756. if (err < 0)
  757. return err;
  758. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  759. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  760. pcm->private_data = ice;
  761. pcm->info_flags = 0;
  762. strcpy(pcm->name, "ICE1724");
  763. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  764. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  765. ice->pcm_pro = pcm;
  766. return 0;
  767. }
  768. /*
  769. * SPDIF PCM
  770. */
  771. static struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  772. .addr = VT1724_MT_PDMA4_ADDR,
  773. .size = VT1724_MT_PDMA4_SIZE,
  774. .count = VT1724_MT_PDMA4_COUNT,
  775. .start = VT1724_PDMA4_START,
  776. };
  777. static struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  778. .addr = VT1724_MT_RDMA1_ADDR,
  779. .size = VT1724_MT_RDMA1_SIZE,
  780. .count = VT1724_MT_RDMA1_COUNT,
  781. .start = VT1724_RDMA1_START,
  782. };
  783. /* update spdif control bits; call with reg_lock */
  784. static void update_spdif_bits(ice1712_t *ice, unsigned int val)
  785. {
  786. unsigned char cbit, disabled;
  787. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  788. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  789. if (cbit != disabled)
  790. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  791. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  792. if (cbit != disabled)
  793. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  794. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  795. }
  796. /* update SPDIF control bits according to the given rate */
  797. static void update_spdif_rate(ice1712_t *ice, unsigned int rate)
  798. {
  799. unsigned int val, nval;
  800. unsigned long flags;
  801. spin_lock_irqsave(&ice->reg_lock, flags);
  802. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  803. nval &= ~(7 << 12);
  804. switch (rate) {
  805. case 44100: break;
  806. case 48000: nval |= 2 << 12; break;
  807. case 32000: nval |= 3 << 12; break;
  808. }
  809. if (val != nval)
  810. update_spdif_bits(ice, nval);
  811. spin_unlock_irqrestore(&ice->reg_lock, flags);
  812. }
  813. static int snd_vt1724_playback_spdif_prepare(snd_pcm_substream_t * substream)
  814. {
  815. ice1712_t *ice = snd_pcm_substream_chip(substream);
  816. if (! ice->force_pdma4)
  817. update_spdif_rate(ice, substream->runtime->rate);
  818. return snd_vt1724_pcm_prepare(substream);
  819. }
  820. static int snd_vt1724_playback_spdif_open(snd_pcm_substream_t *substream)
  821. {
  822. ice1712_t *ice = snd_pcm_substream_chip(substream);
  823. snd_pcm_runtime_t *runtime = substream->runtime;
  824. runtime->private_data = &vt1724_playback_spdif_reg;
  825. ice->playback_con_substream = substream;
  826. if (ice->force_pdma4) {
  827. runtime->hw = snd_vt1724_2ch_stereo;
  828. set_rate_constraints(ice, substream);
  829. } else
  830. runtime->hw = snd_vt1724_spdif;
  831. snd_pcm_set_sync(substream);
  832. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  833. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  834. VT1724_BUFFER_ALIGN);
  835. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  836. VT1724_BUFFER_ALIGN);
  837. return 0;
  838. }
  839. static int snd_vt1724_playback_spdif_close(snd_pcm_substream_t * substream)
  840. {
  841. ice1712_t *ice = snd_pcm_substream_chip(substream);
  842. if (PRO_RATE_RESET)
  843. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  844. ice->playback_con_substream = NULL;
  845. return 0;
  846. }
  847. static int snd_vt1724_capture_spdif_open(snd_pcm_substream_t *substream)
  848. {
  849. ice1712_t *ice = snd_pcm_substream_chip(substream);
  850. snd_pcm_runtime_t *runtime = substream->runtime;
  851. runtime->private_data = &vt1724_capture_spdif_reg;
  852. ice->capture_con_substream = substream;
  853. if (ice->force_rdma1) {
  854. runtime->hw = snd_vt1724_2ch_stereo;
  855. set_rate_constraints(ice, substream);
  856. } else
  857. runtime->hw = snd_vt1724_spdif;
  858. snd_pcm_set_sync(substream);
  859. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  860. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  861. VT1724_BUFFER_ALIGN);
  862. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  863. VT1724_BUFFER_ALIGN);
  864. return 0;
  865. }
  866. static int snd_vt1724_capture_spdif_close(snd_pcm_substream_t * substream)
  867. {
  868. ice1712_t *ice = snd_pcm_substream_chip(substream);
  869. if (PRO_RATE_RESET)
  870. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  871. ice->capture_con_substream = NULL;
  872. return 0;
  873. }
  874. static snd_pcm_ops_t snd_vt1724_playback_spdif_ops = {
  875. .open = snd_vt1724_playback_spdif_open,
  876. .close = snd_vt1724_playback_spdif_close,
  877. .ioctl = snd_pcm_lib_ioctl,
  878. .hw_params = snd_vt1724_pcm_hw_params,
  879. .hw_free = snd_vt1724_pcm_hw_free,
  880. .prepare = snd_vt1724_playback_spdif_prepare,
  881. .trigger = snd_vt1724_pcm_trigger,
  882. .pointer = snd_vt1724_pcm_pointer,
  883. };
  884. static snd_pcm_ops_t snd_vt1724_capture_spdif_ops = {
  885. .open = snd_vt1724_capture_spdif_open,
  886. .close = snd_vt1724_capture_spdif_close,
  887. .ioctl = snd_pcm_lib_ioctl,
  888. .hw_params = snd_vt1724_pcm_hw_params,
  889. .hw_free = snd_vt1724_pcm_hw_free,
  890. .prepare = snd_vt1724_pcm_prepare,
  891. .trigger = snd_vt1724_pcm_trigger,
  892. .pointer = snd_vt1724_pcm_pointer,
  893. };
  894. static int __devinit snd_vt1724_pcm_spdif(ice1712_t * ice, int device)
  895. {
  896. char *name;
  897. snd_pcm_t *pcm;
  898. int play, capt;
  899. int err;
  900. if (ice->force_pdma4 ||
  901. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  902. play = 1;
  903. ice->has_spdif = 1;
  904. } else
  905. play = 0;
  906. if (ice->force_rdma1 ||
  907. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  908. capt = 1;
  909. ice->has_spdif = 1;
  910. } else
  911. capt = 0;
  912. if (! play && ! capt)
  913. return 0; /* no spdif device */
  914. if (ice->force_pdma4 || ice->force_rdma1)
  915. name = "ICE1724 Secondary";
  916. else
  917. name = "IEC1724 IEC958";
  918. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  919. if (err < 0)
  920. return err;
  921. if (play)
  922. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  923. &snd_vt1724_playback_spdif_ops);
  924. if (capt)
  925. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  926. &snd_vt1724_capture_spdif_ops);
  927. pcm->private_data = ice;
  928. pcm->info_flags = 0;
  929. strcpy(pcm->name, name);
  930. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  931. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  932. ice->pcm = pcm;
  933. return 0;
  934. }
  935. /*
  936. * independent surround PCMs
  937. */
  938. static struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  939. {
  940. .addr = VT1724_MT_PDMA1_ADDR,
  941. .size = VT1724_MT_PDMA1_SIZE,
  942. .count = VT1724_MT_PDMA1_COUNT,
  943. .start = VT1724_PDMA1_START,
  944. },
  945. {
  946. .addr = VT1724_MT_PDMA2_ADDR,
  947. .size = VT1724_MT_PDMA2_SIZE,
  948. .count = VT1724_MT_PDMA2_COUNT,
  949. .start = VT1724_PDMA2_START,
  950. },
  951. {
  952. .addr = VT1724_MT_PDMA3_ADDR,
  953. .size = VT1724_MT_PDMA3_SIZE,
  954. .count = VT1724_MT_PDMA3_COUNT,
  955. .start = VT1724_PDMA3_START,
  956. },
  957. };
  958. static int snd_vt1724_playback_indep_prepare(snd_pcm_substream_t * substream)
  959. {
  960. ice1712_t *ice = snd_pcm_substream_chip(substream);
  961. unsigned char val;
  962. spin_lock_irq(&ice->reg_lock);
  963. val = 3 - substream->number;
  964. if (inb(ICEMT1724(ice, BURST)) < val)
  965. outb(val, ICEMT1724(ice, BURST));
  966. spin_unlock_irq(&ice->reg_lock);
  967. return snd_vt1724_pcm_prepare(substream);
  968. }
  969. static int snd_vt1724_playback_indep_open(snd_pcm_substream_t *substream)
  970. {
  971. ice1712_t *ice = snd_pcm_substream_chip(substream);
  972. snd_pcm_runtime_t *runtime = substream->runtime;
  973. down(&ice->open_mutex);
  974. /* already used by PDMA0? */
  975. if (ice->pcm_reserved[substream->number]) {
  976. up(&ice->open_mutex);
  977. return -EBUSY; /* FIXME: should handle blocking mode properly */
  978. }
  979. up(&ice->open_mutex);
  980. runtime->private_data = &vt1724_playback_dma_regs[substream->number];
  981. ice->playback_con_substream_ds[substream->number] = substream;
  982. runtime->hw = snd_vt1724_2ch_stereo;
  983. snd_pcm_set_sync(substream);
  984. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  985. set_rate_constraints(ice, substream);
  986. return 0;
  987. }
  988. static int snd_vt1724_playback_indep_close(snd_pcm_substream_t * substream)
  989. {
  990. ice1712_t *ice = snd_pcm_substream_chip(substream);
  991. if (PRO_RATE_RESET)
  992. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  993. ice->playback_con_substream_ds[substream->number] = NULL;
  994. ice->pcm_reserved[substream->number] = NULL;
  995. return 0;
  996. }
  997. static snd_pcm_ops_t snd_vt1724_playback_indep_ops = {
  998. .open = snd_vt1724_playback_indep_open,
  999. .close = snd_vt1724_playback_indep_close,
  1000. .ioctl = snd_pcm_lib_ioctl,
  1001. .hw_params = snd_vt1724_pcm_hw_params,
  1002. .hw_free = snd_vt1724_pcm_hw_free,
  1003. .prepare = snd_vt1724_playback_indep_prepare,
  1004. .trigger = snd_vt1724_pcm_trigger,
  1005. .pointer = snd_vt1724_pcm_pointer,
  1006. };
  1007. static int __devinit snd_vt1724_pcm_indep(ice1712_t * ice, int device)
  1008. {
  1009. snd_pcm_t *pcm;
  1010. int play;
  1011. int err;
  1012. play = ice->num_total_dacs / 2 - 1;
  1013. if (play <= 0)
  1014. return 0;
  1015. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1016. if (err < 0)
  1017. return err;
  1018. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1019. &snd_vt1724_playback_indep_ops);
  1020. pcm->private_data = ice;
  1021. pcm->info_flags = 0;
  1022. strcpy(pcm->name, "ICE1724 Surround PCM");
  1023. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1024. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  1025. ice->pcm_ds = pcm;
  1026. return 0;
  1027. }
  1028. /*
  1029. * Mixer section
  1030. */
  1031. static int __devinit snd_vt1724_ac97_mixer(ice1712_t * ice)
  1032. {
  1033. int err;
  1034. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1035. ac97_bus_t *pbus;
  1036. ac97_template_t ac97;
  1037. static ac97_bus_ops_t ops = {
  1038. .write = snd_vt1724_ac97_write,
  1039. .read = snd_vt1724_ac97_read,
  1040. };
  1041. /* cold reset */
  1042. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1043. mdelay(5); /* FIXME */
  1044. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1045. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1046. return err;
  1047. memset(&ac97, 0, sizeof(ac97));
  1048. ac97.private_data = ice;
  1049. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1050. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1051. else
  1052. return 0;
  1053. }
  1054. /* I2S mixer only */
  1055. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1056. return 0;
  1057. }
  1058. /*
  1059. *
  1060. */
  1061. static inline unsigned int eeprom_triple(ice1712_t *ice, int idx)
  1062. {
  1063. return (unsigned int)ice->eeprom.data[idx] | \
  1064. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1065. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1066. }
  1067. static void snd_vt1724_proc_read(snd_info_entry_t *entry,
  1068. snd_info_buffer_t * buffer)
  1069. {
  1070. ice1712_t *ice = entry->private_data;
  1071. unsigned int idx;
  1072. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1073. snd_iprintf(buffer, "EEPROM:\n");
  1074. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1075. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1076. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1077. snd_iprintf(buffer, " System Config : 0x%x\n", ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1078. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP2_ACLINK]);
  1079. snd_iprintf(buffer, " I2S : 0x%x\n", ice->eeprom.data[ICE_EEP2_I2S]);
  1080. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP2_SPDIF]);
  1081. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1082. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1083. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1084. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1085. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1086. snd_iprintf(buffer, "\nRegisters:\n");
  1087. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1088. for (idx = 0x0; idx < 0x20 ; idx++)
  1089. snd_iprintf(buffer, " CCS%02x : 0x%02x\n", idx, inb(ice->port+idx));
  1090. for (idx = 0x0; idx < 0x30 ; idx++)
  1091. snd_iprintf(buffer, " MT%02x : 0x%02x\n", idx, inb(ice->profi_port+idx));
  1092. }
  1093. static void __devinit snd_vt1724_proc_init(ice1712_t * ice)
  1094. {
  1095. snd_info_entry_t *entry;
  1096. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1097. snd_info_set_text_ops(entry, ice, 1024, snd_vt1724_proc_read);
  1098. }
  1099. /*
  1100. *
  1101. */
  1102. static int snd_vt1724_eeprom_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1103. {
  1104. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1105. uinfo->count = sizeof(ice1712_eeprom_t);
  1106. return 0;
  1107. }
  1108. static int snd_vt1724_eeprom_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1109. {
  1110. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1111. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1112. return 0;
  1113. }
  1114. static snd_kcontrol_new_t snd_vt1724_eeprom __devinitdata = {
  1115. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1116. .name = "ICE1724 EEPROM",
  1117. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1118. .info = snd_vt1724_eeprom_info,
  1119. .get = snd_vt1724_eeprom_get
  1120. };
  1121. /*
  1122. */
  1123. static int snd_vt1724_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1124. {
  1125. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1126. uinfo->count = 1;
  1127. return 0;
  1128. }
  1129. static unsigned int encode_spdif_bits(snd_aes_iec958_t *diga)
  1130. {
  1131. unsigned int val;
  1132. val = diga->status[0] & 0x03; /* professional, non-audio */
  1133. if (val & 0x01) {
  1134. /* professional */
  1135. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
  1136. val |= 1U << 3;
  1137. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1138. case IEC958_AES0_PRO_FS_44100:
  1139. break;
  1140. case IEC958_AES0_PRO_FS_32000:
  1141. val |= 3U << 12;
  1142. break;
  1143. default:
  1144. val |= 2U << 12;
  1145. break;
  1146. }
  1147. } else {
  1148. /* consumer */
  1149. val |= diga->status[1] & 0x04; /* copyright */
  1150. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS)== IEC958_AES0_CON_EMPHASIS_5015)
  1151. val |= 1U << 3;
  1152. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1153. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1154. }
  1155. return val;
  1156. }
  1157. static void decode_spdif_bits(snd_aes_iec958_t *diga, unsigned int val)
  1158. {
  1159. memset(diga->status, 0, sizeof(diga->status));
  1160. diga->status[0] = val & 0x03; /* professional, non-audio */
  1161. if (val & 0x01) {
  1162. /* professional */
  1163. if (val & (1U << 3))
  1164. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1165. switch ((val >> 12) & 0x7) {
  1166. case 0:
  1167. break;
  1168. case 2:
  1169. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1170. break;
  1171. default:
  1172. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1173. break;
  1174. }
  1175. } else {
  1176. /* consumer */
  1177. diga->status[0] |= val & (1U << 2); /* copyright */
  1178. if (val & (1U << 3))
  1179. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1180. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1181. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1182. }
  1183. }
  1184. static int snd_vt1724_spdif_default_get(snd_kcontrol_t * kcontrol,
  1185. snd_ctl_elem_value_t * ucontrol)
  1186. {
  1187. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1188. unsigned int val;
  1189. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1190. decode_spdif_bits(&ucontrol->value.iec958, val);
  1191. return 0;
  1192. }
  1193. static int snd_vt1724_spdif_default_put(snd_kcontrol_t * kcontrol,
  1194. snd_ctl_elem_value_t * ucontrol)
  1195. {
  1196. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1197. unsigned int val, old;
  1198. val = encode_spdif_bits(&ucontrol->value.iec958);
  1199. spin_lock_irq(&ice->reg_lock);
  1200. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1201. if (val != old)
  1202. update_spdif_bits(ice, val);
  1203. spin_unlock_irq(&ice->reg_lock);
  1204. return (val != old);
  1205. }
  1206. static snd_kcontrol_new_t snd_vt1724_spdif_default __devinitdata =
  1207. {
  1208. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1209. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1210. .info = snd_vt1724_spdif_info,
  1211. .get = snd_vt1724_spdif_default_get,
  1212. .put = snd_vt1724_spdif_default_put
  1213. };
  1214. static int snd_vt1724_spdif_maskc_get(snd_kcontrol_t * kcontrol,
  1215. snd_ctl_elem_value_t * ucontrol)
  1216. {
  1217. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1218. IEC958_AES0_PROFESSIONAL |
  1219. IEC958_AES0_CON_NOT_COPYRIGHT |
  1220. IEC958_AES0_CON_EMPHASIS;
  1221. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1222. IEC958_AES1_CON_CATEGORY;
  1223. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1224. return 0;
  1225. }
  1226. static int snd_vt1724_spdif_maskp_get(snd_kcontrol_t * kcontrol,
  1227. snd_ctl_elem_value_t * ucontrol)
  1228. {
  1229. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1230. IEC958_AES0_PROFESSIONAL |
  1231. IEC958_AES0_PRO_FS |
  1232. IEC958_AES0_PRO_EMPHASIS;
  1233. return 0;
  1234. }
  1235. static snd_kcontrol_new_t snd_vt1724_spdif_maskc __devinitdata =
  1236. {
  1237. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1238. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1239. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1240. .info = snd_vt1724_spdif_info,
  1241. .get = snd_vt1724_spdif_maskc_get,
  1242. };
  1243. static snd_kcontrol_new_t snd_vt1724_spdif_maskp __devinitdata =
  1244. {
  1245. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1246. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1247. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1248. .info = snd_vt1724_spdif_info,
  1249. .get = snd_vt1724_spdif_maskp_get,
  1250. };
  1251. static int snd_vt1724_spdif_sw_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1252. {
  1253. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1254. uinfo->count = 1;
  1255. uinfo->value.integer.min = 0;
  1256. uinfo->value.integer.max = 1;
  1257. return 0;
  1258. }
  1259. static int snd_vt1724_spdif_sw_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1260. {
  1261. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1262. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1263. return 0;
  1264. }
  1265. static int snd_vt1724_spdif_sw_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1266. {
  1267. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1268. unsigned char old, val;
  1269. spin_lock_irq(&ice->reg_lock);
  1270. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1271. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1272. if (ucontrol->value.integer.value[0])
  1273. val |= VT1724_CFG_SPDIF_OUT_EN;
  1274. if (old != val)
  1275. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1276. spin_unlock_irq(&ice->reg_lock);
  1277. return old != val;
  1278. }
  1279. static snd_kcontrol_new_t snd_vt1724_spdif_switch __devinitdata =
  1280. {
  1281. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1282. /* FIXME: the following conflict with IEC958 Playback Route */
  1283. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1284. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1285. .info = snd_vt1724_spdif_sw_info,
  1286. .get = snd_vt1724_spdif_sw_get,
  1287. .put = snd_vt1724_spdif_sw_put
  1288. };
  1289. #if 0 /* NOT USED YET */
  1290. /*
  1291. * GPIO access from extern
  1292. */
  1293. int snd_vt1724_gpio_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1294. {
  1295. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1296. uinfo->count = 1;
  1297. uinfo->value.integer.min = 0;
  1298. uinfo->value.integer.max = 1;
  1299. return 0;
  1300. }
  1301. int snd_vt1724_gpio_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1302. {
  1303. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1304. int shift = kcontrol->private_value & 0xff;
  1305. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1306. snd_ice1712_save_gpio_status(ice);
  1307. ucontrol->value.integer.value[0] = (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1308. snd_ice1712_restore_gpio_status(ice);
  1309. return 0;
  1310. }
  1311. int snd_ice1712_gpio_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1312. {
  1313. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1314. int shift = kcontrol->private_value & 0xff;
  1315. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1316. unsigned int val, nval;
  1317. if (kcontrol->private_value & (1 << 31))
  1318. return -EPERM;
  1319. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1320. snd_ice1712_save_gpio_status(ice);
  1321. val = snd_ice1712_gpio_read(ice);
  1322. nval |= val & ~(1 << shift);
  1323. if (val != nval)
  1324. snd_ice1712_gpio_write(ice, nval);
  1325. snd_ice1712_restore_gpio_status(ice);
  1326. return val != nval;
  1327. }
  1328. #endif /* NOT USED YET */
  1329. /*
  1330. * rate
  1331. */
  1332. static int snd_vt1724_pro_internal_clock_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1333. {
  1334. static char *texts_1724[] = {
  1335. "8000", /* 0: 6 */
  1336. "9600", /* 1: 3 */
  1337. "11025", /* 2: 10 */
  1338. "12000", /* 3: 2 */
  1339. "16000", /* 4: 5 */
  1340. "22050", /* 5: 9 */
  1341. "24000", /* 6: 1 */
  1342. "32000", /* 7: 4 */
  1343. "44100", /* 8: 8 */
  1344. "48000", /* 9: 0 */
  1345. "64000", /* 10: 15 */
  1346. "88200", /* 11: 11 */
  1347. "96000", /* 12: 7 */
  1348. "176400", /* 13: 12 */
  1349. "192000", /* 14: 14 */
  1350. "IEC958 Input", /* 15: -- */
  1351. };
  1352. static char *texts_1720[] = {
  1353. "8000", /* 0: 6 */
  1354. "9600", /* 1: 3 */
  1355. "11025", /* 2: 10 */
  1356. "12000", /* 3: 2 */
  1357. "16000", /* 4: 5 */
  1358. "22050", /* 5: 9 */
  1359. "24000", /* 6: 1 */
  1360. "32000", /* 7: 4 */
  1361. "44100", /* 8: 8 */
  1362. "48000", /* 9: 0 */
  1363. "64000", /* 10: 15 */
  1364. "88200", /* 11: 11 */
  1365. "96000", /* 12: 7 */
  1366. "IEC958 Input", /* 13: -- */
  1367. };
  1368. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1369. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1370. uinfo->count = 1;
  1371. uinfo->value.enumerated.items = ice->vt1720 ? 14 : 16;
  1372. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1373. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1374. strcpy(uinfo->value.enumerated.name,
  1375. ice->vt1720 ? texts_1720[uinfo->value.enumerated.item] :
  1376. texts_1724[uinfo->value.enumerated.item]);
  1377. return 0;
  1378. }
  1379. static int snd_vt1724_pro_internal_clock_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1380. {
  1381. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1382. static unsigned char xlate[16] = {
  1383. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 13, 255, 14, 10
  1384. };
  1385. unsigned char val;
  1386. spin_lock_irq(&ice->reg_lock);
  1387. if (is_spdif_master(ice)) {
  1388. ucontrol->value.enumerated.item[0] = ice->vt1720 ? 13 : 15;
  1389. } else {
  1390. val = xlate[inb(ICEMT1724(ice, RATE)) & 15];
  1391. if (val == 255) {
  1392. snd_BUG();
  1393. val = 0;
  1394. }
  1395. ucontrol->value.enumerated.item[0] = val;
  1396. }
  1397. spin_unlock_irq(&ice->reg_lock);
  1398. return 0;
  1399. }
  1400. static int snd_vt1724_pro_internal_clock_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1401. {
  1402. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1403. unsigned char oval;
  1404. int rate;
  1405. int change = 0;
  1406. int spdif = ice->vt1720 ? 13 : 15;
  1407. spin_lock_irq(&ice->reg_lock);
  1408. oval = inb(ICEMT1724(ice, RATE));
  1409. if (ucontrol->value.enumerated.item[0] == spdif) {
  1410. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1411. } else {
  1412. rate = rates[ucontrol->value.integer.value[0] % 15];
  1413. if (rate <= get_max_rate(ice)) {
  1414. PRO_RATE_DEFAULT = rate;
  1415. spin_unlock_irq(&ice->reg_lock);
  1416. snd_vt1724_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1417. spin_lock_irq(&ice->reg_lock);
  1418. }
  1419. }
  1420. change = inb(ICEMT1724(ice, RATE)) != oval;
  1421. spin_unlock_irq(&ice->reg_lock);
  1422. if ((oval & VT1724_SPDIF_MASTER) != (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER)) {
  1423. /* notify akm chips as well */
  1424. if (is_spdif_master(ice)) {
  1425. unsigned int i;
  1426. for (i = 0; i < ice->akm_codecs; i++) {
  1427. if (ice->akm[i].ops.set_rate_val)
  1428. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1429. }
  1430. }
  1431. }
  1432. return change;
  1433. }
  1434. static snd_kcontrol_new_t snd_vt1724_pro_internal_clock __devinitdata = {
  1435. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1436. .name = "Multi Track Internal Clock",
  1437. .info = snd_vt1724_pro_internal_clock_info,
  1438. .get = snd_vt1724_pro_internal_clock_get,
  1439. .put = snd_vt1724_pro_internal_clock_put
  1440. };
  1441. static int snd_vt1724_pro_rate_locking_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1442. {
  1443. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1444. uinfo->count = 1;
  1445. uinfo->value.integer.min = 0;
  1446. uinfo->value.integer.max = 1;
  1447. return 0;
  1448. }
  1449. static int snd_vt1724_pro_rate_locking_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1450. {
  1451. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1452. return 0;
  1453. }
  1454. static int snd_vt1724_pro_rate_locking_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1455. {
  1456. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1457. int change = 0, nval;
  1458. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1459. spin_lock_irq(&ice->reg_lock);
  1460. change = PRO_RATE_LOCKED != nval;
  1461. PRO_RATE_LOCKED = nval;
  1462. spin_unlock_irq(&ice->reg_lock);
  1463. return change;
  1464. }
  1465. static snd_kcontrol_new_t snd_vt1724_pro_rate_locking __devinitdata = {
  1466. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1467. .name = "Multi Track Rate Locking",
  1468. .info = snd_vt1724_pro_rate_locking_info,
  1469. .get = snd_vt1724_pro_rate_locking_get,
  1470. .put = snd_vt1724_pro_rate_locking_put
  1471. };
  1472. static int snd_vt1724_pro_rate_reset_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1473. {
  1474. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1475. uinfo->count = 1;
  1476. uinfo->value.integer.min = 0;
  1477. uinfo->value.integer.max = 1;
  1478. return 0;
  1479. }
  1480. static int snd_vt1724_pro_rate_reset_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1481. {
  1482. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1483. return 0;
  1484. }
  1485. static int snd_vt1724_pro_rate_reset_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1486. {
  1487. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1488. int change = 0, nval;
  1489. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1490. spin_lock_irq(&ice->reg_lock);
  1491. change = PRO_RATE_RESET != nval;
  1492. PRO_RATE_RESET = nval;
  1493. spin_unlock_irq(&ice->reg_lock);
  1494. return change;
  1495. }
  1496. static snd_kcontrol_new_t snd_vt1724_pro_rate_reset __devinitdata = {
  1497. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1498. .name = "Multi Track Rate Reset",
  1499. .info = snd_vt1724_pro_rate_reset_info,
  1500. .get = snd_vt1724_pro_rate_reset_get,
  1501. .put = snd_vt1724_pro_rate_reset_put
  1502. };
  1503. /*
  1504. * routing
  1505. */
  1506. static int snd_vt1724_pro_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1507. {
  1508. static char *texts[] = {
  1509. "PCM Out", /* 0 */
  1510. "H/W In 0", "H/W In 1", /* 1-2 */
  1511. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1512. };
  1513. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1514. uinfo->count = 1;
  1515. uinfo->value.enumerated.items = 5;
  1516. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1517. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1518. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1519. return 0;
  1520. }
  1521. static inline int analog_route_shift(int idx)
  1522. {
  1523. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1524. }
  1525. static inline int digital_route_shift(int idx)
  1526. {
  1527. return idx * 3;
  1528. }
  1529. static int get_route_val(ice1712_t *ice, int shift)
  1530. {
  1531. unsigned long val;
  1532. unsigned char eitem;
  1533. static unsigned char xlate[8] = {
  1534. 0, 255, 1, 2, 255, 255, 3, 4,
  1535. };
  1536. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1537. val >>= shift;
  1538. val &= 7; //we now have 3 bits per output
  1539. eitem = xlate[val];
  1540. if (eitem == 255) {
  1541. snd_BUG();
  1542. return 0;
  1543. }
  1544. return eitem;
  1545. }
  1546. static int put_route_val(ice1712_t *ice, unsigned int val, int shift)
  1547. {
  1548. unsigned int old_val, nval;
  1549. int change;
  1550. static unsigned char xroute[8] = {
  1551. 0, /* PCM */
  1552. 2, /* PSDIN0 Left */
  1553. 3, /* PSDIN0 Right */
  1554. 6, /* SPDIN Left */
  1555. 7, /* SPDIN Right */
  1556. };
  1557. nval = xroute[val % 5];
  1558. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1559. val &= ~(0x07 << shift);
  1560. val |= nval << shift;
  1561. change = val != old_val;
  1562. if (change)
  1563. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1564. return change;
  1565. }
  1566. static int snd_vt1724_pro_route_analog_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1567. {
  1568. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1569. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1570. ucontrol->value.enumerated.item[0] = get_route_val(ice, analog_route_shift(idx));
  1571. return 0;
  1572. }
  1573. static int snd_vt1724_pro_route_analog_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1574. {
  1575. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1576. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1577. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1578. analog_route_shift(idx));
  1579. }
  1580. static int snd_vt1724_pro_route_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1581. {
  1582. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1583. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1584. ucontrol->value.enumerated.item[0] = get_route_val(ice, digital_route_shift(idx));
  1585. return 0;
  1586. }
  1587. static int snd_vt1724_pro_route_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  1588. {
  1589. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1590. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1591. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1592. digital_route_shift(idx));
  1593. }
  1594. static snd_kcontrol_new_t snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1595. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1596. .name = "H/W Playback Route",
  1597. .info = snd_vt1724_pro_route_info,
  1598. .get = snd_vt1724_pro_route_analog_get,
  1599. .put = snd_vt1724_pro_route_analog_put,
  1600. };
  1601. static snd_kcontrol_new_t snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1602. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1603. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1604. .info = snd_vt1724_pro_route_info,
  1605. .get = snd_vt1724_pro_route_spdif_get,
  1606. .put = snd_vt1724_pro_route_spdif_put,
  1607. .count = 2,
  1608. };
  1609. static int snd_vt1724_pro_peak_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  1610. {
  1611. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1612. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1613. uinfo->value.integer.min = 0;
  1614. uinfo->value.integer.max = 255;
  1615. return 0;
  1616. }
  1617. static int snd_vt1724_pro_peak_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1618. {
  1619. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  1620. int idx;
  1621. spin_lock_irq(&ice->reg_lock);
  1622. for (idx = 0; idx < 22; idx++) {
  1623. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1624. ucontrol->value.integer.value[idx] = inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1625. }
  1626. spin_unlock_irq(&ice->reg_lock);
  1627. return 0;
  1628. }
  1629. static snd_kcontrol_new_t snd_vt1724_mixer_pro_peak __devinitdata = {
  1630. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1631. .name = "Multi Track Peak",
  1632. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1633. .info = snd_vt1724_pro_peak_info,
  1634. .get = snd_vt1724_pro_peak_get
  1635. };
  1636. /*
  1637. *
  1638. */
  1639. static struct snd_ice1712_card_info no_matched __devinitdata;
  1640. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1641. snd_vt1724_revo_cards,
  1642. snd_vt1724_amp_cards,
  1643. snd_vt1724_aureon_cards,
  1644. snd_vt1720_mobo_cards,
  1645. snd_vt1720_pontis_cards,
  1646. snd_vt1724_prodigy192_cards,
  1647. snd_vt1724_juli_cards,
  1648. snd_vt1724_phase_cards,
  1649. NULL,
  1650. };
  1651. /*
  1652. */
  1653. static void wait_i2c_busy(ice1712_t *ice)
  1654. {
  1655. int t = 0x10000;
  1656. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1657. ;
  1658. if (t == -1)
  1659. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1660. }
  1661. unsigned char snd_vt1724_read_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr)
  1662. {
  1663. unsigned char val;
  1664. down(&ice->i2c_mutex);
  1665. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1666. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1667. wait_i2c_busy(ice);
  1668. val = inb(ICEREG1724(ice, I2C_DATA));
  1669. up(&ice->i2c_mutex);
  1670. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1671. return val;
  1672. }
  1673. void snd_vt1724_write_i2c(ice1712_t *ice, unsigned char dev, unsigned char addr, unsigned char data)
  1674. {
  1675. down(&ice->i2c_mutex);
  1676. wait_i2c_busy(ice);
  1677. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1678. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1679. outb(data, ICEREG1724(ice, I2C_DATA));
  1680. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1681. wait_i2c_busy(ice);
  1682. up(&ice->i2c_mutex);
  1683. }
  1684. static int __devinit snd_vt1724_read_eeprom(ice1712_t *ice, const char *modelname)
  1685. {
  1686. const int dev = 0xa0; /* EEPROM device address */
  1687. unsigned int i, size;
  1688. struct snd_ice1712_card_info **tbl, *c;
  1689. if (! modelname || ! *modelname) {
  1690. ice->eeprom.subvendor = 0;
  1691. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1692. ice->eeprom.subvendor =
  1693. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1694. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1695. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1696. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1697. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  1698. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  1699. u16 vendor, device;
  1700. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  1701. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1702. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1703. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  1704. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1705. return -ENXIO;
  1706. }
  1707. }
  1708. }
  1709. for (tbl = card_tables; *tbl; tbl++) {
  1710. for (c = *tbl; c->subvendor; c++) {
  1711. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  1712. printk(KERN_INFO "ice1724: Using board model %s\n", c->name);
  1713. ice->eeprom.subvendor = c->subvendor;
  1714. } else if (c->subvendor != ice->eeprom.subvendor)
  1715. continue;
  1716. if (! c->eeprom_size || ! c->eeprom_data)
  1717. goto found;
  1718. /* if the EEPROM is given by the driver, use it */
  1719. snd_printdd("using the defined eeprom..\n");
  1720. ice->eeprom.version = 2;
  1721. ice->eeprom.size = c->eeprom_size + 6;
  1722. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1723. goto read_skipped;
  1724. }
  1725. }
  1726. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n", ice->eeprom.subvendor);
  1727. found:
  1728. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1729. if (ice->eeprom.size < 6)
  1730. ice->eeprom.size = 32;
  1731. else if (ice->eeprom.size > 32) {
  1732. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n", ice->eeprom.size);
  1733. return -EIO;
  1734. }
  1735. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1736. if (ice->eeprom.version != 2)
  1737. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n", ice->eeprom.version);
  1738. size = ice->eeprom.size - 6;
  1739. for (i = 0; i < size; i++)
  1740. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1741. read_skipped:
  1742. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1743. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1744. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1745. return 0;
  1746. }
  1747. static int __devinit snd_vt1724_chip_init(ice1712_t *ice)
  1748. {
  1749. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1750. udelay(200);
  1751. outb(0, ICEREG1724(ice, CONTROL));
  1752. udelay(200);
  1753. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1754. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1755. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1756. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1757. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1758. ice->gpio.direction = ice->eeprom.gpiodir;
  1759. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1760. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1761. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1762. outb(0, ICEREG1724(ice, POWERDOWN));
  1763. return 0;
  1764. }
  1765. static int __devinit snd_vt1724_spdif_build_controls(ice1712_t *ice)
  1766. {
  1767. int err;
  1768. snd_kcontrol_t *kctl;
  1769. snd_assert(ice->pcm != NULL, return -EIO);
  1770. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1771. if (err < 0)
  1772. return err;
  1773. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1774. if (err < 0)
  1775. return err;
  1776. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1777. if (err < 0)
  1778. return err;
  1779. kctl->id.device = ice->pcm->device;
  1780. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1781. if (err < 0)
  1782. return err;
  1783. kctl->id.device = ice->pcm->device;
  1784. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1785. if (err < 0)
  1786. return err;
  1787. kctl->id.device = ice->pcm->device;
  1788. #if 0 /* use default only */
  1789. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1790. if (err < 0)
  1791. return err;
  1792. kctl->id.device = ice->pcm->device;
  1793. ice->spdif.stream_ctl = kctl;
  1794. #endif
  1795. return 0;
  1796. }
  1797. static int __devinit snd_vt1724_build_controls(ice1712_t *ice)
  1798. {
  1799. int err;
  1800. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1801. if (err < 0)
  1802. return err;
  1803. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1804. if (err < 0)
  1805. return err;
  1806. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1807. if (err < 0)
  1808. return err;
  1809. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1810. if (err < 0)
  1811. return err;
  1812. if (ice->num_total_dacs > 0) {
  1813. snd_kcontrol_new_t tmp = snd_vt1724_mixer_pro_analog_route;
  1814. tmp.count = ice->num_total_dacs;
  1815. if (ice->vt1720 && tmp.count > 2)
  1816. tmp.count = 2;
  1817. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1818. if (err < 0)
  1819. return err;
  1820. }
  1821. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1822. if (err < 0)
  1823. return err;
  1824. return 0;
  1825. }
  1826. static int snd_vt1724_free(ice1712_t *ice)
  1827. {
  1828. if (! ice->port)
  1829. goto __hw_end;
  1830. /* mask all interrupts */
  1831. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1832. outb(0xff, ICEREG1724(ice, IRQMASK));
  1833. /* --- */
  1834. __hw_end:
  1835. if (ice->irq >= 0) {
  1836. synchronize_irq(ice->irq);
  1837. free_irq(ice->irq, (void *) ice);
  1838. }
  1839. pci_release_regions(ice->pci);
  1840. snd_ice1712_akm4xxx_free(ice);
  1841. pci_disable_device(ice->pci);
  1842. kfree(ice);
  1843. return 0;
  1844. }
  1845. static int snd_vt1724_dev_free(snd_device_t *device)
  1846. {
  1847. ice1712_t *ice = device->device_data;
  1848. return snd_vt1724_free(ice);
  1849. }
  1850. static int __devinit snd_vt1724_create(snd_card_t * card,
  1851. struct pci_dev *pci,
  1852. const char *modelname,
  1853. ice1712_t ** r_ice1712)
  1854. {
  1855. ice1712_t *ice;
  1856. int err;
  1857. unsigned char mask;
  1858. static snd_device_ops_t ops = {
  1859. .dev_free = snd_vt1724_dev_free,
  1860. };
  1861. *r_ice1712 = NULL;
  1862. /* enable PCI device */
  1863. if ((err = pci_enable_device(pci)) < 0)
  1864. return err;
  1865. ice = kcalloc(1, sizeof(*ice), GFP_KERNEL);
  1866. if (ice == NULL) {
  1867. pci_disable_device(pci);
  1868. return -ENOMEM;
  1869. }
  1870. ice->vt1724 = 1;
  1871. spin_lock_init(&ice->reg_lock);
  1872. init_MUTEX(&ice->gpio_mutex);
  1873. init_MUTEX(&ice->open_mutex);
  1874. init_MUTEX(&ice->i2c_mutex);
  1875. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1876. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1877. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1878. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1879. ice->card = card;
  1880. ice->pci = pci;
  1881. ice->irq = -1;
  1882. pci_set_master(pci);
  1883. snd_vt1724_proc_init(ice);
  1884. synchronize_irq(pci->irq);
  1885. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1886. kfree(ice);
  1887. pci_disable_device(pci);
  1888. return err;
  1889. }
  1890. ice->port = pci_resource_start(pci, 0);
  1891. ice->profi_port = pci_resource_start(pci, 1);
  1892. if (request_irq(pci->irq, snd_vt1724_interrupt, SA_INTERRUPT|SA_SHIRQ, "ICE1724", (void *) ice)) {
  1893. snd_printk("unable to grab IRQ %d\n", pci->irq);
  1894. snd_vt1724_free(ice);
  1895. return -EIO;
  1896. }
  1897. ice->irq = pci->irq;
  1898. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  1899. snd_vt1724_free(ice);
  1900. return -EIO;
  1901. }
  1902. if (snd_vt1724_chip_init(ice) < 0) {
  1903. snd_vt1724_free(ice);
  1904. return -EIO;
  1905. }
  1906. /* unmask used interrupts */
  1907. if (! (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401))
  1908. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  1909. else
  1910. mask = 0;
  1911. outb(mask, ICEREG1724(ice, IRQMASK));
  1912. /* don't handle FIFO overrun/underruns (just yet), since they cause machine lockups */
  1913. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  1914. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  1915. snd_vt1724_free(ice);
  1916. return err;
  1917. }
  1918. snd_card_set_dev(card, &pci->dev);
  1919. *r_ice1712 = ice;
  1920. return 0;
  1921. }
  1922. /*
  1923. *
  1924. * Registration
  1925. *
  1926. */
  1927. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  1928. const struct pci_device_id *pci_id)
  1929. {
  1930. static int dev;
  1931. snd_card_t *card;
  1932. ice1712_t *ice;
  1933. int pcm_dev = 0, err;
  1934. struct snd_ice1712_card_info **tbl, *c;
  1935. if (dev >= SNDRV_CARDS)
  1936. return -ENODEV;
  1937. if (!enable[dev]) {
  1938. dev++;
  1939. return -ENOENT;
  1940. }
  1941. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1942. if (card == NULL)
  1943. return -ENOMEM;
  1944. strcpy(card->driver, "ICE1724");
  1945. strcpy(card->shortname, "ICEnsemble ICE1724");
  1946. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  1947. snd_card_free(card);
  1948. return err;
  1949. }
  1950. for (tbl = card_tables; *tbl; tbl++) {
  1951. for (c = *tbl; c->subvendor; c++) {
  1952. if (c->subvendor == ice->eeprom.subvendor) {
  1953. strcpy(card->shortname, c->name);
  1954. if (c->driver) /* specific driver? */
  1955. strcpy(card->driver, c->driver);
  1956. if (c->chip_init) {
  1957. if ((err = c->chip_init(ice)) < 0) {
  1958. snd_card_free(card);
  1959. return err;
  1960. }
  1961. }
  1962. goto __found;
  1963. }
  1964. }
  1965. }
  1966. c = &no_matched;
  1967. __found:
  1968. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  1969. snd_card_free(card);
  1970. return err;
  1971. }
  1972. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  1973. snd_card_free(card);
  1974. return err;
  1975. }
  1976. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  1977. snd_card_free(card);
  1978. return err;
  1979. }
  1980. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  1981. snd_card_free(card);
  1982. return err;
  1983. }
  1984. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  1985. snd_card_free(card);
  1986. return err;
  1987. }
  1988. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  1989. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  1990. snd_card_free(card);
  1991. return err;
  1992. }
  1993. }
  1994. if (c->build_controls) {
  1995. if ((err = c->build_controls(ice)) < 0) {
  1996. snd_card_free(card);
  1997. return err;
  1998. }
  1999. }
  2000. if (! c->no_mpu401) {
  2001. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2002. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2003. ICEREG1724(ice, MPU_CTRL), 1,
  2004. ice->irq, 0,
  2005. &ice->rmidi[0])) < 0) {
  2006. snd_card_free(card);
  2007. return err;
  2008. }
  2009. }
  2010. }
  2011. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2012. card->shortname, ice->port, ice->irq);
  2013. if ((err = snd_card_register(card)) < 0) {
  2014. snd_card_free(card);
  2015. return err;
  2016. }
  2017. pci_set_drvdata(pci, card);
  2018. dev++;
  2019. return 0;
  2020. }
  2021. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2022. {
  2023. snd_card_free(pci_get_drvdata(pci));
  2024. pci_set_drvdata(pci, NULL);
  2025. }
  2026. static struct pci_driver driver = {
  2027. .name = "ICE1724",
  2028. .id_table = snd_vt1724_ids,
  2029. .probe = snd_vt1724_probe,
  2030. .remove = __devexit_p(snd_vt1724_remove),
  2031. };
  2032. static int __init alsa_card_ice1724_init(void)
  2033. {
  2034. return pci_register_driver(&driver);
  2035. }
  2036. static void __exit alsa_card_ice1724_exit(void)
  2037. {
  2038. pci_unregister_driver(&driver);
  2039. }
  2040. module_init(alsa_card_ice1724_init)
  2041. module_exit(alsa_card_ice1724_exit)