ad1848_lib.c 37 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of AD1848/AD1847/CS4248
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define SNDRV_MAIN_OBJECT_FILE
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/pm.h>
  27. #include <linux/slab.h>
  28. #include <linux/ioport.h>
  29. #include <sound/core.h>
  30. #include <sound/ad1848.h>
  31. #include <sound/control.h>
  32. #include <sound/pcm_params.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  36. MODULE_DESCRIPTION("Routines for control of AD1848/AD1847/CS4248");
  37. MODULE_LICENSE("GPL");
  38. #if 0
  39. #define SNDRV_DEBUG_MCE
  40. #endif
  41. /*
  42. * Some variables
  43. */
  44. static unsigned char freq_bits[14] = {
  45. /* 5510 */ 0x00 | AD1848_XTAL2,
  46. /* 6620 */ 0x0E | AD1848_XTAL2,
  47. /* 8000 */ 0x00 | AD1848_XTAL1,
  48. /* 9600 */ 0x0E | AD1848_XTAL1,
  49. /* 11025 */ 0x02 | AD1848_XTAL2,
  50. /* 16000 */ 0x02 | AD1848_XTAL1,
  51. /* 18900 */ 0x04 | AD1848_XTAL2,
  52. /* 22050 */ 0x06 | AD1848_XTAL2,
  53. /* 27042 */ 0x04 | AD1848_XTAL1,
  54. /* 32000 */ 0x06 | AD1848_XTAL1,
  55. /* 33075 */ 0x0C | AD1848_XTAL2,
  56. /* 37800 */ 0x08 | AD1848_XTAL2,
  57. /* 44100 */ 0x0A | AD1848_XTAL2,
  58. /* 48000 */ 0x0C | AD1848_XTAL1
  59. };
  60. static unsigned int rates[14] = {
  61. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  62. 27042, 32000, 33075, 37800, 44100, 48000
  63. };
  64. static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
  65. .count = 14,
  66. .list = rates,
  67. .mask = 0,
  68. };
  69. static unsigned char snd_ad1848_original_image[16] =
  70. {
  71. 0x00, /* 00 - lic */
  72. 0x00, /* 01 - ric */
  73. 0x9f, /* 02 - la1ic */
  74. 0x9f, /* 03 - ra1ic */
  75. 0x9f, /* 04 - la2ic */
  76. 0x9f, /* 05 - ra2ic */
  77. 0xbf, /* 06 - loc */
  78. 0xbf, /* 07 - roc */
  79. 0x20, /* 08 - dfr */
  80. AD1848_AUTOCALIB, /* 09 - ic */
  81. 0x00, /* 0a - pc */
  82. 0x00, /* 0b - ti */
  83. 0x00, /* 0c - mi */
  84. 0x00, /* 0d - lbc */
  85. 0x00, /* 0e - dru */
  86. 0x00, /* 0f - drl */
  87. };
  88. /*
  89. * Basic I/O functions
  90. */
  91. void snd_ad1848_out(ad1848_t *chip,
  92. unsigned char reg,
  93. unsigned char value)
  94. {
  95. int timeout;
  96. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  97. udelay(100);
  98. #ifdef CONFIG_SND_DEBUG
  99. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  100. snd_printk("auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
  101. #endif
  102. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  103. outb(chip->image[reg] = value, AD1848P(chip, REG));
  104. mb();
  105. #if 0
  106. printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
  107. #endif
  108. }
  109. static void snd_ad1848_dout(ad1848_t *chip,
  110. unsigned char reg, unsigned char value)
  111. {
  112. int timeout;
  113. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  114. udelay(100);
  115. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  116. outb(value, AD1848P(chip, REG));
  117. mb();
  118. }
  119. static unsigned char snd_ad1848_in(ad1848_t *chip, unsigned char reg)
  120. {
  121. int timeout;
  122. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  123. udelay(100);
  124. #ifdef CONFIG_SND_DEBUG
  125. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  126. snd_printk("auto calibration time out - reg = 0x%x\n", reg);
  127. #endif
  128. outb(chip->mce_bit | reg, AD1848P(chip, REGSEL));
  129. mb();
  130. return inb(AD1848P(chip, REG));
  131. }
  132. #if 0
  133. static void snd_ad1848_debug(ad1848_t *chip)
  134. {
  135. printk("AD1848 REGS: INDEX = 0x%02x ", inb(AD1848P(chip, REGSEL)));
  136. printk(" STATUS = 0x%02x\n", inb(AD1848P(chip, STATUS)));
  137. printk(" 0x00: left input = 0x%02x ", snd_ad1848_in(chip, 0x00));
  138. printk(" 0x08: playback format = 0x%02x\n", snd_ad1848_in(chip, 0x08));
  139. printk(" 0x01: right input = 0x%02x ", snd_ad1848_in(chip, 0x01));
  140. printk(" 0x09: iface (CFIG 1) = 0x%02x\n", snd_ad1848_in(chip, 0x09));
  141. printk(" 0x02: AUXA left = 0x%02x ", snd_ad1848_in(chip, 0x02));
  142. printk(" 0x0a: pin control = 0x%02x\n", snd_ad1848_in(chip, 0x0a));
  143. printk(" 0x03: AUXA right = 0x%02x ", snd_ad1848_in(chip, 0x03));
  144. printk(" 0x0b: init & status = 0x%02x\n", snd_ad1848_in(chip, 0x0b));
  145. printk(" 0x04: AUXB left = 0x%02x ", snd_ad1848_in(chip, 0x04));
  146. printk(" 0x0c: revision & mode = 0x%02x\n", snd_ad1848_in(chip, 0x0c));
  147. printk(" 0x05: AUXB right = 0x%02x ", snd_ad1848_in(chip, 0x05));
  148. printk(" 0x0d: loopback = 0x%02x\n", snd_ad1848_in(chip, 0x0d));
  149. printk(" 0x06: left output = 0x%02x ", snd_ad1848_in(chip, 0x06));
  150. printk(" 0x0e: data upr count = 0x%02x\n", snd_ad1848_in(chip, 0x0e));
  151. printk(" 0x07: right output = 0x%02x ", snd_ad1848_in(chip, 0x07));
  152. printk(" 0x0f: data lwr count = 0x%02x\n", snd_ad1848_in(chip, 0x0f));
  153. }
  154. #endif
  155. /*
  156. * AD1848 detection / MCE routines
  157. */
  158. static void snd_ad1848_mce_up(ad1848_t *chip)
  159. {
  160. unsigned long flags;
  161. int timeout;
  162. for (timeout = 250; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  163. udelay(100);
  164. #ifdef CONFIG_SND_DEBUG
  165. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  166. snd_printk("mce_up - auto calibration time out (0)\n");
  167. #endif
  168. spin_lock_irqsave(&chip->reg_lock, flags);
  169. chip->mce_bit |= AD1848_MCE;
  170. timeout = inb(AD1848P(chip, REGSEL));
  171. if (timeout == 0x80)
  172. snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
  173. if (!(timeout & AD1848_MCE))
  174. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  175. spin_unlock_irqrestore(&chip->reg_lock, flags);
  176. }
  177. static void snd_ad1848_mce_down(ad1848_t *chip)
  178. {
  179. unsigned long flags;
  180. int timeout;
  181. signed long time;
  182. spin_lock_irqsave(&chip->reg_lock, flags);
  183. for (timeout = 5; timeout > 0; timeout--)
  184. inb(AD1848P(chip, REGSEL));
  185. /* end of cleanup sequence */
  186. for (timeout = 12000; timeout > 0 && (inb(AD1848P(chip, REGSEL)) & AD1848_INIT); timeout--)
  187. udelay(100);
  188. #if 0
  189. printk("(1) timeout = %i\n", timeout);
  190. #endif
  191. #ifdef CONFIG_SND_DEBUG
  192. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  193. snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", AD1848P(chip, REGSEL));
  194. #endif
  195. chip->mce_bit &= ~AD1848_MCE;
  196. timeout = inb(AD1848P(chip, REGSEL));
  197. outb(chip->mce_bit | (timeout & 0x1f), AD1848P(chip, REGSEL));
  198. if (timeout == 0x80)
  199. snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
  200. if ((timeout & AD1848_MCE) == 0) {
  201. spin_unlock_irqrestore(&chip->reg_lock, flags);
  202. return;
  203. }
  204. /* calibration process */
  205. for (timeout = 500; timeout > 0 && (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0; timeout--);
  206. if ((snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) == 0) {
  207. snd_printd("mce_down - auto calibration time out (1)\n");
  208. spin_unlock_irqrestore(&chip->reg_lock, flags);
  209. return;
  210. }
  211. #if 0
  212. printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
  213. #endif
  214. time = HZ / 4;
  215. while (snd_ad1848_in(chip, AD1848_TEST_INIT) & AD1848_CALIB_IN_PROGRESS) {
  216. spin_unlock_irqrestore(&chip->reg_lock, flags);
  217. if (time <= 0) {
  218. snd_printk("mce_down - auto calibration time out (2)\n");
  219. return;
  220. }
  221. set_current_state(TASK_INTERRUPTIBLE);
  222. time = schedule_timeout(time);
  223. spin_lock_irqsave(&chip->reg_lock, flags);
  224. }
  225. #if 0
  226. printk("(3) jiffies = %li\n", jiffies);
  227. #endif
  228. time = HZ / 10;
  229. while (inb(AD1848P(chip, REGSEL)) & AD1848_INIT) {
  230. spin_unlock_irqrestore(&chip->reg_lock, flags);
  231. if (time <= 0) {
  232. snd_printk("mce_down - auto calibration time out (3)\n");
  233. return;
  234. }
  235. set_current_state(TASK_INTERRUPTIBLE);
  236. time = schedule_timeout(time);
  237. spin_lock_irqsave(&chip->reg_lock, flags);
  238. }
  239. spin_unlock_irqrestore(&chip->reg_lock, flags);
  240. #if 0
  241. printk("(4) jiffies = %li\n", jiffies);
  242. snd_printk("mce_down - exit = 0x%x\n", inb(AD1848P(chip, REGSEL)));
  243. #endif
  244. }
  245. static unsigned int snd_ad1848_get_count(unsigned char format,
  246. unsigned int size)
  247. {
  248. switch (format & 0xe0) {
  249. case AD1848_LINEAR_16:
  250. size >>= 1;
  251. break;
  252. }
  253. if (format & AD1848_STEREO)
  254. size >>= 1;
  255. return size;
  256. }
  257. static int snd_ad1848_trigger(ad1848_t *chip, unsigned char what,
  258. int channel, int cmd)
  259. {
  260. int result = 0;
  261. #if 0
  262. printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, inb(AD1848P(card, STATUS)));
  263. #endif
  264. spin_lock(&chip->reg_lock);
  265. if (cmd == SNDRV_PCM_TRIGGER_START) {
  266. if (chip->image[AD1848_IFACE_CTRL] & what) {
  267. spin_unlock(&chip->reg_lock);
  268. return 0;
  269. }
  270. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] |= what);
  271. chip->mode |= AD1848_MODE_RUNNING;
  272. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  273. if (!(chip->image[AD1848_IFACE_CTRL] & what)) {
  274. spin_unlock(&chip->reg_lock);
  275. return 0;
  276. }
  277. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL] &= ~what);
  278. chip->mode &= ~AD1848_MODE_RUNNING;
  279. } else {
  280. result = -EINVAL;
  281. }
  282. spin_unlock(&chip->reg_lock);
  283. return result;
  284. }
  285. /*
  286. * CODEC I/O
  287. */
  288. static unsigned char snd_ad1848_get_rate(unsigned int rate)
  289. {
  290. int i;
  291. for (i = 0; i < 14; i++)
  292. if (rate == rates[i])
  293. return freq_bits[i];
  294. snd_BUG();
  295. return freq_bits[13];
  296. }
  297. static int snd_ad1848_ioctl(snd_pcm_substream_t * substream,
  298. unsigned int cmd, void *arg)
  299. {
  300. return snd_pcm_lib_ioctl(substream, cmd, arg);
  301. }
  302. static unsigned char snd_ad1848_get_format(int format, int channels)
  303. {
  304. unsigned char rformat;
  305. rformat = AD1848_LINEAR_8;
  306. switch (format) {
  307. case SNDRV_PCM_FORMAT_A_LAW: rformat = AD1848_ALAW_8; break;
  308. case SNDRV_PCM_FORMAT_MU_LAW: rformat = AD1848_ULAW_8; break;
  309. case SNDRV_PCM_FORMAT_S16_LE: rformat = AD1848_LINEAR_16; break;
  310. }
  311. if (channels > 1)
  312. rformat |= AD1848_STEREO;
  313. #if 0
  314. snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
  315. #endif
  316. return rformat;
  317. }
  318. static void snd_ad1848_calibrate_mute(ad1848_t *chip, int mute)
  319. {
  320. unsigned long flags;
  321. mute = mute ? 1 : 0;
  322. spin_lock_irqsave(&chip->reg_lock, flags);
  323. if (chip->calibrate_mute == mute) {
  324. spin_unlock_irqrestore(&chip->reg_lock, flags);
  325. return;
  326. }
  327. if (!mute) {
  328. snd_ad1848_dout(chip, AD1848_LEFT_INPUT, chip->image[AD1848_LEFT_INPUT]);
  329. snd_ad1848_dout(chip, AD1848_RIGHT_INPUT, chip->image[AD1848_RIGHT_INPUT]);
  330. }
  331. snd_ad1848_dout(chip, AD1848_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_LEFT_INPUT]);
  332. snd_ad1848_dout(chip, AD1848_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX1_RIGHT_INPUT]);
  333. snd_ad1848_dout(chip, AD1848_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_LEFT_INPUT]);
  334. snd_ad1848_dout(chip, AD1848_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[AD1848_AUX2_RIGHT_INPUT]);
  335. snd_ad1848_dout(chip, AD1848_LEFT_OUTPUT, mute ? 0x80 : chip->image[AD1848_LEFT_OUTPUT]);
  336. snd_ad1848_dout(chip, AD1848_RIGHT_OUTPUT, mute ? 0x80 : chip->image[AD1848_RIGHT_OUTPUT]);
  337. chip->calibrate_mute = mute;
  338. spin_unlock_irqrestore(&chip->reg_lock, flags);
  339. }
  340. static void snd_ad1848_set_data_format(ad1848_t *chip, snd_pcm_hw_params_t *hw_params)
  341. {
  342. if (hw_params == NULL) {
  343. chip->image[AD1848_DATA_FORMAT] = 0x20;
  344. } else {
  345. chip->image[AD1848_DATA_FORMAT] =
  346. snd_ad1848_get_format(params_format(hw_params), params_channels(hw_params)) |
  347. snd_ad1848_get_rate(params_rate(hw_params));
  348. }
  349. // snd_printk(">>> pmode = 0x%x, dfr = 0x%x\n", pstr->mode, chip->image[AD1848_DATA_FORMAT]);
  350. }
  351. static int snd_ad1848_open(ad1848_t *chip, unsigned int mode)
  352. {
  353. unsigned long flags;
  354. down(&chip->open_mutex);
  355. if (chip->mode & AD1848_MODE_OPEN) {
  356. up(&chip->open_mutex);
  357. return -EAGAIN;
  358. }
  359. snd_ad1848_mce_down(chip);
  360. #ifdef SNDRV_DEBUG_MCE
  361. snd_printk("open: (1)\n");
  362. #endif
  363. snd_ad1848_mce_up(chip);
  364. spin_lock_irqsave(&chip->reg_lock, flags);
  365. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  366. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO |
  367. AD1848_CALIB_MODE);
  368. chip->image[AD1848_IFACE_CTRL] |= AD1848_AUTOCALIB;
  369. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  370. spin_unlock_irqrestore(&chip->reg_lock, flags);
  371. snd_ad1848_mce_down(chip);
  372. #ifdef SNDRV_DEBUG_MCE
  373. snd_printk("open: (2)\n");
  374. #endif
  375. snd_ad1848_set_data_format(chip, NULL);
  376. snd_ad1848_mce_up(chip);
  377. spin_lock_irqsave(&chip->reg_lock, flags);
  378. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  379. spin_unlock_irqrestore(&chip->reg_lock, flags);
  380. snd_ad1848_mce_down(chip);
  381. #ifdef SNDRV_DEBUG_MCE
  382. snd_printk("open: (3)\n");
  383. #endif
  384. /* ok. now enable and ack CODEC IRQ */
  385. spin_lock_irqsave(&chip->reg_lock, flags);
  386. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  387. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  388. chip->image[AD1848_PIN_CTRL] |= AD1848_IRQ_ENABLE;
  389. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  390. spin_unlock_irqrestore(&chip->reg_lock, flags);
  391. chip->mode = mode;
  392. up(&chip->open_mutex);
  393. return 0;
  394. }
  395. static void snd_ad1848_close(ad1848_t *chip)
  396. {
  397. unsigned long flags;
  398. down(&chip->open_mutex);
  399. if (!chip->mode) {
  400. up(&chip->open_mutex);
  401. return;
  402. }
  403. /* disable IRQ */
  404. spin_lock_irqsave(&chip->reg_lock, flags);
  405. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  406. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  407. chip->image[AD1848_PIN_CTRL] &= ~AD1848_IRQ_ENABLE;
  408. snd_ad1848_out(chip, AD1848_PIN_CTRL, chip->image[AD1848_PIN_CTRL]);
  409. spin_unlock_irqrestore(&chip->reg_lock, flags);
  410. /* now disable capture & playback */
  411. snd_ad1848_mce_up(chip);
  412. spin_lock_irqsave(&chip->reg_lock, flags);
  413. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO |
  414. AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  415. snd_ad1848_out(chip, AD1848_IFACE_CTRL, chip->image[AD1848_IFACE_CTRL]);
  416. spin_unlock_irqrestore(&chip->reg_lock, flags);
  417. snd_ad1848_mce_down(chip);
  418. /* clear IRQ again */
  419. spin_lock_irqsave(&chip->reg_lock, flags);
  420. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  421. outb(0, AD1848P(chip, STATUS)); /* clear IRQ */
  422. spin_unlock_irqrestore(&chip->reg_lock, flags);
  423. chip->mode = 0;
  424. up(&chip->open_mutex);
  425. }
  426. /*
  427. * ok.. exported functions..
  428. */
  429. static int snd_ad1848_playback_trigger(snd_pcm_substream_t * substream,
  430. int cmd)
  431. {
  432. ad1848_t *chip = snd_pcm_substream_chip(substream);
  433. return snd_ad1848_trigger(chip, AD1848_PLAYBACK_ENABLE, SNDRV_PCM_STREAM_PLAYBACK, cmd);
  434. }
  435. static int snd_ad1848_capture_trigger(snd_pcm_substream_t * substream,
  436. int cmd)
  437. {
  438. ad1848_t *chip = snd_pcm_substream_chip(substream);
  439. return snd_ad1848_trigger(chip, AD1848_CAPTURE_ENABLE, SNDRV_PCM_STREAM_CAPTURE, cmd);
  440. }
  441. static int snd_ad1848_playback_hw_params(snd_pcm_substream_t * substream,
  442. snd_pcm_hw_params_t * hw_params)
  443. {
  444. ad1848_t *chip = snd_pcm_substream_chip(substream);
  445. unsigned long flags;
  446. int err;
  447. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  448. return err;
  449. snd_ad1848_calibrate_mute(chip, 1);
  450. snd_ad1848_set_data_format(chip, hw_params);
  451. snd_ad1848_mce_up(chip);
  452. spin_lock_irqsave(&chip->reg_lock, flags);
  453. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  454. spin_unlock_irqrestore(&chip->reg_lock, flags);
  455. snd_ad1848_mce_down(chip);
  456. snd_ad1848_calibrate_mute(chip, 0);
  457. return 0;
  458. }
  459. static int snd_ad1848_playback_hw_free(snd_pcm_substream_t * substream)
  460. {
  461. return snd_pcm_lib_free_pages(substream);
  462. }
  463. static int snd_ad1848_playback_prepare(snd_pcm_substream_t * substream)
  464. {
  465. ad1848_t *chip = snd_pcm_substream_chip(substream);
  466. snd_pcm_runtime_t *runtime = substream->runtime;
  467. unsigned long flags;
  468. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  469. unsigned int count = snd_pcm_lib_period_bytes(substream);
  470. chip->dma_size = size;
  471. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_PLAYBACK_ENABLE | AD1848_PLAYBACK_PIO);
  472. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  473. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  474. spin_lock_irqsave(&chip->reg_lock, flags);
  475. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  476. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  477. spin_unlock_irqrestore(&chip->reg_lock, flags);
  478. return 0;
  479. }
  480. static int snd_ad1848_capture_hw_params(snd_pcm_substream_t * substream,
  481. snd_pcm_hw_params_t * hw_params)
  482. {
  483. ad1848_t *chip = snd_pcm_substream_chip(substream);
  484. unsigned long flags;
  485. int err;
  486. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  487. return err;
  488. snd_ad1848_calibrate_mute(chip, 1);
  489. snd_ad1848_set_data_format(chip, hw_params);
  490. snd_ad1848_mce_up(chip);
  491. spin_lock_irqsave(&chip->reg_lock, flags);
  492. snd_ad1848_out(chip, AD1848_DATA_FORMAT, chip->image[AD1848_DATA_FORMAT]);
  493. spin_unlock_irqrestore(&chip->reg_lock, flags);
  494. snd_ad1848_mce_down(chip);
  495. snd_ad1848_calibrate_mute(chip, 0);
  496. return 0;
  497. }
  498. static int snd_ad1848_capture_hw_free(snd_pcm_substream_t * substream)
  499. {
  500. return snd_pcm_lib_free_pages(substream);
  501. }
  502. static int snd_ad1848_capture_prepare(snd_pcm_substream_t * substream)
  503. {
  504. ad1848_t *chip = snd_pcm_substream_chip(substream);
  505. snd_pcm_runtime_t *runtime = substream->runtime;
  506. unsigned long flags;
  507. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  508. unsigned int count = snd_pcm_lib_period_bytes(substream);
  509. chip->dma_size = size;
  510. chip->image[AD1848_IFACE_CTRL] &= ~(AD1848_CAPTURE_ENABLE | AD1848_CAPTURE_PIO);
  511. snd_dma_program(chip->dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  512. count = snd_ad1848_get_count(chip->image[AD1848_DATA_FORMAT], count) - 1;
  513. spin_lock_irqsave(&chip->reg_lock, flags);
  514. snd_ad1848_out(chip, AD1848_DATA_LWR_CNT, (unsigned char) count);
  515. snd_ad1848_out(chip, AD1848_DATA_UPR_CNT, (unsigned char) (count >> 8));
  516. spin_unlock_irqrestore(&chip->reg_lock, flags);
  517. return 0;
  518. }
  519. static irqreturn_t snd_ad1848_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  520. {
  521. ad1848_t *chip = dev_id;
  522. if ((chip->mode & AD1848_MODE_PLAY) && chip->playback_substream &&
  523. (chip->mode & AD1848_MODE_RUNNING))
  524. snd_pcm_period_elapsed(chip->playback_substream);
  525. if ((chip->mode & AD1848_MODE_CAPTURE) && chip->capture_substream &&
  526. (chip->mode & AD1848_MODE_RUNNING))
  527. snd_pcm_period_elapsed(chip->capture_substream);
  528. outb(0, AD1848P(chip, STATUS)); /* clear global interrupt bit */
  529. return IRQ_HANDLED;
  530. }
  531. static snd_pcm_uframes_t snd_ad1848_playback_pointer(snd_pcm_substream_t * substream)
  532. {
  533. ad1848_t *chip = snd_pcm_substream_chip(substream);
  534. size_t ptr;
  535. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_PLAYBACK_ENABLE))
  536. return 0;
  537. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  538. return bytes_to_frames(substream->runtime, ptr);
  539. }
  540. static snd_pcm_uframes_t snd_ad1848_capture_pointer(snd_pcm_substream_t * substream)
  541. {
  542. ad1848_t *chip = snd_pcm_substream_chip(substream);
  543. size_t ptr;
  544. if (!(chip->image[AD1848_IFACE_CTRL] & AD1848_CAPTURE_ENABLE))
  545. return 0;
  546. ptr = snd_dma_pointer(chip->dma, chip->dma_size);
  547. return bytes_to_frames(substream->runtime, ptr);
  548. }
  549. /*
  550. */
  551. static void snd_ad1848_thinkpad_twiddle(ad1848_t *chip, int on) {
  552. int tmp;
  553. if (!chip->thinkpad_flag) return;
  554. outb(0x1c, AD1848_THINKPAD_CTL_PORT1);
  555. tmp = inb(AD1848_THINKPAD_CTL_PORT2);
  556. if (on)
  557. /* turn it on */
  558. tmp |= AD1848_THINKPAD_CS4248_ENABLE_BIT;
  559. else
  560. /* turn it off */
  561. tmp &= ~AD1848_THINKPAD_CS4248_ENABLE_BIT;
  562. outb(tmp, AD1848_THINKPAD_CTL_PORT2);
  563. }
  564. #ifdef CONFIG_PM
  565. static int snd_ad1848_suspend(snd_card_t *card, pm_message_t state)
  566. {
  567. ad1848_t *chip = card->pm_private_data;
  568. snd_pcm_suspend_all(chip->pcm);
  569. /* FIXME: save registers? */
  570. if (chip->thinkpad_flag)
  571. snd_ad1848_thinkpad_twiddle(chip, 0);
  572. return 0;
  573. }
  574. static int snd_ad1848_resume(snd_card_t *card)
  575. {
  576. ad1848_t *chip = card->pm_private_data;
  577. if (chip->thinkpad_flag)
  578. snd_ad1848_thinkpad_twiddle(chip, 1);
  579. /* FIXME: restore registers? */
  580. return 0;
  581. }
  582. #endif /* CONFIG_PM */
  583. static int snd_ad1848_probe(ad1848_t * chip)
  584. {
  585. unsigned long flags;
  586. int i, id, rev, ad1847;
  587. unsigned char *ptr;
  588. #if 0
  589. snd_ad1848_debug(chip);
  590. #endif
  591. id = ad1847 = 0;
  592. for (i = 0; i < 1000; i++) {
  593. mb();
  594. if (inb(AD1848P(chip, REGSEL)) & AD1848_INIT)
  595. udelay(500);
  596. else {
  597. spin_lock_irqsave(&chip->reg_lock, flags);
  598. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  599. snd_ad1848_out(chip, AD1848_LEFT_INPUT, 0xaa);
  600. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, 0x45);
  601. rev = snd_ad1848_in(chip, AD1848_RIGHT_INPUT);
  602. if (rev == 0x65) {
  603. spin_unlock_irqrestore(&chip->reg_lock, flags);
  604. id = 1;
  605. ad1847 = 1;
  606. break;
  607. }
  608. if (snd_ad1848_in(chip, AD1848_LEFT_INPUT) == 0xaa && rev == 0x45) {
  609. spin_unlock_irqrestore(&chip->reg_lock, flags);
  610. id = 1;
  611. break;
  612. }
  613. spin_unlock_irqrestore(&chip->reg_lock, flags);
  614. }
  615. }
  616. if (id != 1)
  617. return -ENODEV; /* no valid device found */
  618. if (chip->hardware == AD1848_HW_DETECT) {
  619. if (ad1847) {
  620. chip->hardware = AD1848_HW_AD1847;
  621. } else {
  622. chip->hardware = AD1848_HW_AD1848;
  623. rev = snd_ad1848_in(chip, AD1848_MISC_INFO);
  624. if (rev & 0x80) {
  625. chip->hardware = AD1848_HW_CS4248;
  626. } else if ((rev & 0x0f) == 0x0a) {
  627. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x40);
  628. for (i = 0; i < 16; ++i) {
  629. if (snd_ad1848_in(chip, i) != snd_ad1848_in(chip, i + 16)) {
  630. chip->hardware = AD1848_HW_CMI8330;
  631. break;
  632. }
  633. }
  634. snd_ad1848_out(chip, AD1848_MISC_INFO, 0x00);
  635. }
  636. }
  637. }
  638. spin_lock_irqsave(&chip->reg_lock, flags);
  639. inb(AD1848P(chip, STATUS)); /* clear any pendings IRQ */
  640. outb(0, AD1848P(chip, STATUS));
  641. mb();
  642. spin_unlock_irqrestore(&chip->reg_lock, flags);
  643. chip->image[AD1848_MISC_INFO] = 0x00;
  644. chip->image[AD1848_IFACE_CTRL] =
  645. (chip->image[AD1848_IFACE_CTRL] & ~AD1848_SINGLE_DMA) | AD1848_SINGLE_DMA;
  646. ptr = (unsigned char *) &chip->image;
  647. snd_ad1848_mce_down(chip);
  648. spin_lock_irqsave(&chip->reg_lock, flags);
  649. for (i = 0; i < 16; i++) /* ok.. fill all AD1848 registers */
  650. snd_ad1848_out(chip, i, *ptr++);
  651. spin_unlock_irqrestore(&chip->reg_lock, flags);
  652. snd_ad1848_mce_up(chip);
  653. snd_ad1848_mce_down(chip);
  654. return 0; /* all things are ok.. */
  655. }
  656. /*
  657. */
  658. static snd_pcm_hardware_t snd_ad1848_playback =
  659. {
  660. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  661. SNDRV_PCM_INFO_MMAP_VALID),
  662. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  663. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  664. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  665. .rate_min = 5510,
  666. .rate_max = 48000,
  667. .channels_min = 1,
  668. .channels_max = 2,
  669. .buffer_bytes_max = (128*1024),
  670. .period_bytes_min = 64,
  671. .period_bytes_max = (128*1024),
  672. .periods_min = 1,
  673. .periods_max = 1024,
  674. .fifo_size = 0,
  675. };
  676. static snd_pcm_hardware_t snd_ad1848_capture =
  677. {
  678. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  679. SNDRV_PCM_INFO_MMAP_VALID),
  680. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  681. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE),
  682. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  683. .rate_min = 5510,
  684. .rate_max = 48000,
  685. .channels_min = 1,
  686. .channels_max = 2,
  687. .buffer_bytes_max = (128*1024),
  688. .period_bytes_min = 64,
  689. .period_bytes_max = (128*1024),
  690. .periods_min = 1,
  691. .periods_max = 1024,
  692. .fifo_size = 0,
  693. };
  694. /*
  695. */
  696. static int snd_ad1848_playback_open(snd_pcm_substream_t * substream)
  697. {
  698. ad1848_t *chip = snd_pcm_substream_chip(substream);
  699. snd_pcm_runtime_t *runtime = substream->runtime;
  700. int err;
  701. if ((err = snd_ad1848_open(chip, AD1848_MODE_PLAY)) < 0)
  702. return err;
  703. chip->playback_substream = substream;
  704. runtime->hw = snd_ad1848_playback;
  705. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  706. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  707. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  708. return 0;
  709. }
  710. static int snd_ad1848_capture_open(snd_pcm_substream_t * substream)
  711. {
  712. ad1848_t *chip = snd_pcm_substream_chip(substream);
  713. snd_pcm_runtime_t *runtime = substream->runtime;
  714. int err;
  715. if ((err = snd_ad1848_open(chip, AD1848_MODE_CAPTURE)) < 0)
  716. return err;
  717. chip->capture_substream = substream;
  718. runtime->hw = snd_ad1848_capture;
  719. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.buffer_bytes_max);
  720. snd_pcm_limit_isa_dma_size(chip->dma, &runtime->hw.period_bytes_max);
  721. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  722. return 0;
  723. }
  724. static int snd_ad1848_playback_close(snd_pcm_substream_t * substream)
  725. {
  726. ad1848_t *chip = snd_pcm_substream_chip(substream);
  727. chip->mode &= ~AD1848_MODE_PLAY;
  728. chip->playback_substream = NULL;
  729. snd_ad1848_close(chip);
  730. return 0;
  731. }
  732. static int snd_ad1848_capture_close(snd_pcm_substream_t * substream)
  733. {
  734. ad1848_t *chip = snd_pcm_substream_chip(substream);
  735. chip->mode &= ~AD1848_MODE_CAPTURE;
  736. chip->capture_substream = NULL;
  737. snd_ad1848_close(chip);
  738. return 0;
  739. }
  740. static int snd_ad1848_free(ad1848_t *chip)
  741. {
  742. if (chip->res_port) {
  743. release_resource(chip->res_port);
  744. kfree_nocheck(chip->res_port);
  745. }
  746. if (chip->irq >= 0)
  747. free_irq(chip->irq, (void *) chip);
  748. if (chip->dma >= 0) {
  749. snd_dma_disable(chip->dma);
  750. free_dma(chip->dma);
  751. }
  752. kfree(chip);
  753. return 0;
  754. }
  755. static int snd_ad1848_dev_free(snd_device_t *device)
  756. {
  757. ad1848_t *chip = device->device_data;
  758. return snd_ad1848_free(chip);
  759. }
  760. static const char *snd_ad1848_chip_id(ad1848_t *chip)
  761. {
  762. switch (chip->hardware) {
  763. case AD1848_HW_AD1847: return "AD1847";
  764. case AD1848_HW_AD1848: return "AD1848";
  765. case AD1848_HW_CS4248: return "CS4248";
  766. case AD1848_HW_CMI8330: return "CMI8330/C3D";
  767. default: return "???";
  768. }
  769. }
  770. int snd_ad1848_create(snd_card_t * card,
  771. unsigned long port,
  772. int irq, int dma,
  773. unsigned short hardware,
  774. ad1848_t ** rchip)
  775. {
  776. static snd_device_ops_t ops = {
  777. .dev_free = snd_ad1848_dev_free,
  778. };
  779. ad1848_t *chip;
  780. int err;
  781. *rchip = NULL;
  782. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  783. if (chip == NULL)
  784. return -ENOMEM;
  785. spin_lock_init(&chip->reg_lock);
  786. init_MUTEX(&chip->open_mutex);
  787. chip->card = card;
  788. chip->port = port;
  789. chip->irq = -1;
  790. chip->dma = -1;
  791. chip->hardware = hardware;
  792. memcpy(&chip->image, &snd_ad1848_original_image, sizeof(snd_ad1848_original_image));
  793. if ((chip->res_port = request_region(port, 4, "AD1848")) == NULL) {
  794. snd_printk(KERN_ERR "ad1848: can't grab port 0x%lx\n", port);
  795. snd_ad1848_free(chip);
  796. return -EBUSY;
  797. }
  798. if (request_irq(irq, snd_ad1848_interrupt, SA_INTERRUPT, "AD1848", (void *) chip)) {
  799. snd_printk(KERN_ERR "ad1848: can't grab IRQ %d\n", irq);
  800. snd_ad1848_free(chip);
  801. return -EBUSY;
  802. }
  803. chip->irq = irq;
  804. if (request_dma(dma, "AD1848")) {
  805. snd_printk(KERN_ERR "ad1848: can't grab DMA %d\n", dma);
  806. snd_ad1848_free(chip);
  807. return -EBUSY;
  808. }
  809. chip->dma = dma;
  810. if (hardware == AD1848_HW_THINKPAD) {
  811. chip->thinkpad_flag = 1;
  812. chip->hardware = AD1848_HW_DETECT; /* reset */
  813. snd_ad1848_thinkpad_twiddle(chip, 1);
  814. snd_card_set_isa_pm_callback(card, snd_ad1848_suspend, snd_ad1848_resume, chip);
  815. }
  816. if (snd_ad1848_probe(chip) < 0) {
  817. snd_ad1848_free(chip);
  818. return -ENODEV;
  819. }
  820. /* Register device */
  821. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  822. snd_ad1848_free(chip);
  823. return err;
  824. }
  825. *rchip = chip;
  826. return 0;
  827. }
  828. static snd_pcm_ops_t snd_ad1848_playback_ops = {
  829. .open = snd_ad1848_playback_open,
  830. .close = snd_ad1848_playback_close,
  831. .ioctl = snd_ad1848_ioctl,
  832. .hw_params = snd_ad1848_playback_hw_params,
  833. .hw_free = snd_ad1848_playback_hw_free,
  834. .prepare = snd_ad1848_playback_prepare,
  835. .trigger = snd_ad1848_playback_trigger,
  836. .pointer = snd_ad1848_playback_pointer,
  837. };
  838. static snd_pcm_ops_t snd_ad1848_capture_ops = {
  839. .open = snd_ad1848_capture_open,
  840. .close = snd_ad1848_capture_close,
  841. .ioctl = snd_ad1848_ioctl,
  842. .hw_params = snd_ad1848_capture_hw_params,
  843. .hw_free = snd_ad1848_capture_hw_free,
  844. .prepare = snd_ad1848_capture_prepare,
  845. .trigger = snd_ad1848_capture_trigger,
  846. .pointer = snd_ad1848_capture_pointer,
  847. };
  848. static void snd_ad1848_pcm_free(snd_pcm_t *pcm)
  849. {
  850. ad1848_t *chip = pcm->private_data;
  851. chip->pcm = NULL;
  852. snd_pcm_lib_preallocate_free_for_all(pcm);
  853. }
  854. int snd_ad1848_pcm(ad1848_t *chip, int device, snd_pcm_t **rpcm)
  855. {
  856. snd_pcm_t *pcm;
  857. int err;
  858. if ((err = snd_pcm_new(chip->card, "AD1848", device, 1, 1, &pcm)) < 0)
  859. return err;
  860. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1848_playback_ops);
  861. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1848_capture_ops);
  862. pcm->private_free = snd_ad1848_pcm_free;
  863. pcm->private_data = chip;
  864. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  865. strcpy(pcm->name, snd_ad1848_chip_id(chip));
  866. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  867. snd_dma_isa_data(),
  868. 64*1024, chip->dma > 3 ? 128*1024 : 64*1024);
  869. chip->pcm = pcm;
  870. if (rpcm)
  871. *rpcm = pcm;
  872. return 0;
  873. }
  874. const snd_pcm_ops_t *snd_ad1848_get_pcm_ops(int direction)
  875. {
  876. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  877. &snd_ad1848_playback_ops : &snd_ad1848_capture_ops;
  878. }
  879. /*
  880. * MIXER part
  881. */
  882. static int snd_ad1848_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  883. {
  884. static char *texts[4] = {
  885. "Line", "Aux", "Mic", "Mix"
  886. };
  887. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  888. uinfo->count = 2;
  889. uinfo->value.enumerated.items = 4;
  890. if (uinfo->value.enumerated.item > 3)
  891. uinfo->value.enumerated.item = 3;
  892. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  893. return 0;
  894. }
  895. static int snd_ad1848_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  896. {
  897. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  898. unsigned long flags;
  899. spin_lock_irqsave(&chip->reg_lock, flags);
  900. ucontrol->value.enumerated.item[0] = (chip->image[AD1848_LEFT_INPUT] & AD1848_MIXS_ALL) >> 6;
  901. ucontrol->value.enumerated.item[1] = (chip->image[AD1848_RIGHT_INPUT] & AD1848_MIXS_ALL) >> 6;
  902. spin_unlock_irqrestore(&chip->reg_lock, flags);
  903. return 0;
  904. }
  905. static int snd_ad1848_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  906. {
  907. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  908. unsigned long flags;
  909. unsigned short left, right;
  910. int change;
  911. if (ucontrol->value.enumerated.item[0] > 3 ||
  912. ucontrol->value.enumerated.item[1] > 3)
  913. return -EINVAL;
  914. left = ucontrol->value.enumerated.item[0] << 6;
  915. right = ucontrol->value.enumerated.item[1] << 6;
  916. spin_lock_irqsave(&chip->reg_lock, flags);
  917. left = (chip->image[AD1848_LEFT_INPUT] & ~AD1848_MIXS_ALL) | left;
  918. right = (chip->image[AD1848_RIGHT_INPUT] & ~AD1848_MIXS_ALL) | right;
  919. change = left != chip->image[AD1848_LEFT_INPUT] ||
  920. right != chip->image[AD1848_RIGHT_INPUT];
  921. snd_ad1848_out(chip, AD1848_LEFT_INPUT, left);
  922. snd_ad1848_out(chip, AD1848_RIGHT_INPUT, right);
  923. spin_unlock_irqrestore(&chip->reg_lock, flags);
  924. return change;
  925. }
  926. static int snd_ad1848_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  927. {
  928. int mask = (kcontrol->private_value >> 16) & 0xff;
  929. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  930. uinfo->count = 1;
  931. uinfo->value.integer.min = 0;
  932. uinfo->value.integer.max = mask;
  933. return 0;
  934. }
  935. static int snd_ad1848_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  936. {
  937. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  938. unsigned long flags;
  939. int reg = kcontrol->private_value & 0xff;
  940. int shift = (kcontrol->private_value >> 8) & 0xff;
  941. int mask = (kcontrol->private_value >> 16) & 0xff;
  942. int invert = (kcontrol->private_value >> 24) & 0xff;
  943. spin_lock_irqsave(&chip->reg_lock, flags);
  944. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  945. spin_unlock_irqrestore(&chip->reg_lock, flags);
  946. if (invert)
  947. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  948. return 0;
  949. }
  950. static int snd_ad1848_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  951. {
  952. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  953. unsigned long flags;
  954. int reg = kcontrol->private_value & 0xff;
  955. int shift = (kcontrol->private_value >> 8) & 0xff;
  956. int mask = (kcontrol->private_value >> 16) & 0xff;
  957. int invert = (kcontrol->private_value >> 24) & 0xff;
  958. int change;
  959. unsigned short val;
  960. val = (ucontrol->value.integer.value[0] & mask);
  961. if (invert)
  962. val = mask - val;
  963. val <<= shift;
  964. spin_lock_irqsave(&chip->reg_lock, flags);
  965. val = (chip->image[reg] & ~(mask << shift)) | val;
  966. change = val != chip->image[reg];
  967. snd_ad1848_out(chip, reg, val);
  968. spin_unlock_irqrestore(&chip->reg_lock, flags);
  969. return change;
  970. }
  971. static int snd_ad1848_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  972. {
  973. int mask = (kcontrol->private_value >> 24) & 0xff;
  974. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  975. uinfo->count = 2;
  976. uinfo->value.integer.min = 0;
  977. uinfo->value.integer.max = mask;
  978. return 0;
  979. }
  980. static int snd_ad1848_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  981. {
  982. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  983. unsigned long flags;
  984. int left_reg = kcontrol->private_value & 0xff;
  985. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  986. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  987. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  988. int mask = (kcontrol->private_value >> 24) & 0xff;
  989. int invert = (kcontrol->private_value >> 22) & 1;
  990. spin_lock_irqsave(&chip->reg_lock, flags);
  991. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  992. ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
  993. spin_unlock_irqrestore(&chip->reg_lock, flags);
  994. if (invert) {
  995. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  996. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  997. }
  998. return 0;
  999. }
  1000. static int snd_ad1848_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  1001. {
  1002. ad1848_t *chip = snd_kcontrol_chip(kcontrol);
  1003. unsigned long flags;
  1004. int left_reg = kcontrol->private_value & 0xff;
  1005. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1006. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1007. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1008. int mask = (kcontrol->private_value >> 24) & 0xff;
  1009. int invert = (kcontrol->private_value >> 22) & 1;
  1010. int change;
  1011. unsigned short val1, val2;
  1012. val1 = ucontrol->value.integer.value[0] & mask;
  1013. val2 = ucontrol->value.integer.value[1] & mask;
  1014. if (invert) {
  1015. val1 = mask - val1;
  1016. val2 = mask - val2;
  1017. }
  1018. val1 <<= shift_left;
  1019. val2 <<= shift_right;
  1020. spin_lock_irqsave(&chip->reg_lock, flags);
  1021. if (left_reg != right_reg) {
  1022. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1023. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1024. change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
  1025. snd_ad1848_out(chip, left_reg, val1);
  1026. snd_ad1848_out(chip, right_reg, val2);
  1027. } else {
  1028. val1 = (chip->image[left_reg] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1029. change = val1 != chip->image[left_reg];
  1030. snd_ad1848_out(chip, left_reg, val1);
  1031. }
  1032. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1033. return change;
  1034. }
  1035. /*
  1036. */
  1037. int snd_ad1848_add_ctl(ad1848_t *chip, const char *name, int index, int type, unsigned long value)
  1038. {
  1039. static snd_kcontrol_new_t newctls[] = {
  1040. [AD1848_MIX_SINGLE] = {
  1041. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1042. .info = snd_ad1848_info_single,
  1043. .get = snd_ad1848_get_single,
  1044. .put = snd_ad1848_put_single,
  1045. },
  1046. [AD1848_MIX_DOUBLE] = {
  1047. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1048. .info = snd_ad1848_info_double,
  1049. .get = snd_ad1848_get_double,
  1050. .put = snd_ad1848_put_double,
  1051. },
  1052. [AD1848_MIX_CAPTURE] = {
  1053. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1054. .info = snd_ad1848_info_mux,
  1055. .get = snd_ad1848_get_mux,
  1056. .put = snd_ad1848_put_mux,
  1057. },
  1058. };
  1059. snd_kcontrol_t *ctl;
  1060. int err;
  1061. ctl = snd_ctl_new1(&newctls[type], chip);
  1062. if (! ctl)
  1063. return -ENOMEM;
  1064. strlcpy(ctl->id.name, name, sizeof(ctl->id.name));
  1065. ctl->id.index = index;
  1066. ctl->private_value = value;
  1067. if ((err = snd_ctl_add(chip->card, ctl)) < 0) {
  1068. snd_ctl_free_one(ctl);
  1069. return err;
  1070. }
  1071. return 0;
  1072. }
  1073. static struct ad1848_mix_elem snd_ad1848_controls[] = {
  1074. AD1848_DOUBLE("PCM Playback Switch", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 7, 7, 1, 1),
  1075. AD1848_DOUBLE("PCM Playback Volume", 0, AD1848_LEFT_OUTPUT, AD1848_RIGHT_OUTPUT, 0, 0, 63, 1),
  1076. AD1848_DOUBLE("Aux Playback Switch", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1077. AD1848_DOUBLE("Aux Playback Volume", 0, AD1848_AUX1_LEFT_INPUT, AD1848_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
  1078. AD1848_DOUBLE("Aux Playback Switch", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1079. AD1848_DOUBLE("Aux Playback Volume", 1, AD1848_AUX2_LEFT_INPUT, AD1848_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
  1080. AD1848_DOUBLE("Capture Volume", 0, AD1848_LEFT_INPUT, AD1848_RIGHT_INPUT, 0, 0, 15, 0),
  1081. {
  1082. .name = "Capture Source",
  1083. .type = AD1848_MIX_CAPTURE,
  1084. },
  1085. AD1848_SINGLE("Loopback Capture Switch", 0, AD1848_LOOPBACK, 0, 1, 0),
  1086. AD1848_SINGLE("Loopback Capture Volume", 0, AD1848_LOOPBACK, 1, 63, 0)
  1087. };
  1088. int snd_ad1848_mixer(ad1848_t *chip)
  1089. {
  1090. snd_card_t *card;
  1091. snd_pcm_t *pcm;
  1092. unsigned int idx;
  1093. int err;
  1094. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1095. pcm = chip->pcm;
  1096. card = chip->card;
  1097. strcpy(card->mixername, pcm->name);
  1098. for (idx = 0; idx < ARRAY_SIZE(snd_ad1848_controls); idx++)
  1099. if ((err = snd_ad1848_add_ctl_elem(chip, &snd_ad1848_controls[idx])) < 0)
  1100. return err;
  1101. return 0;
  1102. }
  1103. EXPORT_SYMBOL(snd_ad1848_out);
  1104. EXPORT_SYMBOL(snd_ad1848_create);
  1105. EXPORT_SYMBOL(snd_ad1848_pcm);
  1106. EXPORT_SYMBOL(snd_ad1848_get_pcm_ops);
  1107. EXPORT_SYMBOL(snd_ad1848_mixer);
  1108. EXPORT_SYMBOL(snd_ad1848_add_ctl);
  1109. /*
  1110. * INIT part
  1111. */
  1112. static int __init alsa_ad1848_init(void)
  1113. {
  1114. return 0;
  1115. }
  1116. static void __exit alsa_ad1848_exit(void)
  1117. {
  1118. }
  1119. module_init(alsa_ad1848_init)
  1120. module_exit(alsa_ad1848_exit)