spinlock.h 6.0 KB

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  1. #ifndef __ASM_SPINLOCK_H
  2. #define __ASM_SPINLOCK_H
  3. /*
  4. * Simple spin lock operations.
  5. *
  6. * Copyright (C) 2001-2004 Paul Mackerras <paulus@au.ibm.com>, IBM
  7. * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
  8. * Copyright (C) 2002 Dave Engebretsen <engebret@us.ibm.com>, IBM
  9. * Rework to support virtual processors
  10. *
  11. * Type of int is used as a full 64b word is not necessary.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License
  15. * as published by the Free Software Foundation; either version
  16. * 2 of the License, or (at your option) any later version.
  17. */
  18. #include <linux/config.h>
  19. #include <asm/paca.h>
  20. #include <asm/hvcall.h>
  21. #include <asm/iSeries/HvCall.h>
  22. typedef struct {
  23. volatile unsigned int lock;
  24. #ifdef CONFIG_PREEMPT
  25. unsigned int break_lock;
  26. #endif
  27. } spinlock_t;
  28. typedef struct {
  29. volatile signed int lock;
  30. #ifdef CONFIG_PREEMPT
  31. unsigned int break_lock;
  32. #endif
  33. } rwlock_t;
  34. #ifdef __KERNEL__
  35. #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
  36. #define spin_is_locked(x) ((x)->lock != 0)
  37. #define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while(0)
  38. static __inline__ void _raw_spin_unlock(spinlock_t *lock)
  39. {
  40. __asm__ __volatile__("lwsync # spin_unlock": : :"memory");
  41. lock->lock = 0;
  42. }
  43. /*
  44. * On a system with shared processors (that is, where a physical
  45. * processor is multiplexed between several virtual processors),
  46. * there is no point spinning on a lock if the holder of the lock
  47. * isn't currently scheduled on a physical processor. Instead
  48. * we detect this situation and ask the hypervisor to give the
  49. * rest of our timeslice to the lock holder.
  50. *
  51. * So that we can tell which virtual processor is holding a lock,
  52. * we put 0x80000000 | smp_processor_id() in the lock when it is
  53. * held. Conveniently, we have a word in the paca that holds this
  54. * value.
  55. */
  56. #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES)
  57. /* We only yield to the hypervisor if we are in shared processor mode */
  58. #define SHARED_PROCESSOR (get_paca()->lppaca.shared_proc)
  59. extern void __spin_yield(spinlock_t *lock);
  60. extern void __rw_yield(rwlock_t *lock);
  61. #else /* SPLPAR || ISERIES */
  62. #define __spin_yield(x) barrier()
  63. #define __rw_yield(x) barrier()
  64. #define SHARED_PROCESSOR 0
  65. #endif
  66. extern void spin_unlock_wait(spinlock_t *lock);
  67. /*
  68. * This returns the old value in the lock, so we succeeded
  69. * in getting the lock if the return value is 0.
  70. */
  71. static __inline__ unsigned long __spin_trylock(spinlock_t *lock)
  72. {
  73. unsigned long tmp, tmp2;
  74. __asm__ __volatile__(
  75. " lwz %1,%3(13) # __spin_trylock\n\
  76. 1: lwarx %0,0,%2\n\
  77. cmpwi 0,%0,0\n\
  78. bne- 2f\n\
  79. stwcx. %1,0,%2\n\
  80. bne- 1b\n\
  81. isync\n\
  82. 2:" : "=&r" (tmp), "=&r" (tmp2)
  83. : "r" (&lock->lock), "i" (offsetof(struct paca_struct, lock_token))
  84. : "cr0", "memory");
  85. return tmp;
  86. }
  87. static int __inline__ _raw_spin_trylock(spinlock_t *lock)
  88. {
  89. return __spin_trylock(lock) == 0;
  90. }
  91. static void __inline__ _raw_spin_lock(spinlock_t *lock)
  92. {
  93. while (1) {
  94. if (likely(__spin_trylock(lock) == 0))
  95. break;
  96. do {
  97. HMT_low();
  98. if (SHARED_PROCESSOR)
  99. __spin_yield(lock);
  100. } while (unlikely(lock->lock != 0));
  101. HMT_medium();
  102. }
  103. }
  104. static void __inline__ _raw_spin_lock_flags(spinlock_t *lock, unsigned long flags)
  105. {
  106. unsigned long flags_dis;
  107. while (1) {
  108. if (likely(__spin_trylock(lock) == 0))
  109. break;
  110. local_save_flags(flags_dis);
  111. local_irq_restore(flags);
  112. do {
  113. HMT_low();
  114. if (SHARED_PROCESSOR)
  115. __spin_yield(lock);
  116. } while (unlikely(lock->lock != 0));
  117. HMT_medium();
  118. local_irq_restore(flags_dis);
  119. }
  120. }
  121. /*
  122. * Read-write spinlocks, allowing multiple readers
  123. * but only one writer.
  124. *
  125. * NOTE! it is quite common to have readers in interrupts
  126. * but no interrupt writers. For those circumstances we
  127. * can "mix" irq-safe locks - any writer needs to get a
  128. * irq-safe write-lock, but readers can get non-irqsafe
  129. * read-locks.
  130. */
  131. #define RW_LOCK_UNLOCKED (rwlock_t) { 0 }
  132. #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0)
  133. #define read_can_lock(rw) ((rw)->lock >= 0)
  134. #define write_can_lock(rw) (!(rw)->lock)
  135. static __inline__ void _raw_write_unlock(rwlock_t *rw)
  136. {
  137. __asm__ __volatile__("lwsync # write_unlock": : :"memory");
  138. rw->lock = 0;
  139. }
  140. /*
  141. * This returns the old value in the lock + 1,
  142. * so we got a read lock if the return value is > 0.
  143. */
  144. static long __inline__ __read_trylock(rwlock_t *rw)
  145. {
  146. long tmp;
  147. __asm__ __volatile__(
  148. "1: lwarx %0,0,%1 # read_trylock\n\
  149. extsw %0,%0\n\
  150. addic. %0,%0,1\n\
  151. ble- 2f\n\
  152. stwcx. %0,0,%1\n\
  153. bne- 1b\n\
  154. isync\n\
  155. 2:" : "=&r" (tmp)
  156. : "r" (&rw->lock)
  157. : "cr0", "xer", "memory");
  158. return tmp;
  159. }
  160. static int __inline__ _raw_read_trylock(rwlock_t *rw)
  161. {
  162. return __read_trylock(rw) > 0;
  163. }
  164. static void __inline__ _raw_read_lock(rwlock_t *rw)
  165. {
  166. while (1) {
  167. if (likely(__read_trylock(rw) > 0))
  168. break;
  169. do {
  170. HMT_low();
  171. if (SHARED_PROCESSOR)
  172. __rw_yield(rw);
  173. } while (unlikely(rw->lock < 0));
  174. HMT_medium();
  175. }
  176. }
  177. static void __inline__ _raw_read_unlock(rwlock_t *rw)
  178. {
  179. long tmp;
  180. __asm__ __volatile__(
  181. "eieio # read_unlock\n\
  182. 1: lwarx %0,0,%1\n\
  183. addic %0,%0,-1\n\
  184. stwcx. %0,0,%1\n\
  185. bne- 1b"
  186. : "=&r"(tmp)
  187. : "r"(&rw->lock)
  188. : "cr0", "memory");
  189. }
  190. /*
  191. * This returns the old value in the lock,
  192. * so we got the write lock if the return value is 0.
  193. */
  194. static __inline__ long __write_trylock(rwlock_t *rw)
  195. {
  196. long tmp, tmp2;
  197. __asm__ __volatile__(
  198. " lwz %1,%3(13) # write_trylock\n\
  199. 1: lwarx %0,0,%2\n\
  200. cmpwi 0,%0,0\n\
  201. bne- 2f\n\
  202. stwcx. %1,0,%2\n\
  203. bne- 1b\n\
  204. isync\n\
  205. 2:" : "=&r" (tmp), "=&r" (tmp2)
  206. : "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token))
  207. : "cr0", "memory");
  208. return tmp;
  209. }
  210. static int __inline__ _raw_write_trylock(rwlock_t *rw)
  211. {
  212. return __write_trylock(rw) == 0;
  213. }
  214. static void __inline__ _raw_write_lock(rwlock_t *rw)
  215. {
  216. while (1) {
  217. if (likely(__write_trylock(rw) == 0))
  218. break;
  219. do {
  220. HMT_low();
  221. if (SHARED_PROCESSOR)
  222. __rw_yield(rw);
  223. } while (unlikely(rw->lock != 0));
  224. HMT_medium();
  225. }
  226. }
  227. #endif /* __KERNEL__ */
  228. #endif /* __ASM_SPINLOCK_H */