oprofile_impl.h 2.2 KB

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  1. /*
  2. * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
  3. *
  4. * Based on alpha version.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #ifndef OP_IMPL_H
  12. #define OP_IMPL_H 1
  13. #define OP_MAX_COUNTER 8
  14. /* Per-counter configuration as set via oprofilefs. */
  15. struct op_counter_config {
  16. unsigned long valid;
  17. unsigned long enabled;
  18. unsigned long event;
  19. unsigned long count;
  20. unsigned long kernel;
  21. /* We dont support per counter user/kernel selection */
  22. unsigned long user;
  23. unsigned long unit_mask;
  24. };
  25. /* System-wide configuration as set via oprofilefs. */
  26. struct op_system_config {
  27. unsigned long mmcr0;
  28. unsigned long mmcr1;
  29. unsigned long mmcra;
  30. unsigned long enable_kernel;
  31. unsigned long enable_user;
  32. unsigned long backtrace_spinlocks;
  33. };
  34. /* Per-arch configuration */
  35. struct op_ppc64_model {
  36. void (*reg_setup) (struct op_counter_config *,
  37. struct op_system_config *,
  38. int num_counters);
  39. void (*cpu_setup) (void *);
  40. void (*start) (struct op_counter_config *);
  41. void (*stop) (void);
  42. void (*handle_interrupt) (struct pt_regs *,
  43. struct op_counter_config *);
  44. int num_counters;
  45. };
  46. extern struct op_ppc64_model op_model_rs64;
  47. extern struct op_ppc64_model op_model_power4;
  48. static inline unsigned int ctr_read(unsigned int i)
  49. {
  50. switch(i) {
  51. case 0:
  52. return mfspr(SPRN_PMC1);
  53. case 1:
  54. return mfspr(SPRN_PMC2);
  55. case 2:
  56. return mfspr(SPRN_PMC3);
  57. case 3:
  58. return mfspr(SPRN_PMC4);
  59. case 4:
  60. return mfspr(SPRN_PMC5);
  61. case 5:
  62. return mfspr(SPRN_PMC6);
  63. case 6:
  64. return mfspr(SPRN_PMC7);
  65. case 7:
  66. return mfspr(SPRN_PMC8);
  67. default:
  68. return 0;
  69. }
  70. }
  71. static inline void ctr_write(unsigned int i, unsigned int val)
  72. {
  73. switch(i) {
  74. case 0:
  75. mtspr(SPRN_PMC1, val);
  76. break;
  77. case 1:
  78. mtspr(SPRN_PMC2, val);
  79. break;
  80. case 2:
  81. mtspr(SPRN_PMC3, val);
  82. break;
  83. case 3:
  84. mtspr(SPRN_PMC4, val);
  85. break;
  86. case 4:
  87. mtspr(SPRN_PMC5, val);
  88. break;
  89. case 5:
  90. mtspr(SPRN_PMC6, val);
  91. break;
  92. case 6:
  93. mtspr(SPRN_PMC7, val);
  94. break;
  95. case 7:
  96. mtspr(SPRN_PMC8, val);
  97. break;
  98. default:
  99. break;
  100. }
  101. }
  102. #endif