cacheflush.h 1.7 KB

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  1. #ifndef _PPC64_CACHEFLUSH_H
  2. #define _PPC64_CACHEFLUSH_H
  3. #include <linux/mm.h>
  4. #include <asm/cputable.h>
  5. /*
  6. * No cache flushing is required when address mappings are
  7. * changed, because the caches on PowerPCs are physically
  8. * addressed.
  9. */
  10. #define flush_cache_all() do { } while (0)
  11. #define flush_cache_mm(mm) do { } while (0)
  12. #define flush_cache_range(vma, start, end) do { } while (0)
  13. #define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
  14. #define flush_icache_page(vma, page) do { } while (0)
  15. #define flush_cache_vmap(start, end) do { } while (0)
  16. #define flush_cache_vunmap(start, end) do { } while (0)
  17. extern void flush_dcache_page(struct page *page);
  18. #define flush_dcache_mmap_lock(mapping) do { } while (0)
  19. #define flush_dcache_mmap_unlock(mapping) do { } while (0)
  20. extern void __flush_icache_range(unsigned long, unsigned long);
  21. extern void flush_icache_user_range(struct vm_area_struct *vma,
  22. struct page *page, unsigned long addr,
  23. int len);
  24. extern void flush_dcache_range(unsigned long start, unsigned long stop);
  25. extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
  26. extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
  27. #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
  28. do { memcpy(dst, src, len); \
  29. flush_icache_user_range(vma, page, vaddr, len); \
  30. } while (0)
  31. #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
  32. memcpy(dst, src, len)
  33. extern void __flush_dcache_icache(void *page_va);
  34. static inline void flush_icache_range(unsigned long start, unsigned long stop)
  35. {
  36. if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
  37. __flush_icache_range(start, stop);
  38. }
  39. #endif /* _PPC64_CACHEFLUSH_H */