mcftimer.h 3.4 KB

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  1. /****************************************************************************/
  2. /*
  3. * mcftimer.h -- ColdFire internal TIMER support defines.
  4. *
  5. * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
  7. */
  8. /****************************************************************************/
  9. #ifndef mcftimer_h
  10. #define mcftimer_h
  11. /****************************************************************************/
  12. #include <linux/config.h>
  13. /*
  14. * Get address specific defines for this ColdFire member.
  15. */
  16. #if defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
  17. #define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
  18. #define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
  19. #elif defined(CONFIG_M5272)
  20. #define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
  21. #define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
  22. #define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
  23. #define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
  24. #elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
  25. #define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
  26. #define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
  27. #endif
  28. /*
  29. * Define the TIMER register set addresses.
  30. */
  31. #define MCFTIMER_TMR 0x00 /* Timer Mode reg (r/w) */
  32. #define MCFTIMER_TRR 0x02 /* Timer Reference (r/w) */
  33. #define MCFTIMER_TCR 0x04 /* Timer Capture reg (r/w) */
  34. #define MCFTIMER_TCN 0x06 /* Timer Counter reg (r/w) */
  35. #define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */
  36. struct mcftimer {
  37. unsigned short tmr; /* Timer Mode reg (r/w) */
  38. unsigned short reserved1;
  39. unsigned short trr; /* Timer Reference (r/w) */
  40. unsigned short reserved2;
  41. unsigned short tcr; /* Timer Capture reg (r/w) */
  42. unsigned short reserved3;
  43. unsigned short tcn; /* Timer Counter reg (r/w) */
  44. unsigned short reserved4;
  45. unsigned char reserved5;
  46. unsigned char ter; /* Timer Event reg (r/w) */
  47. } __attribute__((packed));
  48. /*
  49. * Bit definitions for the Timer Mode Register (TMR).
  50. * Register bit flags are common accross ColdFires.
  51. */
  52. #define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */
  53. #define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */
  54. #define MCFTIMER_TMR_ANYCE 0x00c0 /* Capture any edge */
  55. #define MCFTIMER_TMR_FALLCE 0x0080 /* Capture fallingedge */
  56. #define MCFTIMER_TMR_RISECE 0x0040 /* Capture rising edge */
  57. #define MCFTIMER_TMR_ENOM 0x0020 /* Enable output toggle */
  58. #define MCFTIMER_TMR_DISOM 0x0000 /* Do single output pulse */
  59. #define MCFTIMER_TMR_ENORI 0x0010 /* Enable ref interrupt */
  60. #define MCFTIMER_TMR_DISORI 0x0000 /* Disable ref interrupt */
  61. #define MCFTIMER_TMR_RESTART 0x0008 /* Restart counter */
  62. #define MCFTIMER_TMR_FREERUN 0x0000 /* Free running counter */
  63. #define MCFTIMER_TMR_CLKTIN 0x0006 /* Input clock is TIN */
  64. #define MCFTIMER_TMR_CLK16 0x0004 /* Input clock is /16 */
  65. #define MCFTIMER_TMR_CLK1 0x0002 /* Input clock is /1 */
  66. #define MCFTIMER_TMR_CLKSTOP 0x0000 /* Stop counter */
  67. #define MCFTIMER_TMR_ENABLE 0x0001 /* Enable timer */
  68. #define MCFTIMER_TMR_DISABLE 0x0000 /* Disable timer */
  69. /*
  70. * Bit definitions for the Timer Event Registers (TER).
  71. */
  72. #define MCFTIMER_TER_CAP 0x01 /* Capture event */
  73. #define MCFTIMER_TER_REF 0x02 /* Refernece event */
  74. /****************************************************************************/
  75. #endif /* mcftimer_h */