mcfsim.h 3.5 KB

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  1. /****************************************************************************/
  2. /*
  3. * mcfsim.h -- ColdFire System Integration Module support.
  4. *
  5. * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
  6. * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
  7. */
  8. /****************************************************************************/
  9. #ifndef mcfsim_h
  10. #define mcfsim_h
  11. /****************************************************************************/
  12. #include <linux/config.h>
  13. /*
  14. * Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282,
  15. * 5307 or 5407 specific addresses.
  16. */
  17. #if defined(CONFIG_M5204)
  18. #include <asm/m5204sim.h>
  19. #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
  20. #include <asm/m5206sim.h>
  21. #elif defined(CONFIG_M523x)
  22. #include <asm/m523xsim.h>
  23. #elif defined(CONFIG_M5249)
  24. #include <asm/m5249sim.h>
  25. #elif defined(CONFIG_M527x)
  26. #include <asm/m527xsim.h>
  27. #elif defined(CONFIG_M5272)
  28. #include <asm/m5272sim.h>
  29. #elif defined(CONFIG_M528x)
  30. #include <asm/m528xsim.h>
  31. #elif defined(CONFIG_M5307)
  32. #include <asm/m5307sim.h>
  33. #elif defined(CONFIG_M5407)
  34. #include <asm/m5407sim.h>
  35. #endif
  36. /*
  37. * Define the base address of the SIM within the MBAR address space.
  38. */
  39. #define MCFSIM_BASE 0x0 /* Base address of SIM */
  40. /*
  41. * Bit definitions for the ICR family of registers.
  42. */
  43. #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
  44. #define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
  45. #define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
  46. #define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
  47. #define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
  48. #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
  49. #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
  50. #define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
  51. #define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
  52. #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
  53. #define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
  54. #define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
  55. #define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
  56. /*
  57. * Bit definitions for the Interrupt Mask register (IMR).
  58. */
  59. #define MCFSIM_IMR_EINT1 0x0002 /* External intr # 1 */
  60. #define MCFSIM_IMR_EINT2 0x0004 /* External intr # 2 */
  61. #define MCFSIM_IMR_EINT3 0x0008 /* External intr # 3 */
  62. #define MCFSIM_IMR_EINT4 0x0010 /* External intr # 4 */
  63. #define MCFSIM_IMR_EINT5 0x0020 /* External intr # 5 */
  64. #define MCFSIM_IMR_EINT6 0x0040 /* External intr # 6 */
  65. #define MCFSIM_IMR_EINT7 0x0080 /* External intr # 7 */
  66. #define MCFSIM_IMR_SWD 0x0100 /* Software Watchdog intr */
  67. #define MCFSIM_IMR_TIMER1 0x0200 /* TIMER 1 intr */
  68. #define MCFSIM_IMR_TIMER2 0x0400 /* TIMER 2 intr */
  69. #define MCFSIM_IMR_MBUS 0x0800 /* MBUS intr */
  70. #define MCFSIM_IMR_UART1 0x1000 /* UART 1 intr */
  71. #define MCFSIM_IMR_UART2 0x2000 /* UART 2 intr */
  72. #if defined(CONFIG_M5206e)
  73. #define MCFSIM_IMR_DMA1 0x4000 /* DMA 1 intr */
  74. #define MCFSIM_IMR_DMA2 0x8000 /* DMA 2 intr */
  75. #elif defined(CONFIG_M5249) || defined(CONFIG_M5307)
  76. #define MCFSIM_IMR_DMA0 0x4000 /* DMA 0 intr */
  77. #define MCFSIM_IMR_DMA1 0x8000 /* DMA 1 intr */
  78. #define MCFSIM_IMR_DMA2 0x10000 /* DMA 2 intr */
  79. #define MCFSIM_IMR_DMA3 0x20000 /* DMA 3 intr */
  80. #endif
  81. /*
  82. * Mask for all of the SIM devices. Some parts have more or less
  83. * SIM devices. This is a catchall for the sandard set.
  84. */
  85. #ifndef MCFSIM_IMR_MASKALL
  86. #define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
  87. #endif
  88. #ifndef __ASSEMBLY__
  89. /*
  90. * Definition for the interrupt auto-vectoring support.
  91. */
  92. extern void mcf_autovector(unsigned int vec);
  93. #endif /* __ASSEMBLY__ */
  94. /****************************************************************************/
  95. #endif /* mcfsim_h */