mcfmbus.h 2.2 KB

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  1. /****************************************************************************/
  2. /*
  3. * mcfmbus.h -- Coldfire MBUS support defines.
  4. *
  5. * (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de)
  6. */
  7. /****************************************************************************/
  8. #ifndef mcfmbus_h
  9. #define mcfmbus_h
  10. #include <linux/config.h>
  11. #define MCFMBUS_BASE 0x280
  12. #define MCFMBUS_IRQ_VECTOR 0x19
  13. #define MCFMBUS_IRQ 0x1
  14. #define MCFMBUS_CLK 0x3f
  15. #define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/
  16. #define MCFMBUS_ADDRESS 0x01
  17. /*
  18. * Define the 5307 MBUS register set addresses
  19. */
  20. #define MCFMBUS_MADR 0x00
  21. #define MCFMBUS_MFDR 0x04
  22. #define MCFMBUS_MBCR 0x08
  23. #define MCFMBUS_MBSR 0x0C
  24. #define MCFMBUS_MBDR 0x10
  25. #define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/
  26. #define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
  27. /*
  28. * Define bit flags in Controll Register
  29. */
  30. #define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
  31. #define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */
  32. #define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */
  33. #define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */
  34. #define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */
  35. #define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */
  36. /*
  37. * Define bit flags in Status Register
  38. */
  39. #define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */
  40. #define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */
  41. #define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */
  42. #define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */
  43. #define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */
  44. #define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */
  45. #define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */
  46. /*
  47. * Define bit flags in DATA I/O Register
  48. */
  49. #define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */
  50. #define MBUSIOCSCLOCK 1
  51. #define MBUSIOCGCLOCK 2
  52. #define MBUSIOCSADDR 3
  53. #define MBUSIOCGADDR 4
  54. #define MBUSIOCSSLADDR 5
  55. #define MBUSIOCGSLADDR 6
  56. #define MBUSIOCSSUBADDR 7
  57. #define MBUSIOCGSUBADDR 8
  58. #endif