ide.h 2.5 KB

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  1. /*
  2. * linux/include/asm-cris/ide.h
  3. *
  4. * Copyright (C) 2000, 2001, 2002 Axis Communications AB
  5. *
  6. * Authors: Bjorn Wesen
  7. *
  8. */
  9. /*
  10. * This file contains the ETRAX 100LX specific IDE code.
  11. */
  12. #ifndef __ASMCRIS_IDE_H
  13. #define __ASMCRIS_IDE_H
  14. #ifdef __KERNEL__
  15. #include <asm/arch/svinto.h>
  16. #include <asm/io.h>
  17. #include <asm-generic/ide_iops.h>
  18. /* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */
  19. #define MAX_HWIFS 4
  20. extern __inline__ int ide_default_irq(unsigned long base)
  21. {
  22. /* all IDE busses share the same IRQ, number 4.
  23. * this has the side-effect that ide-probe.c will cluster our 4 interfaces
  24. * together in a hwgroup, and will serialize accesses. this is good, because
  25. * we can't access more than one interface at the same time on ETRAX100.
  26. */
  27. return 4;
  28. }
  29. extern __inline__ unsigned long ide_default_io_base(int index)
  30. {
  31. /* we have no real I/O base address per interface, since all go through the
  32. * same register. but in a bitfield in that register, we have the i/f number.
  33. * so we can use the io_base to remember that bitfield.
  34. */
  35. static const unsigned long io_bases[MAX_HWIFS] = {
  36. IO_FIELD(R_ATA_CTRL_DATA, sel, 0),
  37. IO_FIELD(R_ATA_CTRL_DATA, sel, 1),
  38. IO_FIELD(R_ATA_CTRL_DATA, sel, 2),
  39. IO_FIELD(R_ATA_CTRL_DATA, sel, 3)
  40. };
  41. return io_bases[index];
  42. }
  43. /* this is called once for each interface, to setup the port addresses. data_port is the result
  44. * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us.
  45. */
  46. extern __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
  47. {
  48. int i;
  49. /* fill in ports for ATA addresses 0 to 7 */
  50. for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
  51. hw->io_ports[i] = data_port |
  52. IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
  53. IO_STATE(R_ATA_CTRL_DATA, cs0, active);
  54. }
  55. /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
  56. hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
  57. IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
  58. IO_STATE(R_ATA_CTRL_DATA, cs1, active);
  59. /* whats this for ? */
  60. hw->io_ports[IDE_IRQ_OFFSET] = 0;
  61. }
  62. extern __inline__ void ide_init_default_hwifs(void)
  63. {
  64. hw_regs_t hw;
  65. int index;
  66. for(index = 0; index < MAX_HWIFS; index++) {
  67. ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
  68. hw.irq = ide_default_irq(ide_default_io_base(index));
  69. ide_register_hw(&hw, NULL);
  70. }
  71. }
  72. /* some configuration options we don't need */
  73. #undef SUPPORT_VLB_SYNC
  74. #define SUPPORT_VLB_SYNC 0
  75. #endif /* __KERNEL__ */
  76. #endif /* __ASMCRIS_IDE_H */