regs-nand.h 2.8 KB

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  1. /* linux/include/asm-arm/arch-s3c2410/regs-nand.h
  2. *
  3. * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
  4. * http://www.simtec.co.uk/products/SWLINUX/
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * S3C2410 NAND register definitions
  11. *
  12. * Changelog:
  13. * 18-Aug-2004 BJD Copied file from 2.4 and updated
  14. * 01-May-2005 BJD Added definitions for s3c2440 controller
  15. */
  16. #ifndef __ASM_ARM_REGS_NAND
  17. #define __ASM_ARM_REGS_NAND "$Id: nand.h,v 1.3 2003/12/09 11:36:29 ben Exp $"
  18. #define S3C2410_NFREG(x) (x)
  19. #define S3C2410_NFCONF S3C2410_NFREG(0x00)
  20. #define S3C2410_NFCMD S3C2410_NFREG(0x04)
  21. #define S3C2410_NFADDR S3C2410_NFREG(0x08)
  22. #define S3C2410_NFDATA S3C2410_NFREG(0x0C)
  23. #define S3C2410_NFSTAT S3C2410_NFREG(0x10)
  24. #define S3C2410_NFECC S3C2410_NFREG(0x14)
  25. #define S3C2440_NFCONT S3C2410_NFREG(0x04)
  26. #define S3C2440_NFCMD S3C2410_NFREG(0x08)
  27. #define S3C2440_NFADDR S3C2410_NFREG(0x0C)
  28. #define S3C2440_NFDATA S3C2410_NFREG(0x10)
  29. #define S3C2440_NFECCD0 S3C2410_NFREG(0x14)
  30. #define S3C2440_NFECCD1 S3C2410_NFREG(0x18)
  31. #define S3C2440_NFECCD S3C2410_NFREG(0x1C)
  32. #define S3C2440_NFSTAT S3C2410_NFREG(0x20)
  33. #define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
  34. #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
  35. #define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
  36. #define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
  37. #define S3C2440_NFSECC S3C2410_NFREG(0x34)
  38. #define S3C2440_NFSBLK S3C2410_NFREG(0x38)
  39. #define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
  40. #define S3C2410_NFCONF_EN (1<<15)
  41. #define S3C2410_NFCONF_512BYTE (1<<14)
  42. #define S3C2410_NFCONF_4STEP (1<<13)
  43. #define S3C2410_NFCONF_INITECC (1<<12)
  44. #define S3C2410_NFCONF_nFCE (1<<11)
  45. #define S3C2410_NFCONF_TACLS(x) ((x)<<8)
  46. #define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
  47. #define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
  48. #define S3C2410_NFSTAT_BUSY (1<<0)
  49. #define S3C2440_NFCONF_BUSWIDTH_8 (0<<0)
  50. #define S3C2440_NFCONF_BUSWIDTH_16 (1<<0)
  51. #define S3C2440_NFCONF_ADVFLASH (1<<3)
  52. #define S3C2440_NFCONF_TACLS(x) ((x)<<12)
  53. #define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
  54. #define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
  55. #define S3C2440_NFCONT_LOCKTIGHT (1<<13)
  56. #define S3C2440_NFCONT_SOFTLOCK (1<<12)
  57. #define S3C2440_NFCONT_ILLEGALACC_EN (1<<10)
  58. #define S3C2440_NFCONT_RNBINT_EN (1<<9)
  59. #define S3C2440_NFCONT_RN_FALLING (1<<8)
  60. #define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6)
  61. #define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5)
  62. #define S3C2440_NFCONT_INITECC (1<<4)
  63. #define S3C2440_NFCONT_nFCE (1<<1)
  64. #define S3C2440_NFCONT_ENABLE (1<<0)
  65. #define S3C2440_NFSTAT_READY (1<<0)
  66. #define S3C2440_NFSTAT_nCE (1<<1)
  67. #define S3C2440_NFSTAT_RnB_CHANGE (1<<2)
  68. #define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3)
  69. #endif /* __ASM_ARM_REGS_NAND */