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asm-arm
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arch-iop3xx
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iop321-irqs.h

iop321-irqs.h 2.7 KB
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  1. /*
    2. 

  2.  * linux/include/asm-arm/arch-iop3xx/irqs.h
    3. 

  3.  *
    4. 

  4.  * Author:	Rory Bolt <rorybolt@pacbell.net>
    5. 

  5.  * Copyright:	(C) 2002 Rory Bolt
    6. 

  6.  *
    7. 

  7.  * This program is free software; you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License version 2 as
    9. 

  9.  * published by the Free Software Foundation.
    10. 

  10.  *
    11. 

  11.  */
    12. 

  12. #ifndef _IOP321_IRQS_H_
    13. 

  13. #define _IOP321_IRQS_H_
    14. 

  14. 

  15. /*
    16. 

  16.  * IOP80321 chipset interrupts
    17. 

  17.  */
    18. 

  18. #define IOP321_IRQ_OFS		0
    19. 

  19. #define IOP321_IRQ(x)		(IOP321_IRQ_OFS + (x))
    20. 

  20. 

  21. /*
    22. 

  22.  * On IRQ or FIQ register
    23. 

  23.  */
    24. 

  24. #define IRQ_IOP321_DMA0_EOT	IOP321_IRQ(0)
    25. 

  25. #define IRQ_IOP321_DMA0_EOC	IOP321_IRQ(1)
    26. 

  26. #define IRQ_IOP321_DMA1_EOT	IOP321_IRQ(2)
    27. 

  27. #define IRQ_IOP321_DMA1_EOC	IOP321_IRQ(3)
    28. 

  28. #define IRQ_IOP321_RSVD_4	IOP321_IRQ(4)
    29. 

  29. #define IRQ_IOP321_RSVD_5	IOP321_IRQ(5)
    30. 

  30. #define IRQ_IOP321_AA_EOT	IOP321_IRQ(6)
    31. 

  31. #define IRQ_IOP321_AA_EOC	IOP321_IRQ(7)
    32. 

  32. #define IRQ_IOP321_CORE_PMON	IOP321_IRQ(8)
    33. 

  33. #define IRQ_IOP321_TIMER0	IOP321_IRQ(9)
    34. 

  34. #define IRQ_IOP321_TIMER1	IOP321_IRQ(10)
    35. 

  35. #define IRQ_IOP321_I2C_0	IOP321_IRQ(11)
    36. 

  36. #define IRQ_IOP321_I2C_1	IOP321_IRQ(12)
    37. 

  37. #define IRQ_IOP321_MESSAGING	IOP321_IRQ(13)
    38. 

  38. #define IRQ_IOP321_ATU_BIST	IOP321_IRQ(14)
    39. 

  39. #define IRQ_IOP321_PERFMON	IOP321_IRQ(15)
    40. 

  40. #define IRQ_IOP321_CORE_PMU	IOP321_IRQ(16)
    41. 

  41. #define IRQ_IOP321_BIU_ERR	IOP321_IRQ(17)
    42. 

  42. #define IRQ_IOP321_ATU_ERR	IOP321_IRQ(18)
    43. 

  43. #define IRQ_IOP321_MCU_ERR	IOP321_IRQ(19)
    44. 

  44. #define IRQ_IOP321_DMA0_ERR	IOP321_IRQ(20)
    45. 

  45. #define IRQ_IOP321_DMA1_ERR	IOP321_IRQ(21)
    46. 

  46. #define IRQ_IOP321_RSVD_22	IOP321_IRQ(22)
    47. 

  47. #define IRQ_IOP321_AA_ERR	IOP321_IRQ(23)
    48. 

  48. #define IRQ_IOP321_MSG_ERR	IOP321_IRQ(24)
    49. 

  49. #define IRQ_IOP321_SSP		IOP321_IRQ(25)
    50. 

  50. #define IRQ_IOP321_RSVD_26	IOP321_IRQ(26)
    51. 

  51. #define IRQ_IOP321_XINT0	IOP321_IRQ(27)
    52. 

  52. #define IRQ_IOP321_XINT1	IOP321_IRQ(28)
    53. 

  53. #define IRQ_IOP321_XINT2	IOP321_IRQ(29)
    54. 

  54. #define IRQ_IOP321_XINT3	IOP321_IRQ(30)
    55. 

  55. #define IRQ_IOP321_HPI		IOP321_IRQ(31)
    56. 

  56. 

  57. #define NR_IOP321_IRQS		(IOP321_IRQ(31) + 1)
    58. 

  58. 

  59. #define NR_IRQS			NR_IOP321_IRQS
    60. 

  60. 

  61. 

  62. /*
    63. 

  63.  * Interrupts available on the IQ80321 board
    64. 

  64.  */
    65. 

  65. 

  66. /*
    67. 

  67.  * On board devices
    68. 

  68.  */
    69. 

  69. #define	IRQ_IQ80321_I82544	IRQ_IOP321_XINT0
    70. 

  70. #define IRQ_IQ80321_UART	IRQ_IOP321_XINT1
    71. 

  71. 

  72. /*
    73. 

  73.  * PCI interrupts
    74. 

  74.  */
    75. 

  75. #define	IRQ_IQ80321_INTA	IRQ_IOP321_XINT0
    76. 

  76. #define	IRQ_IQ80321_INTB	IRQ_IOP321_XINT1
    77. 

  77. #define	IRQ_IQ80321_INTC	IRQ_IOP321_XINT2
    78. 

  78. #define	IRQ_IQ80321_INTD	IRQ_IOP321_XINT3
    79. 

  79. 

  80. /*
    81. 

  81.  * Interrupts on the IQ31244 board
    82. 

  82.  */
    83. 

  83. 

  84. /*
    85. 

  85.  * On board devices
    86. 

  86.  */
    87. 

  87. #define IRQ_IQ31244_UART	IRQ_IOP321_XINT1
    88. 

  88. #define	IRQ_IQ31244_I82546	IRQ_IOP321_XINT0
    89. 

  89. #define IRQ_IQ31244_SATA	IRQ_IOP321_XINT2
    90. 

  90. #define	IRQ_IQ31244_PCIX_SLOT	IRQ_IOP321_XINT3
    91. 

  91. 

  92. /*
    93. 

  93.  * PCI interrupts
    94. 

  94.  */
    95. 

  95. #define	IRQ_IQ31244_INTA	IRQ_IOP321_XINT0
    96. 

  96. #define	IRQ_IQ31244_INTB	IRQ_IOP321_XINT1
    97. 

  97. #define	IRQ_IQ31244_INTC	IRQ_IOP321_XINT2
    98. 

  98. #define	IRQ_IQ31244_INTD	IRQ_IOP321_XINT3
    99. 

  99. 

  100. #endif // _IOP321_IRQ_H_
    101.