init.c 163 KB

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  1. /* $XFree86$ */
  2. /* $XdotOrg$ */
  3. /*
  4. * Mode initializing code (CRT1 section) for
  5. * for SiS 300/305/540/630/730 and
  6. * SiS 315/550/650/M650/651/661FX/M661FX/740/741(GX)/M741/330/660/M660/760/M760
  7. * (Universal module for Linux kernel framebuffer and XFree86 4.x)
  8. *
  9. * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria
  10. *
  11. * If distributed as part of the Linux kernel, the following license terms
  12. * apply:
  13. *
  14. * * This program is free software; you can redistribute it and/or modify
  15. * * it under the terms of the GNU General Public License as published by
  16. * * the Free Software Foundation; either version 2 of the named License,
  17. * * or any later version.
  18. * *
  19. * * This program is distributed in the hope that it will be useful,
  20. * * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * * GNU General Public License for more details.
  23. * *
  24. * * You should have received a copy of the GNU General Public License
  25. * * along with this program; if not, write to the Free Software
  26. * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  27. *
  28. * Otherwise, the following license terms apply:
  29. *
  30. * * Redistribution and use in source and binary forms, with or without
  31. * * modification, are permitted provided that the following conditions
  32. * * are met:
  33. * * 1) Redistributions of source code must retain the above copyright
  34. * * notice, this list of conditions and the following disclaimer.
  35. * * 2) Redistributions in binary form must reproduce the above copyright
  36. * * notice, this list of conditions and the following disclaimer in the
  37. * * documentation and/or other materials provided with the distribution.
  38. * * 3) The name of the author may not be used to endorse or promote products
  39. * * derived from this software without specific prior written permission.
  40. * *
  41. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  42. * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  43. * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  44. * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  45. * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  46. * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  47. * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  48. * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  49. * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  50. * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  51. *
  52. * Author: Thomas Winischhofer <thomas@winischhofer.net>
  53. *
  54. * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
  55. * Used by permission.
  56. *
  57. * TW says: This code looks awful, I know. But please don't do anything about
  58. * this otherwise debugging will be hell.
  59. * The code is extremely fragile as regards the different chipsets, different
  60. * video bridges and combinations thereof. If anything is changed, extreme
  61. * care has to be taken that that change doesn't break it for other chipsets,
  62. * bridges or combinations thereof.
  63. * All comments in this file are by me, regardless if they are marked TW or not.
  64. *
  65. */
  66. #include "init.h"
  67. #ifdef SIS300
  68. #include "300vtbl.h"
  69. #endif
  70. #ifdef SIS315H
  71. #include "310vtbl.h"
  72. #endif
  73. #if defined(ALLOC_PRAGMA)
  74. #pragma alloc_text(PAGE,SiSSetMode)
  75. #endif
  76. /*********************************************/
  77. /* POINTER INITIALIZATION */
  78. /*********************************************/
  79. #if defined(SIS300) || defined(SIS315H)
  80. static void
  81. InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  82. {
  83. SiS_Pr->SiS_StResInfo = SiS_StResInfo;
  84. SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
  85. SiS_Pr->SiS_StandTable = SiS_StandTable;
  86. SiS_Pr->SiS_NTSCPhase = SiS_NTSCPhase;
  87. SiS_Pr->SiS_PALPhase = SiS_PALPhase;
  88. SiS_Pr->SiS_NTSCPhase2 = SiS_NTSCPhase2;
  89. SiS_Pr->SiS_PALPhase2 = SiS_PALPhase2;
  90. SiS_Pr->SiS_PALMPhase = SiS_PALMPhase;
  91. SiS_Pr->SiS_PALNPhase = SiS_PALNPhase;
  92. SiS_Pr->SiS_PALMPhase2 = SiS_PALMPhase2;
  93. SiS_Pr->SiS_PALNPhase2 = SiS_PALNPhase2;
  94. SiS_Pr->SiS_SpecialPhase = SiS_SpecialPhase;
  95. SiS_Pr->SiS_SpecialPhaseM = SiS_SpecialPhaseM;
  96. SiS_Pr->SiS_SpecialPhaseJ = SiS_SpecialPhaseJ;
  97. SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
  98. SiS_Pr->SiS_PALTiming = SiS_PALTiming;
  99. SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
  100. SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
  101. SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
  102. SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
  103. SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
  104. #if 0
  105. SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
  106. SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
  107. #endif
  108. SiS_Pr->SiS_StPALData = SiS_StPALData;
  109. SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
  110. SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
  111. SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
  112. SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
  113. SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
  114. SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
  115. SiS_Pr->SiS_St525iData = SiS_StNTSCData;
  116. SiS_Pr->SiS_St525pData = SiS_St525pData;
  117. SiS_Pr->SiS_St750pData = SiS_St750pData;
  118. SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
  119. SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
  120. SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
  121. SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
  122. SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
  123. SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
  124. SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
  125. SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
  126. SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
  127. SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
  128. SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
  129. SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
  130. SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
  131. SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
  132. SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
  133. SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
  134. SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
  135. SiS_Pr->SiS_LVDS320x480Data_1 = SiS_LVDS320x480Data_1;
  136. SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
  137. SiS_Pr->SiS_LVDS800x600Data_2 = SiS_LVDS800x600Data_2;
  138. SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
  139. SiS_Pr->SiS_LVDS1024x768Data_2 = SiS_LVDS1024x768Data_2;
  140. SiS_Pr->SiS_LVDS1280x1024Data_1 = SiS_LVDS1280x1024Data_1;
  141. SiS_Pr->SiS_LVDS1280x1024Data_2 = SiS_LVDS1280x1024Data_2;
  142. SiS_Pr->SiS_LVDS1400x1050Data_1 = SiS_LVDS1400x1050Data_1;
  143. SiS_Pr->SiS_LVDS1400x1050Data_2 = SiS_LVDS1400x1050Data_2;
  144. SiS_Pr->SiS_LVDS1600x1200Data_1 = SiS_LVDS1600x1200Data_1;
  145. SiS_Pr->SiS_LVDS1600x1200Data_2 = SiS_LVDS1600x1200Data_2;
  146. SiS_Pr->SiS_LVDS1280x768Data_1 = SiS_LVDS1280x768Data_1;
  147. SiS_Pr->SiS_LVDS1280x768Data_2 = SiS_LVDS1280x768Data_2;
  148. SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
  149. SiS_Pr->SiS_LVDS1024x600Data_2 = SiS_LVDS1024x600Data_2;
  150. SiS_Pr->SiS_LVDS1152x768Data_1 = SiS_LVDS1152x768Data_1;
  151. SiS_Pr->SiS_LVDS1152x768Data_2 = SiS_LVDS1152x768Data_2;
  152. SiS_Pr->SiS_LVDSXXXxXXXData_1 = SiS_LVDSXXXxXXXData_1;
  153. SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x960Data_1;
  154. SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x960Data_2;
  155. SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
  156. SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x1024Data_1;
  157. SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x1024Data_2;
  158. SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
  159. SiS_Pr->SiS_LVDS640x480Data_2 = SiS_LVDS640x480Data_2;
  160. SiS_Pr->SiS_LVDS848x480Data_1 = SiS_LVDS848x480Data_1;
  161. SiS_Pr->SiS_LVDS848x480Data_2 = SiS_LVDS848x480Data_2;
  162. SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS_LVDSBARCO1024Data_1;
  163. SiS_Pr->SiS_LVDSBARCO1024Data_2 = SiS_LVDSBARCO1024Data_2;
  164. SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS_LVDSBARCO1366Data_1;
  165. SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS_LVDSBARCO1366Data_2;
  166. SiS_Pr->SiS_LVDSCRT11280x768_1 = SiS_LVDSCRT11280x768_1;
  167. SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
  168. SiS_Pr->SiS_LVDSCRT11152x768_1 = SiS_LVDSCRT11152x768_1;
  169. SiS_Pr->SiS_LVDSCRT11280x768_1_H = SiS_LVDSCRT11280x768_1_H;
  170. SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
  171. SiS_Pr->SiS_LVDSCRT11152x768_1_H = SiS_LVDSCRT11152x768_1_H;
  172. SiS_Pr->SiS_LVDSCRT11280x768_2 = SiS_LVDSCRT11280x768_2;
  173. SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
  174. SiS_Pr->SiS_LVDSCRT11152x768_2 = SiS_LVDSCRT11152x768_2;
  175. SiS_Pr->SiS_LVDSCRT11280x768_2_H = SiS_LVDSCRT11280x768_2_H;
  176. SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
  177. SiS_Pr->SiS_LVDSCRT11152x768_2_H = SiS_LVDSCRT11152x768_2_H;
  178. SiS_Pr->SiS_LVDSCRT1320x480_1 = SiS_LVDSCRT1320x480_1;
  179. SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
  180. SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
  181. SiS_Pr->SiS_LVDSCRT1640x480_2 = SiS_LVDSCRT1640x480_2;
  182. SiS_Pr->SiS_LVDSCRT1640x480_2_H = SiS_LVDSCRT1640x480_2_H;
  183. SiS_Pr->SiS_LVDSCRT1640x480_3 = SiS_LVDSCRT1640x480_3;
  184. SiS_Pr->SiS_LVDSCRT1640x480_3_H = SiS_LVDSCRT1640x480_3_H;
  185. SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
  186. SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
  187. SiS_Pr->SiS_CHTVUNTSCDesData = SiS_CHTVUNTSCDesData;
  188. SiS_Pr->SiS_CHTVONTSCDesData = SiS_CHTVONTSCDesData;
  189. SiS_Pr->SiS_CHTVUPALDesData = SiS_CHTVUPALDesData;
  190. SiS_Pr->SiS_CHTVOPALDesData = SiS_CHTVOPALDesData;
  191. SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
  192. SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
  193. }
  194. #endif
  195. #ifdef SIS300
  196. static void
  197. InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  198. {
  199. InitCommonPointer(SiS_Pr, HwInfo);
  200. SiS_Pr->SiS_SModeIDTable = SiS300_SModeIDTable;
  201. SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
  202. SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
  203. SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
  204. SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
  205. if(HwInfo->jChipType == SIS_300) {
  206. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
  207. } else {
  208. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
  209. }
  210. SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
  211. SiS_Pr->SiS_VBVCLKData = (SiS_VBVCLKDataStruct *)SiS300_VCLKData;
  212. SiS_Pr->SiS_SR15 = SiS300_SR15;
  213. #ifdef LINUX_KERNEL
  214. SiS_Pr->pSiS_SR07 = &SiS300_SR07;
  215. SiS_Pr->SiS_CR40 = SiS300_CR40;
  216. SiS_Pr->SiS_CR49 = SiS300_CR49;
  217. SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
  218. SiS_Pr->pSiS_SR21 = &SiS300_SR21;
  219. SiS_Pr->pSiS_SR22 = &SiS300_SR22;
  220. SiS_Pr->pSiS_SR23 = &SiS300_SR23;
  221. SiS_Pr->pSiS_SR24 = &SiS300_SR24;
  222. SiS_Pr->SiS_SR25 = SiS300_SR25;
  223. SiS_Pr->pSiS_SR31 = &SiS300_SR31;
  224. SiS_Pr->pSiS_SR32 = &SiS300_SR32;
  225. SiS_Pr->pSiS_SR33 = &SiS300_SR33;
  226. SiS_Pr->pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
  227. SiS_Pr->pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
  228. SiS_Pr->pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
  229. SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
  230. SiS_Pr->pSiS_RGBSenseData = &SiS300_RGBSenseData;
  231. SiS_Pr->pSiS_VideoSenseData = &SiS300_VideoSenseData;
  232. SiS_Pr->pSiS_YCSenseData = &SiS300_YCSenseData;
  233. SiS_Pr->pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
  234. SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
  235. SiS_Pr->pSiS_YCSenseData2 = &SiS300_YCSenseData2;
  236. #endif
  237. SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
  238. SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
  239. SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
  240. SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
  241. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
  242. SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
  243. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
  244. SiS_Pr->SiS_CRT2Part2_1280x1024_1 = SiS300_CRT2Part2_1280x1024_1;
  245. SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
  246. SiS_Pr->SiS_CRT2Part2_1280x1024_2 = SiS300_CRT2Part2_1280x1024_2;
  247. SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
  248. SiS_Pr->SiS_CRT2Part2_1280x1024_3 = SiS300_CRT2Part2_1280x1024_3;
  249. SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
  250. SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
  251. SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
  252. SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
  253. SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
  254. SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
  255. SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
  256. SiS_Pr->SiS_PanelType00_1 = SiS300_PanelType00_1;
  257. SiS_Pr->SiS_PanelType01_1 = SiS300_PanelType01_1;
  258. SiS_Pr->SiS_PanelType02_1 = SiS300_PanelType02_1;
  259. SiS_Pr->SiS_PanelType03_1 = SiS300_PanelType03_1;
  260. SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1;
  261. SiS_Pr->SiS_PanelType05_1 = SiS300_PanelType05_1;
  262. SiS_Pr->SiS_PanelType06_1 = SiS300_PanelType06_1;
  263. SiS_Pr->SiS_PanelType07_1 = SiS300_PanelType07_1;
  264. SiS_Pr->SiS_PanelType08_1 = SiS300_PanelType08_1;
  265. SiS_Pr->SiS_PanelType09_1 = SiS300_PanelType09_1;
  266. SiS_Pr->SiS_PanelType0a_1 = SiS300_PanelType0a_1;
  267. SiS_Pr->SiS_PanelType0b_1 = SiS300_PanelType0b_1;
  268. SiS_Pr->SiS_PanelType0c_1 = SiS300_PanelType0c_1;
  269. SiS_Pr->SiS_PanelType0d_1 = SiS300_PanelType0d_1;
  270. SiS_Pr->SiS_PanelType0e_1 = SiS300_PanelType0e_1;
  271. SiS_Pr->SiS_PanelType0f_1 = SiS300_PanelType0f_1;
  272. SiS_Pr->SiS_PanelType00_2 = SiS300_PanelType00_2;
  273. SiS_Pr->SiS_PanelType01_2 = SiS300_PanelType01_2;
  274. SiS_Pr->SiS_PanelType02_2 = SiS300_PanelType02_2;
  275. SiS_Pr->SiS_PanelType03_2 = SiS300_PanelType03_2;
  276. SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2;
  277. SiS_Pr->SiS_PanelType05_2 = SiS300_PanelType05_2;
  278. SiS_Pr->SiS_PanelType06_2 = SiS300_PanelType06_2;
  279. SiS_Pr->SiS_PanelType07_2 = SiS300_PanelType07_2;
  280. SiS_Pr->SiS_PanelType08_2 = SiS300_PanelType08_2;
  281. SiS_Pr->SiS_PanelType09_2 = SiS300_PanelType09_2;
  282. SiS_Pr->SiS_PanelType0a_2 = SiS300_PanelType0a_2;
  283. SiS_Pr->SiS_PanelType0b_2 = SiS300_PanelType0b_2;
  284. SiS_Pr->SiS_PanelType0c_2 = SiS300_PanelType0c_2;
  285. SiS_Pr->SiS_PanelType0d_2 = SiS300_PanelType0d_2;
  286. SiS_Pr->SiS_PanelType0e_2 = SiS300_PanelType0e_2;
  287. SiS_Pr->SiS_PanelType0f_2 = SiS300_PanelType0f_2;
  288. SiS_Pr->SiS_PanelTypeNS_1 = SiS300_PanelTypeNS_1;
  289. SiS_Pr->SiS_PanelTypeNS_2 = SiS300_PanelTypeNS_2;
  290. if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
  291. SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1a;
  292. SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2a;
  293. }
  294. if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
  295. SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1b;
  296. SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2b;
  297. }
  298. SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS300_LVDSCRT1800x600_1;
  299. SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS300_LVDSCRT1800x600_1_H;
  300. SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS300_LVDSCRT1800x600_2;
  301. SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS300_LVDSCRT1800x600_2_H;
  302. SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS300_LVDSCRT11024x768_1;
  303. SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS300_LVDSCRT11024x768_1_H;
  304. SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS300_LVDSCRT11024x768_2;
  305. SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS300_LVDSCRT11024x768_2_H;
  306. SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS300_LVDSCRT11280x1024_1;
  307. SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS300_LVDSCRT11280x1024_1_H;
  308. SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS300_LVDSCRT11280x1024_2;
  309. SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS300_LVDSCRT11280x1024_2_H;
  310. SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS300_LVDSCRT1XXXxXXX_1;
  311. SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS300_LVDSCRT1XXXxXXX_1_H;
  312. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
  313. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
  314. SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
  315. SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
  316. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
  317. SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
  318. SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
  319. SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
  320. SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
  321. SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
  322. SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
  323. SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
  324. SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
  325. SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
  326. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
  327. SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
  328. SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
  329. SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
  330. SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
  331. SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
  332. SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
  333. SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
  334. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
  335. }
  336. #endif
  337. #ifdef SIS315H
  338. static void
  339. InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  340. {
  341. InitCommonPointer(SiS_Pr, HwInfo);
  342. SiS_Pr->SiS_SModeIDTable = SiS310_SModeIDTable;
  343. SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
  344. SiS_Pr->SiS_RefIndex = (SiS_Ext2Struct *)SiS310_RefIndex;
  345. SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
  346. if(HwInfo->jChipType >= SIS_340) {
  347. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 */
  348. } else if(HwInfo->jChipType >= SIS_761) {
  349. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
  350. } else if(HwInfo->jChipType >= SIS_760) {
  351. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
  352. } else if(HwInfo->jChipType >= SIS_661) {
  353. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
  354. } else if(HwInfo->jChipType == SIS_330) {
  355. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
  356. } else if(HwInfo->jChipType > SIS_315PRO) {
  357. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
  358. } else {
  359. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
  360. }
  361. if(HwInfo->jChipType >= SIS_340) {
  362. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
  363. } else {
  364. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
  365. }
  366. SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
  367. SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
  368. SiS_Pr->SiS_SR15 = SiS310_SR15;
  369. #ifdef LINUX_KERNEL
  370. SiS_Pr->pSiS_SR07 = &SiS310_SR07;
  371. SiS_Pr->SiS_CR40 = SiS310_CR40;
  372. SiS_Pr->SiS_CR49 = SiS310_CR49;
  373. SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
  374. SiS_Pr->pSiS_SR21 = &SiS310_SR21;
  375. SiS_Pr->pSiS_SR22 = &SiS310_SR22;
  376. SiS_Pr->pSiS_SR23 = &SiS310_SR23;
  377. SiS_Pr->pSiS_SR24 = &SiS310_SR24;
  378. SiS_Pr->SiS_SR25 = SiS310_SR25;
  379. SiS_Pr->pSiS_SR31 = &SiS310_SR31;
  380. SiS_Pr->pSiS_SR32 = &SiS310_SR32;
  381. SiS_Pr->pSiS_SR33 = &SiS310_SR33;
  382. SiS_Pr->pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
  383. SiS_Pr->pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
  384. SiS_Pr->pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
  385. SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
  386. SiS_Pr->pSiS_RGBSenseData = &SiS310_RGBSenseData;
  387. SiS_Pr->pSiS_VideoSenseData = &SiS310_VideoSenseData;
  388. SiS_Pr->pSiS_YCSenseData = &SiS310_YCSenseData;
  389. SiS_Pr->pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
  390. SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
  391. SiS_Pr->pSiS_YCSenseData2 = &SiS310_YCSenseData2;
  392. #endif
  393. SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
  394. SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
  395. SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
  396. SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
  397. SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
  398. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
  399. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
  400. SiS_Pr->SiS_PanelType00_1 = SiS310_PanelType00_1;
  401. SiS_Pr->SiS_PanelType01_1 = SiS310_PanelType01_1;
  402. SiS_Pr->SiS_PanelType02_1 = SiS310_PanelType02_1;
  403. SiS_Pr->SiS_PanelType03_1 = SiS310_PanelType03_1;
  404. SiS_Pr->SiS_PanelType04_1 = SiS310_PanelType04_1;
  405. SiS_Pr->SiS_PanelType05_1 = SiS310_PanelType05_1;
  406. SiS_Pr->SiS_PanelType06_1 = SiS310_PanelType06_1;
  407. SiS_Pr->SiS_PanelType07_1 = SiS310_PanelType07_1;
  408. SiS_Pr->SiS_PanelType08_1 = SiS310_PanelType08_1;
  409. SiS_Pr->SiS_PanelType09_1 = SiS310_PanelType09_1;
  410. SiS_Pr->SiS_PanelType0a_1 = SiS310_PanelType0a_1;
  411. SiS_Pr->SiS_PanelType0b_1 = SiS310_PanelType0b_1;
  412. SiS_Pr->SiS_PanelType0c_1 = SiS310_PanelType0c_1;
  413. SiS_Pr->SiS_PanelType0d_1 = SiS310_PanelType0d_1;
  414. SiS_Pr->SiS_PanelType0e_1 = SiS310_PanelType0e_1;
  415. SiS_Pr->SiS_PanelType0f_1 = SiS310_PanelType0f_1;
  416. SiS_Pr->SiS_PanelType00_2 = SiS310_PanelType00_2;
  417. SiS_Pr->SiS_PanelType01_2 = SiS310_PanelType01_2;
  418. SiS_Pr->SiS_PanelType02_2 = SiS310_PanelType02_2;
  419. SiS_Pr->SiS_PanelType03_2 = SiS310_PanelType03_2;
  420. SiS_Pr->SiS_PanelType04_2 = SiS310_PanelType04_2;
  421. SiS_Pr->SiS_PanelType05_2 = SiS310_PanelType05_2;
  422. SiS_Pr->SiS_PanelType06_2 = SiS310_PanelType06_2;
  423. SiS_Pr->SiS_PanelType07_2 = SiS310_PanelType07_2;
  424. SiS_Pr->SiS_PanelType08_2 = SiS310_PanelType08_2;
  425. SiS_Pr->SiS_PanelType09_2 = SiS310_PanelType09_2;
  426. SiS_Pr->SiS_PanelType0a_2 = SiS310_PanelType0a_2;
  427. SiS_Pr->SiS_PanelType0b_2 = SiS310_PanelType0b_2;
  428. SiS_Pr->SiS_PanelType0c_2 = SiS310_PanelType0c_2;
  429. SiS_Pr->SiS_PanelType0d_2 = SiS310_PanelType0d_2;
  430. SiS_Pr->SiS_PanelType0e_2 = SiS310_PanelType0e_2;
  431. SiS_Pr->SiS_PanelType0f_2 = SiS310_PanelType0f_2;
  432. SiS_Pr->SiS_PanelTypeNS_1 = SiS310_PanelTypeNS_1;
  433. SiS_Pr->SiS_PanelTypeNS_2 = SiS310_PanelTypeNS_2;
  434. SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
  435. SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
  436. SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
  437. SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
  438. SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
  439. SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
  440. SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
  441. SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS310_LVDSCRT1800x600_1;
  442. SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS310_LVDSCRT11024x768_1;
  443. SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS310_LVDSCRT11280x1024_1;
  444. SiS_Pr->SiS_LVDSCRT11400x1050_1 = SiS310_LVDSCRT11400x1050_1;
  445. SiS_Pr->SiS_LVDSCRT11600x1200_1 = SiS310_LVDSCRT11600x1200_1;
  446. SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS310_LVDSCRT1800x600_1_H;
  447. SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS310_LVDSCRT11024x768_1_H;
  448. SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS310_LVDSCRT11280x1024_1_H;
  449. SiS_Pr->SiS_LVDSCRT11400x1050_1_H = SiS310_LVDSCRT11400x1050_1_H;
  450. SiS_Pr->SiS_LVDSCRT11600x1200_1_H = SiS310_LVDSCRT11600x1200_1_H;
  451. SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS310_LVDSCRT1800x600_2;
  452. SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS310_LVDSCRT11024x768_2;
  453. SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS310_LVDSCRT11280x1024_2;
  454. SiS_Pr->SiS_LVDSCRT11400x1050_2 = SiS310_LVDSCRT11400x1050_2;
  455. SiS_Pr->SiS_LVDSCRT11600x1200_2 = SiS310_LVDSCRT11600x1200_2;
  456. SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS310_LVDSCRT1800x600_2_H;
  457. SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS310_LVDSCRT11024x768_2_H;
  458. SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS310_LVDSCRT11280x1024_2_H;
  459. SiS_Pr->SiS_LVDSCRT11400x1050_2_H = SiS310_LVDSCRT11400x1050_2_H;
  460. SiS_Pr->SiS_LVDSCRT11600x1200_2_H = SiS310_LVDSCRT11600x1200_2_H;
  461. SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS310_LVDSCRT1XXXxXXX_1;
  462. SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS310_LVDSCRT1XXXxXXX_1_H;
  463. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
  464. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
  465. SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
  466. SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
  467. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
  468. SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
  469. SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
  470. SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
  471. SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
  472. SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
  473. SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
  474. SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
  475. SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
  476. SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
  477. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
  478. SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
  479. SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
  480. SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
  481. SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
  482. SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
  483. SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
  484. SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
  485. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
  486. }
  487. #endif
  488. static void
  489. SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  490. {
  491. switch(HwInfo->jChipType) {
  492. #ifdef SIS315H
  493. case SIS_315H:
  494. case SIS_315:
  495. case SIS_315PRO:
  496. case SIS_550:
  497. case SIS_650:
  498. case SIS_740:
  499. case SIS_330:
  500. case SIS_661:
  501. case SIS_741:
  502. case SIS_660:
  503. case SIS_760:
  504. case SIS_761:
  505. case SIS_340:
  506. InitTo310Pointer(SiS_Pr, HwInfo);
  507. break;
  508. #endif
  509. #ifdef SIS300
  510. case SIS_300:
  511. case SIS_540:
  512. case SIS_630:
  513. case SIS_730:
  514. InitTo300Pointer(SiS_Pr, HwInfo);
  515. break;
  516. #endif
  517. default:
  518. break;
  519. }
  520. }
  521. /*********************************************/
  522. /* HELPER: Get ModeID */
  523. /*********************************************/
  524. #ifdef LINUX_XF86
  525. USHORT
  526. SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
  527. int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight)
  528. {
  529. USHORT ModeIndex = 0;
  530. switch(HDisplay)
  531. {
  532. case 320:
  533. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  534. else if(VDisplay == 240) {
  535. if(FSTN) ModeIndex = ModeIndex_320x240_FSTN[Depth];
  536. else ModeIndex = ModeIndex_320x240[Depth];
  537. }
  538. break;
  539. case 400:
  540. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
  541. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  542. }
  543. break;
  544. case 512:
  545. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
  546. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  547. }
  548. break;
  549. case 640:
  550. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  551. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  552. break;
  553. case 720:
  554. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  555. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  556. break;
  557. case 768:
  558. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  559. break;
  560. case 800:
  561. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  562. else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  563. break;
  564. case 848:
  565. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  566. break;
  567. case 856:
  568. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  569. break;
  570. case 960:
  571. if(VGAEngine == SIS_315_VGA) {
  572. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  573. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  574. }
  575. break;
  576. case 1024:
  577. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  578. else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  579. else if(VGAEngine == SIS_300_VGA) {
  580. if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
  581. }
  582. break;
  583. case 1152:
  584. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  585. if(VGAEngine == SIS_300_VGA) {
  586. if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
  587. }
  588. break;
  589. case 1280:
  590. switch(VDisplay) {
  591. case 720:
  592. ModeIndex = ModeIndex_1280x720[Depth];
  593. break;
  594. case 768:
  595. if(VGAEngine == SIS_300_VGA) {
  596. ModeIndex = ModeIndex_300_1280x768[Depth];
  597. } else {
  598. ModeIndex = ModeIndex_310_1280x768[Depth];
  599. }
  600. break;
  601. case 800:
  602. if(VGAEngine == SIS_315_VGA) {
  603. ModeIndex = ModeIndex_1280x800[Depth];
  604. }
  605. break;
  606. case 960:
  607. ModeIndex = ModeIndex_1280x960[Depth];
  608. break;
  609. case 1024:
  610. ModeIndex = ModeIndex_1280x1024[Depth];
  611. break;
  612. }
  613. break;
  614. case 1360:
  615. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  616. if(VGAEngine == SIS_300_VGA) {
  617. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  618. }
  619. break;
  620. case 1400:
  621. if(VGAEngine == SIS_315_VGA) {
  622. if(VDisplay == 1050) {
  623. ModeIndex = ModeIndex_1400x1050[Depth];
  624. }
  625. }
  626. break;
  627. case 1600:
  628. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  629. break;
  630. case 1680:
  631. if(VGAEngine == SIS_315_VGA) {
  632. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  633. }
  634. break;
  635. case 1920:
  636. if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
  637. else if(VGAEngine == SIS_315_VGA) {
  638. if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
  639. }
  640. break;
  641. case 2048:
  642. if(VDisplay == 1536) {
  643. if(VGAEngine == SIS_300_VGA) {
  644. ModeIndex = ModeIndex_300_2048x1536[Depth];
  645. } else {
  646. ModeIndex = ModeIndex_310_2048x1536[Depth];
  647. }
  648. }
  649. break;
  650. }
  651. return(ModeIndex);
  652. }
  653. #endif
  654. USHORT
  655. SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
  656. int Depth, BOOLEAN FSTN, USHORT CustomT, int LCDwidth, int LCDheight)
  657. {
  658. USHORT ModeIndex = 0;
  659. if(VBFlags & (VB_LVDS | VB_30xBDH)) {
  660. switch(HDisplay)
  661. {
  662. case 320:
  663. if(CustomT != CUT_PANEL848) {
  664. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  665. else if(VDisplay == 240) {
  666. if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
  667. else if(VGAEngine == SIS_315_VGA) {
  668. ModeIndex = ModeIndex_320x240_FSTN[Depth];
  669. }
  670. }
  671. }
  672. break;
  673. case 400:
  674. if(CustomT != CUT_PANEL848) {
  675. if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
  676. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  677. }
  678. }
  679. break;
  680. case 512:
  681. if(CustomT != CUT_PANEL848) {
  682. if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) {
  683. if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
  684. if(VDisplay == 384) {
  685. ModeIndex = ModeIndex_512x384[Depth];
  686. }
  687. }
  688. }
  689. }
  690. break;
  691. case 640:
  692. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  693. else if(VDisplay == 400) {
  694. if(CustomT != CUT_PANEL848) ModeIndex = ModeIndex_640x400[Depth];
  695. }
  696. break;
  697. case 800:
  698. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  699. break;
  700. case 848:
  701. if(CustomT == CUT_PANEL848) {
  702. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  703. }
  704. break;
  705. case 1024:
  706. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  707. else if(VGAEngine == SIS_300_VGA) {
  708. if((VDisplay == 600) && (LCDheight == 600)) {
  709. ModeIndex = ModeIndex_1024x600[Depth];
  710. }
  711. }
  712. break;
  713. case 1152:
  714. if(VGAEngine == SIS_300_VGA) {
  715. if((VDisplay == 768) && (LCDheight == 768)) {
  716. ModeIndex = ModeIndex_1152x768[Depth];
  717. }
  718. }
  719. break;
  720. case 1280:
  721. if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
  722. else if(VGAEngine == SIS_315_VGA) {
  723. if((VDisplay == 768) && (LCDheight == 768)) {
  724. ModeIndex = ModeIndex_310_1280x768[Depth];
  725. }
  726. }
  727. break;
  728. case 1360:
  729. if(VGAEngine == SIS_300_VGA) {
  730. if(CustomT == CUT_BARCO1366) {
  731. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  732. }
  733. }
  734. if(CustomT == CUT_PANEL848) {
  735. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  736. }
  737. break;
  738. case 1400:
  739. if(VGAEngine == SIS_315_VGA) {
  740. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  741. }
  742. break;
  743. case 1600:
  744. if(VGAEngine == SIS_315_VGA) {
  745. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  746. }
  747. break;
  748. }
  749. } else if(VBFlags & VB_SISBRIDGE) {
  750. switch(HDisplay)
  751. {
  752. case 320:
  753. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  754. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  755. break;
  756. case 400:
  757. if(LCDwidth >= 800 && LCDheight >= 600) {
  758. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  759. }
  760. break;
  761. case 512:
  762. if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
  763. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  764. }
  765. break;
  766. case 640:
  767. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  768. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  769. break;
  770. case 720:
  771. if(VGAEngine == SIS_315_VGA) {
  772. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  773. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  774. }
  775. break;
  776. case 768:
  777. if(VGAEngine == SIS_315_VGA) {
  778. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  779. }
  780. break;
  781. case 800:
  782. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  783. if(VGAEngine == SIS_315_VGA) {
  784. if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  785. }
  786. break;
  787. case 848:
  788. if(VGAEngine == SIS_315_VGA) {
  789. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  790. }
  791. break;
  792. case 856:
  793. if(VGAEngine == SIS_315_VGA) {
  794. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  795. }
  796. break;
  797. case 960:
  798. if(VGAEngine == SIS_315_VGA) {
  799. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  800. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  801. }
  802. break;
  803. case 1024:
  804. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  805. if(VGAEngine == SIS_315_VGA) {
  806. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  807. }
  808. break;
  809. case 1152:
  810. if(VGAEngine == SIS_315_VGA) {
  811. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  812. }
  813. break;
  814. case 1280:
  815. switch(VDisplay) {
  816. case 720:
  817. ModeIndex = ModeIndex_1280x720[Depth];
  818. case 768:
  819. if(VGAEngine == SIS_300_VGA) {
  820. ModeIndex = ModeIndex_300_1280x768[Depth];
  821. } else {
  822. ModeIndex = ModeIndex_310_1280x768[Depth];
  823. }
  824. break;
  825. case 800:
  826. if(VGAEngine == SIS_315_VGA) {
  827. ModeIndex = ModeIndex_1280x800[Depth];
  828. }
  829. break;
  830. case 960:
  831. ModeIndex = ModeIndex_1280x960[Depth];
  832. break;
  833. case 1024:
  834. ModeIndex = ModeIndex_1280x1024[Depth];
  835. break;
  836. }
  837. break;
  838. case 1360:
  839. if(VGAEngine == SIS_315_VGA) {
  840. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  841. }
  842. break;
  843. case 1400:
  844. if(VGAEngine == SIS_315_VGA) {
  845. if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) {
  846. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  847. }
  848. }
  849. break;
  850. case 1600:
  851. if(VGAEngine == SIS_315_VGA) {
  852. if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) {
  853. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  854. }
  855. }
  856. break;
  857. #ifndef VB_FORBID_CRT2LCD_OVER_1600
  858. case 1680:
  859. if(VGAEngine == SIS_315_VGA) {
  860. if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) {
  861. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  862. }
  863. }
  864. break;
  865. #endif
  866. }
  867. }
  868. return ModeIndex;
  869. }
  870. USHORT
  871. SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
  872. {
  873. USHORT ModeIndex = 0;
  874. if(VBFlags & VB_CHRONTEL) {
  875. switch(HDisplay)
  876. {
  877. case 512:
  878. if(VGAEngine == SIS_315_VGA) {
  879. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  880. }
  881. break;
  882. case 640:
  883. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  884. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  885. break;
  886. case 800:
  887. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  888. break;
  889. case 1024:
  890. if(VGAEngine == SIS_315_VGA) {
  891. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  892. }
  893. break;
  894. }
  895. } else if(VBFlags & VB_SISTVBRIDGE) {
  896. switch(HDisplay)
  897. {
  898. case 320:
  899. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  900. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  901. break;
  902. case 400:
  903. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  904. break;
  905. case 512:
  906. if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
  907. (VBFlags & TV_HIVISION) ||
  908. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  909. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  910. }
  911. break;
  912. case 640:
  913. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  914. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  915. break;
  916. case 720:
  917. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  918. if(VDisplay == 480) {
  919. ModeIndex = ModeIndex_720x480[Depth];
  920. } else if(VDisplay == 576) {
  921. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  922. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
  923. ModeIndex = ModeIndex_720x576[Depth];
  924. }
  925. }
  926. break;
  927. case 768:
  928. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  929. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  930. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  931. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  932. }
  933. }
  934. break;
  935. case 800:
  936. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  937. else if(VDisplay == 480) {
  938. if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  939. ModeIndex = ModeIndex_800x480[Depth];
  940. }
  941. }
  942. break;
  943. case 960:
  944. if(VGAEngine == SIS_315_VGA) {
  945. if(VDisplay == 600) {
  946. if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  947. ModeIndex = ModeIndex_960x600[Depth];
  948. }
  949. }
  950. }
  951. break;
  952. case 1024:
  953. if(VDisplay == 768) {
  954. if(VBFlags & (VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)) {
  955. ModeIndex = ModeIndex_1024x768[Depth];
  956. }
  957. } else if(VDisplay == 576) {
  958. if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  959. ModeIndex = ModeIndex_1024x576[Depth];
  960. }
  961. }
  962. break;
  963. case 1280:
  964. if(VDisplay == 720) {
  965. if((VBFlags & TV_HIVISION) ||
  966. ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
  967. ModeIndex = ModeIndex_1280x720[Depth];
  968. }
  969. } else if(VDisplay == 1024) {
  970. if((VBFlags & TV_HIVISION) ||
  971. ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  972. ModeIndex = ModeIndex_1280x1024[Depth];
  973. }
  974. }
  975. break;
  976. }
  977. }
  978. return ModeIndex;
  979. }
  980. USHORT
  981. SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth)
  982. {
  983. USHORT ModeIndex = 0;
  984. if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0;
  985. switch(HDisplay)
  986. {
  987. case 320:
  988. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  989. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  990. break;
  991. case 400:
  992. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  993. break;
  994. case 512:
  995. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  996. break;
  997. case 640:
  998. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  999. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  1000. break;
  1001. case 720:
  1002. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  1003. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  1004. break;
  1005. case 768:
  1006. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  1007. break;
  1008. case 800:
  1009. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  1010. else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  1011. break;
  1012. case 848:
  1013. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  1014. break;
  1015. case 856:
  1016. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  1017. break;
  1018. case 960:
  1019. if(VGAEngine == SIS_315_VGA) {
  1020. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  1021. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  1022. }
  1023. break;
  1024. case 1024:
  1025. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  1026. else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  1027. break;
  1028. case 1152:
  1029. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  1030. else if(VGAEngine == SIS_300_VGA) {
  1031. if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
  1032. }
  1033. break;
  1034. case 1280:
  1035. if(VDisplay == 768) {
  1036. if(VGAEngine == SIS_300_VGA) {
  1037. ModeIndex = ModeIndex_300_1280x768[Depth];
  1038. } else {
  1039. ModeIndex = ModeIndex_310_1280x768[Depth];
  1040. }
  1041. } else if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
  1042. else if(VDisplay == 720) ModeIndex = ModeIndex_1280x720[Depth];
  1043. else if(VDisplay == 800) ModeIndex = ModeIndex_1280x800[Depth];
  1044. else if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
  1045. break;
  1046. case 1360:
  1047. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  1048. break;
  1049. case 1400:
  1050. if(VGAEngine == SIS_315_VGA) {
  1051. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  1052. }
  1053. break;
  1054. case 1600:
  1055. if(VGAEngine == SIS_315_VGA) {
  1056. if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
  1057. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  1058. }
  1059. }
  1060. break;
  1061. case 1680:
  1062. if(VGAEngine == SIS_315_VGA) {
  1063. if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
  1064. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  1065. }
  1066. }
  1067. break;
  1068. }
  1069. return ModeIndex;
  1070. }
  1071. /*********************************************/
  1072. /* HELPER: SetReg, GetReg */
  1073. /*********************************************/
  1074. void
  1075. SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data)
  1076. {
  1077. OutPortByte(port,index);
  1078. OutPortByte(port + 1,data);
  1079. }
  1080. void
  1081. SiS_SetRegByte(SISIOADDRESS port, USHORT data)
  1082. {
  1083. OutPortByte(port,data);
  1084. }
  1085. void
  1086. SiS_SetRegShort(SISIOADDRESS port, USHORT data)
  1087. {
  1088. OutPortWord(port,data);
  1089. }
  1090. void
  1091. SiS_SetRegLong(SISIOADDRESS port, ULONG data)
  1092. {
  1093. OutPortLong(port,data);
  1094. }
  1095. UCHAR
  1096. SiS_GetReg(SISIOADDRESS port, USHORT index)
  1097. {
  1098. OutPortByte(port,index);
  1099. return(InPortByte(port + 1));
  1100. }
  1101. UCHAR
  1102. SiS_GetRegByte(SISIOADDRESS port)
  1103. {
  1104. return(InPortByte(port));
  1105. }
  1106. USHORT
  1107. SiS_GetRegShort(SISIOADDRESS port)
  1108. {
  1109. return(InPortWord(port));
  1110. }
  1111. ULONG
  1112. SiS_GetRegLong(SISIOADDRESS port)
  1113. {
  1114. return(InPortLong(port));
  1115. }
  1116. void
  1117. SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR)
  1118. {
  1119. USHORT temp;
  1120. temp = SiS_GetReg(Port,Index);
  1121. temp = (temp & (DataAND)) | DataOR;
  1122. SiS_SetReg(Port,Index,temp);
  1123. }
  1124. void
  1125. SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND)
  1126. {
  1127. USHORT temp;
  1128. temp = SiS_GetReg(Port,Index);
  1129. temp &= DataAND;
  1130. SiS_SetReg(Port,Index,temp);
  1131. }
  1132. void
  1133. SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
  1134. {
  1135. USHORT temp;
  1136. temp = SiS_GetReg(Port,Index);
  1137. temp |= DataOR;
  1138. SiS_SetReg(Port,Index,temp);
  1139. }
  1140. /*********************************************/
  1141. /* HELPER: DisplayOn, DisplayOff */
  1142. /*********************************************/
  1143. void
  1144. SiS_DisplayOn(SiS_Private *SiS_Pr)
  1145. {
  1146. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
  1147. }
  1148. void
  1149. SiS_DisplayOff(SiS_Private *SiS_Pr)
  1150. {
  1151. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
  1152. }
  1153. /*********************************************/
  1154. /* HELPER: Init Port Addresses */
  1155. /*********************************************/
  1156. void
  1157. SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
  1158. {
  1159. SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
  1160. SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
  1161. SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
  1162. SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
  1163. SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
  1164. SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
  1165. SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
  1166. SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
  1167. SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
  1168. SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
  1169. SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
  1170. SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
  1171. SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
  1172. SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */
  1173. SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10; /* 301 TV Encoder registers */
  1174. SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12; /* 301 Macrovision registers */
  1175. SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14; /* 301 VGA2 (and LCD) registers */
  1176. SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */
  1177. SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14; /* DDC Port ( = P3C4, SR11/0A) */
  1178. SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
  1179. SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
  1180. }
  1181. /*********************************************/
  1182. /* HELPER: GetSysFlags */
  1183. /*********************************************/
  1184. static void
  1185. SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1186. {
  1187. unsigned char cr5f, temp1, temp2;
  1188. /* 661 and newer: NEVER write non-zero to SR11[7:4] */
  1189. /* (SR11 is used for DDC and in enable/disablebridge) */
  1190. SiS_Pr->SiS_SensibleSR11 = FALSE;
  1191. SiS_Pr->SiS_MyCR63 = 0x63;
  1192. if(HwInfo->jChipType >= SIS_330) {
  1193. SiS_Pr->SiS_MyCR63 = 0x53;
  1194. if(HwInfo->jChipType >= SIS_661) {
  1195. SiS_Pr->SiS_SensibleSR11 = TRUE;
  1196. }
  1197. }
  1198. /* You should use the macros, not these flags directly */
  1199. SiS_Pr->SiS_SysFlags = 0;
  1200. if(HwInfo->jChipType == SIS_650) {
  1201. cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
  1202. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
  1203. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  1204. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
  1205. temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  1206. if((!temp1) || (temp2)) {
  1207. switch(cr5f) {
  1208. case 0x80:
  1209. case 0x90:
  1210. case 0xc0:
  1211. SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
  1212. case 0xa0:
  1213. case 0xb0:
  1214. case 0xe0:
  1215. SiS_Pr->SiS_SysFlags |= SF_Is651; break;
  1216. }
  1217. } else {
  1218. switch(cr5f) {
  1219. case 0x90:
  1220. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  1221. switch(temp1) {
  1222. case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
  1223. case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
  1224. default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
  1225. }
  1226. break;
  1227. case 0xb0:
  1228. SiS_Pr->SiS_SysFlags |= SF_Is652; break;
  1229. default:
  1230. SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
  1231. }
  1232. }
  1233. }
  1234. if(HwInfo->jChipType == SIS_760) {
  1235. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78);
  1236. if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB;
  1237. }
  1238. }
  1239. /*********************************************/
  1240. /* HELPER: Init PCI & Engines */
  1241. /*********************************************/
  1242. static void
  1243. SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1244. {
  1245. switch(HwInfo->jChipType) {
  1246. case SIS_300:
  1247. case SIS_540:
  1248. case SIS_630:
  1249. case SIS_730:
  1250. /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
  1251. * - RELOCATED VGA IO (0x20)
  1252. * - MMIO ENABLE (0x1)
  1253. */
  1254. SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1255. /* - Enable 2D (0x40)
  1256. * - Enable 3D (0x02)
  1257. * - Enable 3D Vertex command fetch (0x10) ?
  1258. * - Enable 3D command parser (0x08) ?
  1259. */
  1260. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
  1261. break;
  1262. case SIS_315H:
  1263. case SIS_315:
  1264. case SIS_315PRO:
  1265. case SIS_650:
  1266. case SIS_740:
  1267. case SIS_330:
  1268. case SIS_661:
  1269. case SIS_741:
  1270. case SIS_660:
  1271. case SIS_760:
  1272. case SIS_761:
  1273. case SIS_340:
  1274. SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1275. /* - Enable 2D (0x40)
  1276. * - Enable 3D (0x02)
  1277. * - Enable 3D vertex command fetch (0x10)
  1278. * - Enable 3D command parser (0x08)
  1279. * - Enable 3D G/L transformation engine (0x80)
  1280. */
  1281. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
  1282. break;
  1283. case SIS_550:
  1284. SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1285. /* No 3D engine ! */
  1286. /* - Enable 2D (0x40)
  1287. */
  1288. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40);
  1289. }
  1290. }
  1291. /*********************************************/
  1292. /* HELPER: SetLVDSetc */
  1293. /*********************************************/
  1294. static void
  1295. SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1296. {
  1297. USHORT temp;
  1298. SiS_Pr->SiS_IF_DEF_LVDS = 0;
  1299. SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
  1300. SiS_Pr->SiS_IF_DEF_CH70xx = 0;
  1301. SiS_Pr->SiS_IF_DEF_DSTN = 0;
  1302. SiS_Pr->SiS_IF_DEF_FSTN = 0;
  1303. SiS_Pr->SiS_IF_DEF_CONEX = 0;
  1304. SiS_Pr->SiS_ChrontelInit = 0;
  1305. /* Check for SiS30x first */
  1306. temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1307. if((temp == 1) || (temp == 2)) return;
  1308. switch(HwInfo->jChipType) {
  1309. #ifdef SIS300
  1310. case SIS_540:
  1311. case SIS_630:
  1312. case SIS_730:
  1313. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
  1314. temp = (temp & 0x0E) >> 1;
  1315. if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1316. if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
  1317. if((temp == 4) || (temp == 5)) {
  1318. /* Save power status (and error check) - UNUSED */
  1319. SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
  1320. SiS_Pr->SiS_IF_DEF_CH70xx = 1;
  1321. }
  1322. break;
  1323. #endif
  1324. #ifdef SIS315H
  1325. case SIS_550:
  1326. case SIS_650:
  1327. case SIS_740:
  1328. case SIS_330:
  1329. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
  1330. temp = (temp & 0x0E) >> 1;
  1331. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1332. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1333. break;
  1334. case SIS_661:
  1335. case SIS_741:
  1336. case SIS_660:
  1337. case SIS_760:
  1338. case SIS_761:
  1339. case SIS_340:
  1340. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  1341. temp = (temp & 0xe0) >> 5;
  1342. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1343. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1344. if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
  1345. break;
  1346. #endif
  1347. default:
  1348. break;
  1349. }
  1350. }
  1351. /*********************************************/
  1352. /* HELPER: Enable DSTN/FSTN */
  1353. /*********************************************/
  1354. void
  1355. SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable)
  1356. {
  1357. SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
  1358. }
  1359. void
  1360. SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable)
  1361. {
  1362. SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
  1363. }
  1364. /*********************************************/
  1365. /* HELPER: Determine ROM usage */
  1366. /*********************************************/
  1367. BOOLEAN
  1368. SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1369. {
  1370. UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
  1371. USHORT romversoffs, romvmaj = 1, romvmin = 0;
  1372. if(HwInfo->jChipType >= SIS_761) {
  1373. /* I very much assume 761 and 340 will use new layout */
  1374. return TRUE;
  1375. } else if(HwInfo->jChipType >= SIS_661) {
  1376. if((ROMAddr[0x1a] == 'N') &&
  1377. (ROMAddr[0x1b] == 'e') &&
  1378. (ROMAddr[0x1c] == 'w') &&
  1379. (ROMAddr[0x1d] == 'V')) {
  1380. return TRUE;
  1381. }
  1382. romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
  1383. if(romversoffs) {
  1384. if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
  1385. romvmaj = ROMAddr[romversoffs] - '0';
  1386. romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
  1387. }
  1388. }
  1389. if((romvmaj != 0) || (romvmin >= 92)) {
  1390. return TRUE;
  1391. }
  1392. } else if(IS_SIS650740) {
  1393. if((ROMAddr[0x1a] == 'N') &&
  1394. (ROMAddr[0x1b] == 'e') &&
  1395. (ROMAddr[0x1c] == 'w') &&
  1396. (ROMAddr[0x1d] == 'V')) {
  1397. return TRUE;
  1398. }
  1399. }
  1400. return FALSE;
  1401. }
  1402. static void
  1403. SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1404. {
  1405. UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
  1406. USHORT romptr = 0;
  1407. SiS_Pr->SiS_UseROM = FALSE;
  1408. SiS_Pr->SiS_ROMNew = FALSE;
  1409. if((ROMAddr) && (HwInfo->UseROM)) {
  1410. if(HwInfo->jChipType == SIS_300) {
  1411. /* 300: We check if the code starts below 0x220 by
  1412. * checking the jmp instruction at the beginning
  1413. * of the BIOS image.
  1414. */
  1415. if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
  1416. SiS_Pr->SiS_UseROM = TRUE;
  1417. } else if(HwInfo->jChipType < SIS_315H) {
  1418. /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
  1419. * the others do as well
  1420. */
  1421. SiS_Pr->SiS_UseROM = TRUE;
  1422. } else {
  1423. /* 315/330 series stick to the standard(s) */
  1424. SiS_Pr->SiS_UseROM = TRUE;
  1425. if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr, HwInfo))) {
  1426. SiS_Pr->SiS_EMIOffset = 14;
  1427. SiS_Pr->SiS661LCD2TableSize = 36;
  1428. /* Find out about LCD data table entry size */
  1429. if((romptr = SISGETROMW(0x0102))) {
  1430. if(ROMAddr[romptr + (32 * 16)] == 0xff)
  1431. SiS_Pr->SiS661LCD2TableSize = 32;
  1432. else if(ROMAddr[romptr + (34 * 16)] == 0xff)
  1433. SiS_Pr->SiS661LCD2TableSize = 34;
  1434. else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94 */
  1435. SiS_Pr->SiS661LCD2TableSize = 36;
  1436. else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */
  1437. (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00+ */
  1438. SiS_Pr->SiS661LCD2TableSize = 38;
  1439. SiS_Pr->SiS_EMIOffset = 16;
  1440. }
  1441. }
  1442. }
  1443. }
  1444. }
  1445. }
  1446. /*********************************************/
  1447. /* HELPER: SET SEGMENT REGISTERS */
  1448. /*********************************************/
  1449. static void
  1450. SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value)
  1451. {
  1452. USHORT temp;
  1453. value &= 0x00ff;
  1454. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
  1455. temp |= (value >> 4);
  1456. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1457. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
  1458. temp |= (value & 0x0f);
  1459. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1460. }
  1461. static void
  1462. SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value)
  1463. {
  1464. USHORT temp;
  1465. value &= 0x00ff;
  1466. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
  1467. temp |= (value & 0xf0);
  1468. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1469. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
  1470. temp |= (value << 4);
  1471. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1472. }
  1473. static void
  1474. SiS_SetSegmentReg(SiS_Private *SiS_Pr, USHORT value)
  1475. {
  1476. SiS_SetSegRegLower(SiS_Pr, value);
  1477. SiS_SetSegRegUpper(SiS_Pr, value);
  1478. }
  1479. static void
  1480. SiS_ResetSegmentReg(SiS_Private *SiS_Pr)
  1481. {
  1482. SiS_SetSegmentReg(SiS_Pr, 0);
  1483. }
  1484. static void
  1485. SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value)
  1486. {
  1487. USHORT temp = value >> 8;
  1488. temp &= 0x07;
  1489. temp |= (temp << 4);
  1490. SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
  1491. SiS_SetSegmentReg(SiS_Pr, value);
  1492. }
  1493. static void
  1494. SiS_ResetSegmentRegOver(SiS_Private *SiS_Pr)
  1495. {
  1496. SiS_SetSegmentRegOver(SiS_Pr, 0);
  1497. }
  1498. static void
  1499. SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo)
  1500. {
  1501. if((IS_SIS65x) || (HwInfo->jChipType >= SIS_661)) {
  1502. SiS_ResetSegmentReg(SiS_Pr);
  1503. SiS_ResetSegmentRegOver(SiS_Pr);
  1504. }
  1505. }
  1506. /*********************************************/
  1507. /* HELPER: GetVBType */
  1508. /*********************************************/
  1509. static void
  1510. SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1511. {
  1512. USHORT flag=0, rev=0, nolcd=0, p4_0f, p4_25, p4_27;
  1513. SiS_Pr->SiS_VBType = 0;
  1514. if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
  1515. return;
  1516. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1517. if(flag > 3) return;
  1518. rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
  1519. if(flag >= 2) {
  1520. SiS_Pr->SiS_VBType = VB_SIS302B;
  1521. } else if(flag == 1) {
  1522. if(rev >= 0xC0) {
  1523. SiS_Pr->SiS_VBType = VB_SIS301C;
  1524. } else if(rev >= 0xB0) {
  1525. SiS_Pr->SiS_VBType = VB_SIS301B;
  1526. /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
  1527. nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
  1528. if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
  1529. } else {
  1530. SiS_Pr->SiS_VBType = VB_SIS301;
  1531. }
  1532. }
  1533. if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
  1534. if(rev >= 0xE0) {
  1535. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
  1536. if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
  1537. else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
  1538. } else if(rev >= 0xD0) {
  1539. SiS_Pr->SiS_VBType = VB_SIS301LV;
  1540. }
  1541. }
  1542. if(SiS_Pr->SiS_VBType & (VB_301C | VB_301LV | VB_302LV | VB_302ELV)) {
  1543. p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
  1544. p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
  1545. p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
  1546. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
  1547. SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
  1548. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
  1549. if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
  1550. SiS_Pr->SiS_VBType |= VB_UMC;
  1551. }
  1552. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
  1553. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
  1554. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
  1555. }
  1556. }
  1557. /*********************************************/
  1558. /* HELPER: Check RAM size */
  1559. /*********************************************/
  1560. #ifdef LINUX_KERNEL
  1561. static BOOLEAN
  1562. SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  1563. USHORT ModeNo, USHORT ModeIdIndex)
  1564. {
  1565. USHORT AdapterMemSize = HwInfo->ulVideoMemorySize / (1024*1024);
  1566. USHORT memorysize,modeflag;
  1567. if(SiS_Pr->UseCustomMode) {
  1568. modeflag = SiS_Pr->CModeFlag;
  1569. } else {
  1570. if(ModeNo <= 0x13) {
  1571. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  1572. } else {
  1573. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  1574. }
  1575. }
  1576. memorysize = modeflag & MemoryInfoFlag;
  1577. memorysize >>= MemorySizeShift; /* Get required memory size */
  1578. memorysize++;
  1579. if(AdapterMemSize < memorysize) return FALSE;
  1580. return TRUE;
  1581. }
  1582. #endif
  1583. /*********************************************/
  1584. /* HELPER: Get DRAM type */
  1585. /*********************************************/
  1586. #ifdef SIS315H
  1587. static UCHAR
  1588. SiS_Get310DRAMType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1589. {
  1590. UCHAR data, temp;
  1591. if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
  1592. data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
  1593. } else {
  1594. if(HwInfo->jChipType >= SIS_340) {
  1595. /* TODO */
  1596. data = 0;
  1597. } if(HwInfo->jChipType >= SIS_661) {
  1598. data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
  1599. if(SiS_Pr->SiS_ROMNew) {
  1600. data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
  1601. }
  1602. } else if(IS_SIS550650740) {
  1603. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
  1604. } else { /* 315, 330 */
  1605. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
  1606. if(HwInfo->jChipType == SIS_330) {
  1607. if(data > 1) {
  1608. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30;
  1609. switch(temp) {
  1610. case 0x00: data = 1; break;
  1611. case 0x10: data = 3; break;
  1612. case 0x20: data = 3; break;
  1613. case 0x30: data = 2; break;
  1614. }
  1615. } else {
  1616. data = 0;
  1617. }
  1618. }
  1619. }
  1620. }
  1621. return data;
  1622. }
  1623. static USHORT
  1624. SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1625. {
  1626. UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
  1627. USHORT index;
  1628. index = SiS_Get310DRAMType(SiS_Pr, HwInfo);
  1629. if(HwInfo->jChipType >= SIS_661) {
  1630. if(SiS_Pr->SiS_ROMNew) {
  1631. return((USHORT)(SISGETROMW((0x90 + (index * 5) + 3))));
  1632. }
  1633. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1634. } else if(index >= 4) {
  1635. index -= 4;
  1636. return(SiS_Pr->SiS_MCLKData_1[index].CLOCK);
  1637. } else {
  1638. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1639. }
  1640. }
  1641. #endif
  1642. /*********************************************/
  1643. /* HELPER: ClearBuffer */
  1644. /*********************************************/
  1645. #ifdef LINUX_KERNEL
  1646. static void
  1647. SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
  1648. {
  1649. UCHAR SISIOMEMTYPE *VideoMemoryAddress = HwInfo->pjVideoMemoryAddress;
  1650. ULONG AdapterMemorySize = HwInfo->ulVideoMemorySize;
  1651. USHORT SISIOMEMTYPE *pBuffer;
  1652. int i;
  1653. if(SiS_Pr->SiS_ModeType >= ModeEGA) {
  1654. if(ModeNo > 0x13) {
  1655. SiS_SetMemory(VideoMemoryAddress, AdapterMemorySize, 0);
  1656. } else {
  1657. pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress;
  1658. for(i=0; i<0x4000; i++) writew(0x0000, &pBuffer[i]);
  1659. }
  1660. } else {
  1661. if(SiS_Pr->SiS_ModeType < ModeCGA) {
  1662. pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress;
  1663. for(i=0; i<0x4000; i++) writew(0x0720, &pBuffer[i]);
  1664. } else {
  1665. SiS_SetMemory(VideoMemoryAddress, 0x8000, 0);
  1666. }
  1667. }
  1668. }
  1669. #endif
  1670. /*********************************************/
  1671. /* HELPER: SearchModeID */
  1672. /*********************************************/
  1673. BOOLEAN
  1674. SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex)
  1675. {
  1676. UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO;
  1677. if(*ModeNo <= 0x13) {
  1678. if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
  1679. for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
  1680. if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break;
  1681. if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF) return FALSE;
  1682. }
  1683. if(*ModeNo == 0x07) {
  1684. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1685. /* else 350 lines */
  1686. }
  1687. if(*ModeNo <= 0x03) {
  1688. if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
  1689. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1690. /* else 350 lines */
  1691. }
  1692. /* else 200 lines */
  1693. } else {
  1694. for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) {
  1695. if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break;
  1696. if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) return FALSE;
  1697. }
  1698. }
  1699. return TRUE;
  1700. }
  1701. /*********************************************/
  1702. /* HELPER: GetModePtr */
  1703. /*********************************************/
  1704. UCHAR
  1705. SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
  1706. {
  1707. UCHAR index;
  1708. if(ModeNo <= 0x13) {
  1709. index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
  1710. } else {
  1711. if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
  1712. else index = 0x0F;
  1713. }
  1714. return index;
  1715. }
  1716. /*********************************************/
  1717. /* HELPER: LowModeTests */
  1718. /*********************************************/
  1719. static BOOLEAN
  1720. SiS_DoLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
  1721. {
  1722. USHORT temp,temp1,temp2;
  1723. if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
  1724. return(TRUE);
  1725. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
  1726. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
  1727. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
  1728. SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
  1729. temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
  1730. SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
  1731. SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
  1732. if((HwInfo->jChipType >= SIS_315H) ||
  1733. (HwInfo->jChipType == SIS_300)) {
  1734. if(temp2 == 0x55) return(FALSE);
  1735. else return(TRUE);
  1736. } else {
  1737. if(temp2 != 0x55) return(TRUE);
  1738. else {
  1739. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
  1740. return(FALSE);
  1741. }
  1742. }
  1743. }
  1744. static void
  1745. SiS_SetLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo)
  1746. {
  1747. if(SiS_DoLowModeTest(SiS_Pr, ModeNo, HwInfo)) {
  1748. SiS_Pr->SiS_SetFlag |= LowModeTests;
  1749. }
  1750. }
  1751. /*********************************************/
  1752. /* HELPER: ENABLE CRT1 */
  1753. /*********************************************/
  1754. static void
  1755. SiS_SetupCR5x(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  1756. {
  1757. if(IS_SIS650) {
  1758. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  1759. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
  1760. if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
  1761. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
  1762. }
  1763. } else if(IS_SIS661741660760) {
  1764. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
  1765. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
  1766. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
  1767. if(!SiS_Pr->SiS_ROMNew) {
  1768. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
  1769. }
  1770. }
  1771. }
  1772. static void
  1773. SiS_HandleCRT1(SiS_Private *SiS_Pr)
  1774. {
  1775. /* Enable CRT1 gating */
  1776. SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
  1777. #if 0
  1778. if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
  1779. if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
  1780. (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
  1781. SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
  1782. }
  1783. }
  1784. #endif
  1785. }
  1786. /*********************************************/
  1787. /* HELPER: GetColorDepth */
  1788. /*********************************************/
  1789. USHORT
  1790. SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
  1791. {
  1792. USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8};
  1793. SHORT index;
  1794. USHORT modeflag;
  1795. /* Do NOT check UseCustomMode, will skrew up FIFO */
  1796. if(ModeNo == 0xfe) {
  1797. modeflag = SiS_Pr->CModeFlag;
  1798. } else {
  1799. if(ModeNo <= 0x13)
  1800. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  1801. else
  1802. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  1803. }
  1804. index = (modeflag & ModeTypeMask) - ModeEGA;
  1805. if(index < 0) index = 0;
  1806. return(ColorDepth[index]);
  1807. }
  1808. /*********************************************/
  1809. /* HELPER: GetOffset */
  1810. /*********************************************/
  1811. USHORT
  1812. SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
  1813. USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo)
  1814. {
  1815. USHORT xres, temp, colordepth, infoflag;
  1816. if(SiS_Pr->UseCustomMode) {
  1817. infoflag = SiS_Pr->CInfoFlag;
  1818. xres = SiS_Pr->CHDisplay;
  1819. } else {
  1820. infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
  1821. xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes;
  1822. }
  1823. colordepth = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex);
  1824. temp = xres / 16;
  1825. if(infoflag & InterlaceMode) temp <<= 1;
  1826. temp *= colordepth;
  1827. if(xres % 16) {
  1828. colordepth >>= 1;
  1829. temp += colordepth;
  1830. }
  1831. return(temp);
  1832. }
  1833. /*********************************************/
  1834. /* SEQ */
  1835. /*********************************************/
  1836. static void
  1837. SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
  1838. {
  1839. UCHAR SRdata;
  1840. USHORT i;
  1841. SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03); /* Set SR0 */
  1842. SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0];
  1843. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  1844. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  1845. SRdata |= 0x01;
  1846. }
  1847. if(HwInfo->jChipType >= SIS_661) {
  1848. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
  1849. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1850. SRdata |= 0x01; /* 8 dot clock */
  1851. }
  1852. }
  1853. } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
  1854. if(SiS_Pr->SiS_VBType & VB_NoLCD) {
  1855. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1856. SRdata |= 0x01; /* 8 dot clock */
  1857. }
  1858. }
  1859. }
  1860. }
  1861. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  1862. if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
  1863. if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
  1864. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1865. SRdata |= 0x01; /* 8 dot clock */
  1866. }
  1867. }
  1868. }
  1869. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
  1870. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1871. SRdata |= 0x01; /* 8 dot clock */
  1872. }
  1873. }
  1874. }
  1875. SRdata |= 0x20; /* screen off */
  1876. SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
  1877. for(i = 2; i <= 4; i++) {
  1878. SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1];
  1879. SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
  1880. }
  1881. }
  1882. /*********************************************/
  1883. /* MISC */
  1884. /*********************************************/
  1885. static void
  1886. SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
  1887. {
  1888. UCHAR Miscdata;
  1889. Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
  1890. if(HwInfo->jChipType < SIS_661) {
  1891. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  1892. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  1893. Miscdata |= 0x0C;
  1894. }
  1895. }
  1896. }
  1897. SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
  1898. }
  1899. /*********************************************/
  1900. /* CRTC */
  1901. /*********************************************/
  1902. static void
  1903. SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  1904. USHORT StandTableIndex)
  1905. {
  1906. UCHAR CRTCdata;
  1907. USHORT i;
  1908. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* Unlock CRTC */
  1909. for(i = 0; i <= 0x18; i++) {
  1910. CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
  1911. SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); /* Set CRTC(3d4) */
  1912. }
  1913. if(HwInfo->jChipType >= SIS_661) {
  1914. SiS_SetupCR5x(SiS_Pr, HwInfo);
  1915. for(i = 0x13; i <= 0x14; i++) {
  1916. CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
  1917. SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
  1918. }
  1919. } else if( ( (HwInfo->jChipType == SIS_630) ||
  1920. (HwInfo->jChipType == SIS_730) ) &&
  1921. (HwInfo->jChipRevision >= 0x30) ) { /* for 630S0 */
  1922. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1923. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
  1924. SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
  1925. }
  1926. }
  1927. }
  1928. }
  1929. /*********************************************/
  1930. /* ATT */
  1931. /*********************************************/
  1932. static void
  1933. SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex,
  1934. PSIS_HW_INFO HwInfo)
  1935. {
  1936. UCHAR ARdata;
  1937. USHORT i;
  1938. for(i = 0; i <= 0x13; i++) {
  1939. ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
  1940. #if 0
  1941. if((i <= 0x0f) || (i == 0x11)) {
  1942. if(ds:489 & 0x08) {
  1943. continue;
  1944. }
  1945. }
  1946. #endif
  1947. if(i == 0x13) {
  1948. /* Pixel shift. If screen on LCD or TV is shifted left or right,
  1949. * this might be the cause.
  1950. */
  1951. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  1952. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata=0;
  1953. }
  1954. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  1955. if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
  1956. if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
  1957. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
  1958. }
  1959. }
  1960. }
  1961. if(HwInfo->jChipType >= SIS_661) {
  1962. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
  1963. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
  1964. }
  1965. } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
  1966. if(HwInfo->jChipType >= SIS_315H) {
  1967. if(IS_SIS550650740660) {
  1968. /* 315, 330 don't do this */
  1969. if(SiS_Pr->SiS_VBType & VB_SIS301B302B) {
  1970. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
  1971. } else {
  1972. ARdata = 0;
  1973. }
  1974. }
  1975. } else {
  1976. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0;
  1977. }
  1978. }
  1979. }
  1980. SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
  1981. SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
  1982. SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
  1983. }
  1984. SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
  1985. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
  1986. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
  1987. SiS_GetRegByte(SiS_Pr->SiS_P3da);
  1988. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
  1989. SiS_GetRegByte(SiS_Pr->SiS_P3da);
  1990. }
  1991. /*********************************************/
  1992. /* GRC */
  1993. /*********************************************/
  1994. static void
  1995. SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex)
  1996. {
  1997. UCHAR GRdata;
  1998. USHORT i;
  1999. for(i = 0; i <= 0x08; i++) {
  2000. GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
  2001. SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
  2002. }
  2003. if(SiS_Pr->SiS_ModeType > ModeVGA) {
  2004. /* 256 color disable */
  2005. SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
  2006. }
  2007. }
  2008. /*********************************************/
  2009. /* CLEAR EXTENDED REGISTERS */
  2010. /*********************************************/
  2011. static void
  2012. SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
  2013. {
  2014. USHORT i;
  2015. for(i = 0x0A; i <= 0x0E; i++) {
  2016. SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
  2017. }
  2018. if(HwInfo->jChipType >= SIS_315H) {
  2019. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
  2020. if(ModeNo <= 0x13) {
  2021. if(ModeNo == 0x06 || ModeNo >= 0x0e) {
  2022. SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
  2023. }
  2024. }
  2025. }
  2026. }
  2027. /*********************************************/
  2028. /* RESET VCLK */
  2029. /*********************************************/
  2030. static void
  2031. SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  2032. {
  2033. if(HwInfo->jChipType >= SIS_315H) {
  2034. if(HwInfo->jChipType < SIS_661) {
  2035. if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
  2036. }
  2037. } else {
  2038. if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
  2039. (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) {
  2040. return;
  2041. }
  2042. }
  2043. if(HwInfo->jChipType >= SIS_315H) {
  2044. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
  2045. } else {
  2046. SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x20);
  2047. }
  2048. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
  2049. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
  2050. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  2051. if(HwInfo->jChipType >= SIS_315H) {
  2052. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
  2053. } else {
  2054. SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x10);
  2055. }
  2056. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
  2057. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
  2058. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  2059. }
  2060. /*********************************************/
  2061. /* SYNC */
  2062. /*********************************************/
  2063. static void
  2064. SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex)
  2065. {
  2066. USHORT sync;
  2067. if(SiS_Pr->UseCustomMode) {
  2068. sync = SiS_Pr->CInfoFlag >> 8;
  2069. } else {
  2070. sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8;
  2071. }
  2072. sync &= 0xC0;
  2073. sync |= 0x2f;
  2074. SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
  2075. }
  2076. /*********************************************/
  2077. /* CRTC/2 */
  2078. /*********************************************/
  2079. static void
  2080. SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
  2081. USHORT RefreshRateTableIndex,
  2082. PSIS_HW_INFO HwInfo)
  2083. {
  2084. UCHAR index;
  2085. USHORT temp,i,j,modeflag;
  2086. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* unlock cr0-7 */
  2087. if(SiS_Pr->UseCustomMode) {
  2088. modeflag = SiS_Pr->CModeFlag;
  2089. for(i=0,j=0;i<=7;i++,j++) {
  2090. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  2091. }
  2092. for(j=0x10;i<=10;i++,j++) {
  2093. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  2094. }
  2095. for(j=0x15;i<=12;i++,j++) {
  2096. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  2097. }
  2098. for(j=0x0A;i<=15;i++,j++) {
  2099. SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
  2100. }
  2101. temp = SiS_Pr->CCRT1CRTC[16] & 0xE0;
  2102. SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
  2103. temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
  2104. if(modeflag & DoubleScanMode) temp |= 0x80;
  2105. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
  2106. } else {
  2107. if(ModeNo <= 0x13) {
  2108. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  2109. } else {
  2110. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  2111. }
  2112. index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
  2113. for(i=0,j=0;i<=7;i++,j++) {
  2114. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
  2115. }
  2116. for(j=0x10;i<=10;i++,j++) {
  2117. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
  2118. }
  2119. for(j=0x15;i<=12;i++,j++) {
  2120. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
  2121. }
  2122. for(j=0x0A;i<=15;i++,j++) {
  2123. SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]);
  2124. }
  2125. temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
  2126. SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp);
  2127. temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
  2128. if(modeflag & DoubleScanMode) temp |= 0x80;
  2129. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
  2130. }
  2131. if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
  2132. }
  2133. /*********************************************/
  2134. /* OFFSET & PITCH */
  2135. /*********************************************/
  2136. /* (partly overruled by SetPitch() in XF86) */
  2137. /*********************************************/
  2138. static void
  2139. SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
  2140. USHORT RefreshRateTableIndex,
  2141. PSIS_HW_INFO HwInfo)
  2142. {
  2143. USHORT temp, DisplayUnit, infoflag;
  2144. if(SiS_Pr->UseCustomMode) {
  2145. infoflag = SiS_Pr->CInfoFlag;
  2146. } else {
  2147. infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
  2148. }
  2149. DisplayUnit = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
  2150. RefreshRateTableIndex,HwInfo);
  2151. temp = (DisplayUnit >> 8) & 0x0f;
  2152. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
  2153. temp = DisplayUnit & 0xFF;
  2154. SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,temp);
  2155. if(infoflag & InterlaceMode) DisplayUnit >>= 1;
  2156. DisplayUnit <<= 5;
  2157. temp = (DisplayUnit & 0xff00) >> 8;
  2158. if(DisplayUnit & 0xff) temp++;
  2159. temp++;
  2160. SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
  2161. }
  2162. /*********************************************/
  2163. /* VCLK */
  2164. /*********************************************/
  2165. static void
  2166. SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
  2167. PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex)
  2168. {
  2169. USHORT index=0, clka, clkb;
  2170. if(SiS_Pr->UseCustomMode) {
  2171. clka = SiS_Pr->CSR2B;
  2172. clkb = SiS_Pr->CSR2C;
  2173. } else {
  2174. index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
  2175. if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
  2176. clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
  2177. clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
  2178. } else {
  2179. clka = SiS_Pr->SiS_VCLKData[index].SR2B;
  2180. clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
  2181. }
  2182. }
  2183. if(HwInfo->jChipType >= SIS_315H) {
  2184. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
  2185. } else {
  2186. SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x00);
  2187. }
  2188. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,clka);
  2189. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,clkb);
  2190. if(HwInfo->jChipType >= SIS_315H) {
  2191. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
  2192. } else {
  2193. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  2194. }
  2195. }
  2196. /*********************************************/
  2197. /* FIFO */
  2198. /*********************************************/
  2199. #ifdef SIS300
  2200. static USHORT
  2201. SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key)
  2202. {
  2203. const UCHAR ThLowA[] = { 61, 3,52, 5,68, 7,100,11,
  2204. 43, 3,42, 5,54, 7, 78,11,
  2205. 34, 3,37, 5,47, 7, 67,11 };
  2206. const UCHAR ThLowB[] = { 81, 4,72, 6,88, 8,120,12,
  2207. 55, 4,54, 6,66, 8, 90,12,
  2208. 42, 4,45, 6,55, 8, 75,12 };
  2209. const UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 };
  2210. USHORT tempah, tempal, tempcl, tempbx, temp;
  2211. ULONG longtemp;
  2212. tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
  2213. tempah &= 0x62;
  2214. tempah >>= 1;
  2215. tempal = tempah;
  2216. tempah >>= 3;
  2217. tempal |= tempah;
  2218. tempal &= 0x07;
  2219. tempcl = ThTiming[tempal];
  2220. tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
  2221. tempbx >>= 6;
  2222. tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
  2223. tempah >>= 4;
  2224. tempah &= 0x0c;
  2225. tempbx |= tempah;
  2226. tempbx <<= 1;
  2227. if(key == 0) {
  2228. tempal = ThLowA[tempbx + 1];
  2229. tempal *= tempcl;
  2230. tempal += ThLowA[tempbx];
  2231. } else {
  2232. tempal = ThLowB[tempbx + 1];
  2233. tempal *= tempcl;
  2234. tempal += ThLowB[tempbx];
  2235. }
  2236. longtemp = tempal * VCLK * colordepth;
  2237. temp = longtemp % (MCLK * 16);
  2238. longtemp /= (MCLK * 16);
  2239. if(temp) longtemp++;
  2240. return((USHORT)longtemp);
  2241. }
  2242. static USHORT
  2243. SiS_CalcDelay(SiS_Private *SiS_Pr, USHORT VCLK, USHORT colordepth, USHORT MCLK)
  2244. {
  2245. USHORT tempax, tempbx;
  2246. tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
  2247. tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
  2248. if(tempax < 4) tempax = 4;
  2249. tempax -= 4;
  2250. if(tempbx < tempax) tempbx = tempax;
  2251. return(tempbx);
  2252. }
  2253. static void
  2254. SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo,
  2255. USHORT RefreshRateTableIndex)
  2256. {
  2257. USHORT ThresholdLow = 0;
  2258. USHORT index, VCLK, MCLK, colorth=0;
  2259. USHORT tempah, temp;
  2260. if(ModeNo > 0x13) {
  2261. if(SiS_Pr->UseCustomMode) {
  2262. VCLK = SiS_Pr->CSRClock;
  2263. } else {
  2264. index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
  2265. index &= 0x3F;
  2266. VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
  2267. }
  2268. switch (SiS_Pr->SiS_ModeType - ModeEGA) { /* Get half colordepth */
  2269. case 0 : colorth = 1; break;
  2270. case 1 : colorth = 1; break;
  2271. case 2 : colorth = 2; break;
  2272. case 3 : colorth = 2; break;
  2273. case 4 : colorth = 3; break;
  2274. case 5 : colorth = 4; break;
  2275. }
  2276. index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
  2277. index &= 0x07;
  2278. MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
  2279. tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  2280. tempah &= 0xc3;
  2281. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
  2282. do {
  2283. ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK);
  2284. ThresholdLow++;
  2285. if(ThresholdLow < 0x13) break;
  2286. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
  2287. ThresholdLow = 0x13;
  2288. tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
  2289. tempah >>= 6;
  2290. if(!(tempah)) break;
  2291. tempah--;
  2292. tempah <<= 6;
  2293. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
  2294. } while(0);
  2295. } else ThresholdLow = 2;
  2296. /* Write CRT/CPU threshold low, CRT/Engine threshold high */
  2297. temp = (ThresholdLow << 4) | 0x0f;
  2298. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
  2299. temp = (ThresholdLow & 0x10) << 1;
  2300. if(ModeNo > 0x13) temp |= 0x40;
  2301. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
  2302. /* What is this? */
  2303. SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
  2304. /* Write CRT/CPU threshold high */
  2305. temp = ThresholdLow + 3;
  2306. if(temp > 0x0f) temp = 0x0f;
  2307. SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
  2308. }
  2309. static USHORT
  2310. SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR key, PSIS_HW_INFO HwInfo)
  2311. {
  2312. USHORT data,index;
  2313. const UCHAR LatencyFactor[] = {
  2314. 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */
  2315. 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */
  2316. 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */
  2317. 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */
  2318. 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */
  2319. 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */
  2320. 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */
  2321. 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */
  2322. };
  2323. const UCHAR LatencyFactor730[] = {
  2324. 69, 63, 61,
  2325. 86, 79, 77,
  2326. 103, 96, 94,
  2327. 120,113,111,
  2328. 137,130,128, /* --- Table ends with this entry, data below */
  2329. 137,130,128, /* to avoid using illegal values */
  2330. 137,130,128,
  2331. 137,130,128,
  2332. 137,130,128,
  2333. 137,130,128,
  2334. 137,130,128,
  2335. 137,130,128,
  2336. 137,130,128,
  2337. 137,130,128,
  2338. 137,130,128,
  2339. 137,130,128,
  2340. };
  2341. if(HwInfo->jChipType == SIS_730) {
  2342. index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
  2343. data = LatencyFactor730[index];
  2344. } else {
  2345. index = (key & 0xE0) >> 5;
  2346. if(key & 0x10) index +=6;
  2347. if(!(key & 0x01)) index += 24;
  2348. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
  2349. if(data & 0x0080) index += 12;
  2350. data = LatencyFactor[index];
  2351. }
  2352. return(data);
  2353. }
  2354. static void
  2355. SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, USHORT ModeNo,
  2356. PSIS_HW_INFO HwInfo,
  2357. USHORT RefreshRateTableIndex)
  2358. {
  2359. USHORT i,index,data,VCLK,MCLK,colorth=0;
  2360. ULONG B,eax,bl,data2;
  2361. USHORT ThresholdLow=0;
  2362. UCHAR FQBQData[]= {
  2363. 0x01,0x21,0x41,0x61,0x81,
  2364. 0x31,0x51,0x71,0x91,0xb1,
  2365. 0x00,0x20,0x40,0x60,0x80,
  2366. 0x30,0x50,0x70,0x90,0xb0,
  2367. 0xFF
  2368. };
  2369. UCHAR FQBQData730[]= {
  2370. 0x34,0x74,0xb4,
  2371. 0x23,0x63,0xa3,
  2372. 0x12,0x52,0x92,
  2373. 0x01,0x41,0x81,
  2374. 0x00,0x40,0x80,
  2375. 0xff
  2376. };
  2377. i=0;
  2378. if(ModeNo > 0x13) {
  2379. if(SiS_Pr->UseCustomMode) {
  2380. VCLK = SiS_Pr->CSRClock;
  2381. } else {
  2382. index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
  2383. index &= 0x3F;
  2384. VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
  2385. }
  2386. index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
  2387. index &= 0x07;
  2388. MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
  2389. data2 = SiS_Pr->SiS_ModeType - ModeEGA; /* Get half colordepth */
  2390. switch (data2) {
  2391. case 0 : colorth = 1; break;
  2392. case 1 : colorth = 1; break;
  2393. case 2 : colorth = 2; break;
  2394. case 3 : colorth = 2; break;
  2395. case 4 : colorth = 3; break;
  2396. case 5 : colorth = 4; break;
  2397. }
  2398. if(HwInfo->jChipType == SIS_730) {
  2399. do {
  2400. B = SiS_CalcDelay2(SiS_Pr, FQBQData730[i], HwInfo) * VCLK * colorth;
  2401. bl = B / (MCLK * 16);
  2402. if(B == bl * 16 * MCLK) {
  2403. bl = bl + 1;
  2404. } else {
  2405. bl = bl + 2;
  2406. }
  2407. if(bl > 0x13) {
  2408. if(FQBQData730[i+1] == 0xFF) {
  2409. ThresholdLow = 0x13;
  2410. break;
  2411. }
  2412. i++;
  2413. } else {
  2414. ThresholdLow = bl;
  2415. break;
  2416. }
  2417. } while(FQBQData730[i] != 0xFF);
  2418. } else {
  2419. do {
  2420. B = SiS_CalcDelay2(SiS_Pr, FQBQData[i], HwInfo) * VCLK * colorth;
  2421. bl = B / (MCLK * 16);
  2422. if(B == bl * 16 * MCLK) {
  2423. bl = bl + 1;
  2424. } else {
  2425. bl = bl + 2;
  2426. }
  2427. if(bl > 0x13) {
  2428. if(FQBQData[i+1] == 0xFF) {
  2429. ThresholdLow = 0x13;
  2430. break;
  2431. }
  2432. i++;
  2433. } else {
  2434. ThresholdLow = bl;
  2435. break;
  2436. }
  2437. } while(FQBQData[i] != 0xFF);
  2438. }
  2439. }
  2440. else {
  2441. if(HwInfo->jChipType == SIS_730) {
  2442. } else {
  2443. i = 9;
  2444. }
  2445. ThresholdLow = 0x02;
  2446. }
  2447. /* Write foreground and background queue */
  2448. if(HwInfo->jChipType == SIS_730) {
  2449. data2 = FQBQData730[i];
  2450. data2 = (data2 & 0xC0) >> 5;
  2451. data2 <<= 8;
  2452. #ifdef LINUX_KERNEL
  2453. SiS_SetRegLong(0xcf8,0x80000050);
  2454. eax = SiS_GetRegLong(0xcfc);
  2455. eax &= 0xfffff9ff;
  2456. eax |= data2;
  2457. SiS_SetRegLong(0xcfc,eax);
  2458. #else
  2459. /* We use pci functions X offers. We use pcitag 0, because
  2460. * we want to read/write to the host bridge (which is always
  2461. * 00:00.0 on 630, 730 and 540), not the VGA device.
  2462. */
  2463. eax = pciReadLong(0x00000000, 0x50);
  2464. eax &= 0xfffff9ff;
  2465. eax |= data2;
  2466. pciWriteLong(0x00000000, 0x50, eax);
  2467. #endif
  2468. /* Write GUI grant timer (PCI config 0xA3) */
  2469. data2 = FQBQData730[i] << 8;
  2470. data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
  2471. data2 <<= 20;
  2472. #ifdef LINUX_KERNEL
  2473. SiS_SetRegLong(0xcf8,0x800000A0);
  2474. eax = SiS_GetRegLong(0xcfc);
  2475. eax &= 0x00ffffff;
  2476. eax |= data2;
  2477. SiS_SetRegLong(0xcfc,eax);
  2478. #else
  2479. eax = pciReadLong(0x00000000, 0xA0);
  2480. eax &= 0x00ffffff;
  2481. eax |= data2;
  2482. pciWriteLong(0x00000000, 0xA0, eax);
  2483. #endif
  2484. } else {
  2485. data2 = FQBQData[i];
  2486. data2 = (data2 & 0xf0) >> 4;
  2487. data2 <<= 24;
  2488. #ifdef LINUX_KERNEL
  2489. SiS_SetRegLong(0xcf8,0x80000050);
  2490. eax = SiS_GetRegLong(0xcfc);
  2491. eax &= 0xf0ffffff;
  2492. eax |= data2;
  2493. SiS_SetRegLong(0xcfc,eax);
  2494. #else
  2495. eax = pciReadLong(0x00000000, 0x50);
  2496. eax &= 0xf0ffffff;
  2497. eax |= data2;
  2498. pciWriteLong(0x00000000, 0x50, eax);
  2499. #endif
  2500. /* Write GUI grant timer (PCI config 0xA3) */
  2501. data2 = FQBQData[i];
  2502. data2 &= 0x0f;
  2503. data2 <<= 24;
  2504. #ifdef LINUX_KERNEL
  2505. SiS_SetRegLong(0xcf8,0x800000A0);
  2506. eax = SiS_GetRegLong(0xcfc);
  2507. eax &= 0xf0ffffff;
  2508. eax |= data2;
  2509. SiS_SetRegLong(0xcfc,eax);
  2510. #else
  2511. eax = pciReadLong(0x00000000, 0xA0);
  2512. eax &= 0xf0ffffff;
  2513. eax |= data2;
  2514. pciWriteLong(0x00000000, 0xA0, eax);
  2515. #endif
  2516. }
  2517. /* Write CRT/CPU threshold low, CRT/Engine threshold high */
  2518. data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
  2519. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
  2520. data = (ThresholdLow & 0x10) << 1;
  2521. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
  2522. /* What is this? */
  2523. SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
  2524. /* Write CRT/CPU threshold high (gap = 3) */
  2525. data = ThresholdLow + 3;
  2526. if(data > 0x0f) data = 0x0f;
  2527. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
  2528. }
  2529. #endif
  2530. #ifdef SIS315H
  2531. static void
  2532. SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
  2533. PSIS_HW_INFO HwInfo)
  2534. {
  2535. USHORT modeflag;
  2536. /* disable auto-threshold */
  2537. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
  2538. if(SiS_Pr->UseCustomMode) {
  2539. modeflag = SiS_Pr->CModeFlag;
  2540. } else {
  2541. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  2542. }
  2543. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
  2544. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
  2545. if(ModeNo > 0x13) {
  2546. if(HwInfo->jChipType >= SIS_661) {
  2547. if(!(modeflag & HalfDCLK)) {
  2548. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
  2549. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
  2550. }
  2551. } else {
  2552. if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
  2553. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
  2554. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
  2555. }
  2556. }
  2557. }
  2558. }
  2559. #endif
  2560. /*********************************************/
  2561. /* MODE REGISTERS */
  2562. /*********************************************/
  2563. static void
  2564. SiS_SetVCLKState(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  2565. USHORT ModeNo, USHORT RefreshRateTableIndex,
  2566. USHORT ModeIdIndex)
  2567. {
  2568. USHORT data=0, VCLK=0, index=0;
  2569. if(ModeNo > 0x13) {
  2570. if(SiS_Pr->UseCustomMode) {
  2571. VCLK = SiS_Pr->CSRClock;
  2572. } else {
  2573. index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
  2574. RefreshRateTableIndex,HwInfo);
  2575. VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
  2576. }
  2577. }
  2578. if(HwInfo->jChipType < SIS_315H) {
  2579. if(VCLK > 150) data |= 0x80;
  2580. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
  2581. data = 0x00;
  2582. if(VCLK >= 150) data |= 0x08;
  2583. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
  2584. } else {
  2585. if(VCLK >= 166) data |= 0x0c;
  2586. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
  2587. if(VCLK >= 166) {
  2588. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
  2589. }
  2590. }
  2591. /* DAC speed */
  2592. if(HwInfo->jChipType >= SIS_661) {
  2593. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
  2594. } else {
  2595. data = 0x03;
  2596. if((VCLK >= 135) && (VCLK < 160)) data = 0x02;
  2597. else if((VCLK >= 160) && (VCLK < 260)) data = 0x01;
  2598. else if(VCLK >= 260) data = 0x00;
  2599. if(HwInfo->jChipType == SIS_540) {
  2600. if((VCLK == 203) || (VCLK < 234)) data = 0x02;
  2601. }
  2602. if(HwInfo->jChipType < SIS_315H) {
  2603. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
  2604. } else {
  2605. if(HwInfo->jChipType > SIS_315PRO) {
  2606. if(ModeNo > 0x13) data &= 0xfc;
  2607. }
  2608. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
  2609. }
  2610. }
  2611. }
  2612. static void
  2613. SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  2614. USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex)
  2615. {
  2616. USHORT data,infoflag=0,modeflag;
  2617. USHORT resindex,xres;
  2618. #ifdef SIS315H
  2619. USHORT data2,data3;
  2620. ULONG longdata;
  2621. UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
  2622. #endif
  2623. if(SiS_Pr->UseCustomMode) {
  2624. modeflag = SiS_Pr->CModeFlag;
  2625. infoflag = SiS_Pr->CInfoFlag;
  2626. xres = SiS_Pr->CHDisplay;
  2627. } else {
  2628. resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex);
  2629. if(ModeNo > 0x13) {
  2630. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  2631. infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
  2632. xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
  2633. } else {
  2634. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  2635. xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
  2636. }
  2637. }
  2638. /* Disable DPMS */
  2639. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
  2640. data = 0;
  2641. if(ModeNo > 0x13) {
  2642. if(SiS_Pr->SiS_ModeType > ModeEGA) {
  2643. data |= 0x02;
  2644. data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
  2645. }
  2646. if(infoflag & InterlaceMode) data |= 0x20;
  2647. }
  2648. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
  2649. if(HwInfo->jChipType != SIS_300) {
  2650. data = 0;
  2651. if(infoflag & InterlaceMode) {
  2652. if(xres <= 800) data = 0x0020;
  2653. else if(xres <= 1024) data = 0x0035;
  2654. else data = 0x0048;
  2655. }
  2656. SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,(data & 0xFF));
  2657. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,(data >> 8));
  2658. }
  2659. if(modeflag & HalfDCLK) {
  2660. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
  2661. }
  2662. data = 0;
  2663. if(modeflag & LineCompareOff) data = 0x08;
  2664. if(HwInfo->jChipType == SIS_300) {
  2665. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
  2666. } else {
  2667. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
  2668. if(SiS_Pr->SiS_ModeType == ModeEGA) {
  2669. if(ModeNo > 0x13) {
  2670. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40);
  2671. }
  2672. }
  2673. }
  2674. if(HwInfo->jChipType >= SIS_661) {
  2675. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
  2676. }
  2677. #ifdef SIS315H
  2678. if(HwInfo->jChipType == SIS_315PRO) {
  2679. data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
  2680. data = SiS_Pr->SiS_SR15[2][data];
  2681. if(SiS_Pr->SiS_ModeType == ModeText) {
  2682. data &= 0xc7;
  2683. } else {
  2684. data2 = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
  2685. RefreshRateTableIndex,HwInfo);
  2686. data2 >>= 1;
  2687. if(infoflag & InterlaceMode) data2 >>= 1;
  2688. data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
  2689. if(!data3) data3++;
  2690. data2 /= data3;
  2691. if(data2 >= 0x50) {
  2692. data &= 0x0f;
  2693. data |= 0x50;
  2694. }
  2695. }
  2696. SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
  2697. } else if( (HwInfo->jChipType == SIS_330) ||
  2698. ((HwInfo->jChipType == SIS_760) && (SiS_Pr->SiS_SysFlags & SF_760LFB))) {
  2699. data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
  2700. if(HwInfo->jChipType == SIS_330) {
  2701. data = SiS_Pr->SiS_SR15[2][data];
  2702. } else {
  2703. if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
  2704. else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
  2705. else data = 0xba;
  2706. }
  2707. if(SiS_Pr->SiS_ModeType <= ModeEGA) {
  2708. data &= 0xc7;
  2709. } else {
  2710. if(SiS_Pr->UseCustomMode) {
  2711. data2 = SiS_Pr->CSRClock;
  2712. } else {
  2713. data2 = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
  2714. RefreshRateTableIndex,HwInfo);
  2715. data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
  2716. }
  2717. data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
  2718. if(data3) data2 *= data3;
  2719. longdata = SiS_GetMCLK(SiS_Pr, HwInfo) * 1024;
  2720. data2 = longdata / data2;
  2721. if(HwInfo->jChipType == SIS_330) {
  2722. if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
  2723. if (data2 >= 0x19c) data = 0xba;
  2724. else if(data2 >= 0x140) data = 0x7a;
  2725. else if(data2 >= 0x101) data = 0x3a;
  2726. else if(data2 >= 0xf5) data = 0x32;
  2727. else if(data2 >= 0xe2) data = 0x2a;
  2728. else if(data2 >= 0xc4) data = 0x22;
  2729. else if(data2 >= 0xac) data = 0x1a;
  2730. else if(data2 >= 0x9e) data = 0x12;
  2731. else if(data2 >= 0x8e) data = 0x0a;
  2732. else data = 0x02;
  2733. } else {
  2734. if(data2 >= 0x127) data = 0xba;
  2735. else data = 0x7a;
  2736. }
  2737. } else { /* 760+LFB */
  2738. if (data2 >= 0x190) data = 0xba;
  2739. else if(data2 >= 0xff) data = 0x7a;
  2740. else if(data2 >= 0xd3) data = 0x3a;
  2741. else if(data2 >= 0xa9) data = 0x1a;
  2742. else if(data2 >= 0x93) data = 0x0a;
  2743. else data = 0x02;
  2744. }
  2745. }
  2746. SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
  2747. } else if(HwInfo->jChipType == SIS_340) {
  2748. /* TODO */
  2749. }
  2750. #endif
  2751. data = 0x60;
  2752. if(SiS_Pr->SiS_ModeType != ModeText) {
  2753. data ^= 0x60;
  2754. if(SiS_Pr->SiS_ModeType != ModeEGA) {
  2755. data ^= 0xA0;
  2756. }
  2757. }
  2758. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
  2759. SiS_SetVCLKState(SiS_Pr, HwInfo, ModeNo, RefreshRateTableIndex, ModeIdIndex);
  2760. #ifdef SIS315H
  2761. if(HwInfo->jChipType >= SIS_315H) {
  2762. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
  2763. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
  2764. } else {
  2765. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
  2766. }
  2767. }
  2768. #endif
  2769. }
  2770. /*********************************************/
  2771. /* LOAD DAC */
  2772. /*********************************************/
  2773. #if 0
  2774. static void
  2775. SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port)
  2776. {
  2777. int i;
  2778. OutPortByte(port, 0);
  2779. port++;
  2780. for (i=0; i < (256 * 3); i++) {
  2781. OutPortByte(port, 0);
  2782. }
  2783. }
  2784. #endif
  2785. static void
  2786. SiS_WriteDAC(SiS_Private *SiS_Pr, SISIOADDRESS DACData, USHORT shiftflag,
  2787. USHORT dl, USHORT ah, USHORT al, USHORT dh)
  2788. {
  2789. USHORT temp,bh,bl;
  2790. bh = ah;
  2791. bl = al;
  2792. if(dl != 0) {
  2793. temp = bh;
  2794. bh = dh;
  2795. dh = temp;
  2796. if(dl == 1) {
  2797. temp = bl;
  2798. bl = dh;
  2799. dh = temp;
  2800. } else {
  2801. temp = bl;
  2802. bl = bh;
  2803. bh = temp;
  2804. }
  2805. }
  2806. if(shiftflag) {
  2807. dh <<= 2;
  2808. bh <<= 2;
  2809. bl <<= 2;
  2810. }
  2811. SiS_SetRegByte(DACData,(USHORT)dh);
  2812. SiS_SetRegByte(DACData,(USHORT)bh);
  2813. SiS_SetRegByte(DACData,(USHORT)bl);
  2814. }
  2815. void
  2816. SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  2817. USHORT ModeNo, USHORT ModeIdIndex)
  2818. {
  2819. USHORT data,data2;
  2820. USHORT time,i,j,k,m,n,o;
  2821. USHORT si,di,bx,dl,al,ah,dh;
  2822. USHORT shiftflag;
  2823. SISIOADDRESS DACAddr, DACData;
  2824. const USHORT *table = NULL;
  2825. if(ModeNo <= 0x13) {
  2826. data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  2827. } else {
  2828. if(SiS_Pr->UseCustomMode) {
  2829. data = SiS_Pr->CModeFlag;
  2830. } else {
  2831. data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  2832. }
  2833. }
  2834. data &= DACInfoFlag;
  2835. time = 64;
  2836. if(data == 0x00) table = SiS_MDA_DAC;
  2837. if(data == 0x08) table = SiS_CGA_DAC;
  2838. if(data == 0x10) table = SiS_EGA_DAC;
  2839. if(data == 0x18) {
  2840. time = 256;
  2841. table = SiS_VGA_DAC;
  2842. }
  2843. if(time == 256) j = 16;
  2844. else j = time;
  2845. if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
  2846. (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
  2847. (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
  2848. (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
  2849. DACAddr = SiS_Pr->SiS_P3c8;
  2850. DACData = SiS_Pr->SiS_P3c9;
  2851. shiftflag = 0;
  2852. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  2853. } else {
  2854. shiftflag = 1;
  2855. DACAddr = SiS_Pr->SiS_Part5Port;
  2856. DACData = SiS_Pr->SiS_Part5Port + 1;
  2857. }
  2858. SiS_SetRegByte(DACAddr,0x00);
  2859. for(i=0; i<j; i++) {
  2860. data = table[i];
  2861. for(k=0; k<3; k++) {
  2862. data2 = 0;
  2863. if(data & 0x01) data2 = 0x2A;
  2864. if(data & 0x02) data2 += 0x15;
  2865. if(shiftflag) data2 <<= 2;
  2866. SiS_SetRegByte(DACData, data2);
  2867. data >>= 2;
  2868. }
  2869. }
  2870. if(time == 256) {
  2871. for(i = 16; i < 32; i++) {
  2872. data = table[i];
  2873. if(shiftflag) data <<= 2;
  2874. for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
  2875. }
  2876. si = 32;
  2877. for(m = 0; m < 9; m++) {
  2878. di = si;
  2879. bx = si + 4;
  2880. dl = 0;
  2881. for(n = 0; n < 3; n++) {
  2882. for(o = 0; o < 5; o++) {
  2883. dh = table[si];
  2884. ah = table[di];
  2885. al = table[bx];
  2886. si++;
  2887. SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
  2888. }
  2889. si -= 2;
  2890. for(o = 0; o < 3; o++) {
  2891. dh = table[bx];
  2892. ah = table[di];
  2893. al = table[si];
  2894. si--;
  2895. SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
  2896. }
  2897. dl++;
  2898. } /* for n < 3 */
  2899. si += 5;
  2900. } /* for m < 9 */
  2901. }
  2902. }
  2903. /*********************************************/
  2904. /* SET CRT1 REGISTER GROUP */
  2905. /*********************************************/
  2906. static void
  2907. SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  2908. USHORT ModeNo, USHORT ModeIdIndex)
  2909. {
  2910. USHORT StandTableIndex,RefreshRateTableIndex;
  2911. SiS_Pr->SiS_CRT1Mode = ModeNo;
  2912. StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
  2913. if(SiS_Pr->SiS_SetFlag & LowModeTests) {
  2914. if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
  2915. SiS_DisableBridge(SiS_Pr, HwInfo);
  2916. }
  2917. }
  2918. SiS_ResetSegmentRegisters(SiS_Pr, HwInfo);
  2919. SiS_SetSeqRegs(SiS_Pr, StandTableIndex, HwInfo);
  2920. SiS_SetMiscRegs(SiS_Pr, StandTableIndex, HwInfo);
  2921. SiS_SetCRTCRegs(SiS_Pr, HwInfo, StandTableIndex);
  2922. SiS_SetATTRegs(SiS_Pr, StandTableIndex, HwInfo);
  2923. SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
  2924. SiS_ClearExt1Regs(SiS_Pr, HwInfo, ModeNo);
  2925. SiS_ResetCRT1VCLK(SiS_Pr, HwInfo);
  2926. SiS_Pr->SiS_SelectCRT2Rate = 0;
  2927. SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
  2928. #ifdef LINUX_XF86
  2929. xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
  2930. SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
  2931. #endif
  2932. if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
  2933. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  2934. SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
  2935. }
  2936. }
  2937. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  2938. SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
  2939. }
  2940. RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  2941. if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
  2942. SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
  2943. }
  2944. if(RefreshRateTableIndex != 0xFFFF) {
  2945. SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
  2946. SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
  2947. SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo);
  2948. SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex);
  2949. }
  2950. #ifdef SIS300
  2951. if(HwInfo->jChipType == SIS_300) {
  2952. SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo,HwInfo,RefreshRateTableIndex);
  2953. } else if((HwInfo->jChipType == SIS_630) ||
  2954. (HwInfo->jChipType == SIS_730) ||
  2955. (HwInfo->jChipType == SIS_540)) {
  2956. SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, HwInfo, RefreshRateTableIndex);
  2957. }
  2958. #endif
  2959. #ifdef SIS315H
  2960. if(HwInfo->jChipType >= SIS_315H) {
  2961. SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  2962. }
  2963. #endif
  2964. SiS_SetCRT1ModeRegs(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2965. SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
  2966. #ifdef LINUX_KERNEL
  2967. if(SiS_Pr->SiS_flag_clearbuffer) {
  2968. SiS_ClearBuffer(SiS_Pr,HwInfo,ModeNo);
  2969. }
  2970. #endif
  2971. if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
  2972. SiS_WaitRetrace1(SiS_Pr);
  2973. SiS_DisplayOn(SiS_Pr);
  2974. }
  2975. }
  2976. /*********************************************/
  2977. /* HELPER: VIDEO BRIDGE PROG CLK */
  2978. /*********************************************/
  2979. static void
  2980. SiS_ResetVB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  2981. {
  2982. UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
  2983. USHORT temp;
  2984. /* VB programming clock */
  2985. if(SiS_Pr->SiS_UseROM) {
  2986. if(HwInfo->jChipType < SIS_330) {
  2987. temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
  2988. if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
  2989. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
  2990. } else if(HwInfo->jChipType >= SIS_661) {
  2991. temp = ROMAddr[0x7e] | 0x40;
  2992. if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
  2993. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
  2994. }
  2995. }
  2996. }
  2997. /*********************************************/
  2998. /* HELPER: SET VIDEO REGISTERS */
  2999. /*********************************************/
  3000. static void
  3001. SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  3002. {
  3003. if((IS_SIS651) || (IS_SISM650)) {
  3004. SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
  3005. SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
  3006. SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
  3007. SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
  3008. SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
  3009. }
  3010. /* !!! This does not support modes < 0x13 !!! */
  3011. }
  3012. /*********************************************/
  3013. /* XFree86: SET SCREEN PITCH */
  3014. /*********************************************/
  3015. #ifdef LINUX_XF86
  3016. static void
  3017. SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
  3018. {
  3019. SISPtr pSiS = SISPTR(pScrn);
  3020. UShort HDisplay = pSiS->scrnPitch >> 3;
  3021. SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
  3022. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay>>8));
  3023. }
  3024. static void
  3025. SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
  3026. {
  3027. SISPtr pSiS = SISPTR(pScrn);
  3028. UShort HDisplay = pSiS->scrnPitch2 >> 3;
  3029. /* Unlock CRT2 */
  3030. if(pSiS->VGAEngine == SIS_315_VGA)
  3031. SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
  3032. else
  3033. SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
  3034. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
  3035. SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
  3036. }
  3037. static void
  3038. SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
  3039. {
  3040. SISPtr pSiS = SISPTR(pScrn);
  3041. BOOLEAN isslavemode = FALSE;
  3042. if( (pSiS->VBFlags & VB_VIDEOBRIDGE) &&
  3043. ( ((pSiS->VGAEngine == SIS_300_VGA) &&
  3044. (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
  3045. ((pSiS->VGAEngine == SIS_315_VGA) &&
  3046. (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
  3047. isslavemode = TRUE;
  3048. }
  3049. /* We need to set pitch for CRT1 if bridge is in slave mode, too */
  3050. if((pSiS->VBFlags & DISPTYPE_DISP1) || (isslavemode)) {
  3051. SiS_SetPitchCRT1(SiS_Pr, pScrn);
  3052. }
  3053. /* We must not set the pitch for CRT2 if bridge is in slave mode */
  3054. if((pSiS->VBFlags & DISPTYPE_DISP2) && (!isslavemode)) {
  3055. SiS_SetPitchCRT2(SiS_Pr, pScrn);
  3056. }
  3057. }
  3058. #endif
  3059. /*********************************************/
  3060. /* SiSSetMode() */
  3061. /*********************************************/
  3062. #ifdef LINUX_XF86
  3063. /* We need pScrn for setting the pitch correctly */
  3064. BOOLEAN
  3065. SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch)
  3066. #else
  3067. BOOLEAN
  3068. SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
  3069. #endif
  3070. {
  3071. USHORT ModeIdIndex;
  3072. SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
  3073. unsigned char backupreg=0;
  3074. #ifdef LINUX_KERNEL
  3075. USHORT KeepLockReg;
  3076. ULONG temp;
  3077. SiS_Pr->UseCustomMode = FALSE;
  3078. SiS_Pr->CRT1UsesCustomMode = FALSE;
  3079. #endif
  3080. if(SiS_Pr->UseCustomMode) {
  3081. ModeNo = 0xfe;
  3082. }
  3083. SiSInitPtr(SiS_Pr, HwInfo);
  3084. SiSRegInit(SiS_Pr, BaseAddr);
  3085. SiS_GetSysFlags(SiS_Pr, HwInfo);
  3086. #if defined(LINUX_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
  3087. if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
  3088. else
  3089. #endif
  3090. SiS_Pr->SiS_VGAINFO = 0x11;
  3091. SiSInitPCIetc(SiS_Pr, HwInfo);
  3092. SiSSetLVDSetc(SiS_Pr, HwInfo);
  3093. SiSDetermineROMUsage(SiS_Pr, HwInfo);
  3094. SiS_Pr->SiS_flag_clearbuffer = 0;
  3095. if(!SiS_Pr->UseCustomMode) {
  3096. #ifdef LINUX_KERNEL
  3097. if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
  3098. #endif
  3099. ModeNo &= 0x7f;
  3100. }
  3101. #ifdef LINUX_KERNEL
  3102. KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
  3103. #endif
  3104. SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
  3105. SiS_UnLockCRT2(SiS_Pr, HwInfo);
  3106. if(!SiS_Pr->UseCustomMode) {
  3107. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
  3108. } else {
  3109. ModeIdIndex = 0;
  3110. }
  3111. SiS_GetVBType(SiS_Pr, HwInfo);
  3112. /* Init/restore some VB registers */
  3113. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3114. if(HwInfo->jChipType >= SIS_315H) {
  3115. SiS_ResetVB(SiS_Pr, HwInfo);
  3116. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
  3117. SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
  3118. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  3119. } else {
  3120. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  3121. }
  3122. }
  3123. /* Get VB information (connectors, connected devices) */
  3124. SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, (SiS_Pr->UseCustomMode) ? 0 : 1);
  3125. SiS_SetYPbPr(SiS_Pr, HwInfo);
  3126. SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3127. SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3128. SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
  3129. #ifdef LINUX_KERNEL
  3130. /* 3. Check memory size (Kernel framebuffer driver only) */
  3131. temp = SiS_CheckMemorySize(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
  3132. if(!temp) return(0);
  3133. #endif
  3134. if(HwInfo->jChipType >= SIS_315H) {
  3135. SiS_SetupCR5x(SiS_Pr, HwInfo);
  3136. }
  3137. if(SiS_Pr->UseCustomMode) {
  3138. SiS_Pr->CRT1UsesCustomMode = TRUE;
  3139. SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
  3140. SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
  3141. } else {
  3142. SiS_Pr->CRT1UsesCustomMode = FALSE;
  3143. }
  3144. /* Set mode on CRT1 */
  3145. if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
  3146. (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
  3147. SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
  3148. }
  3149. /* Set mode on CRT2 */
  3150. if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
  3151. if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
  3152. (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
  3153. (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
  3154. (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
  3155. SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
  3156. }
  3157. }
  3158. SiS_HandleCRT1(SiS_Pr);
  3159. SiS_StrangeStuff(SiS_Pr, HwInfo);
  3160. SiS_DisplayOn(SiS_Pr);
  3161. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  3162. if(HwInfo->jChipType >= SIS_315H) {
  3163. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  3164. if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
  3165. SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
  3166. }
  3167. }
  3168. }
  3169. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3170. if(HwInfo->jChipType >= SIS_315H) {
  3171. if(!SiS_Pr->SiS_ROMNew) {
  3172. if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
  3173. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
  3174. } else {
  3175. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
  3176. }
  3177. }
  3178. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
  3179. if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
  3180. if((ModeNo == 0x03) || (ModeNo == 0x10)) {
  3181. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
  3182. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
  3183. }
  3184. }
  3185. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
  3186. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
  3187. }
  3188. } else if((HwInfo->jChipType == SIS_630) ||
  3189. (HwInfo->jChipType == SIS_730)) {
  3190. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
  3191. }
  3192. }
  3193. #ifdef LINUX_XF86
  3194. if(pScrn) {
  3195. /* SetPitch: Adapt to virtual size & position */
  3196. if((ModeNo > 0x13) && (dosetpitch)) {
  3197. SiS_SetPitch(SiS_Pr, pScrn);
  3198. }
  3199. /* Backup/Set ModeNo in BIOS scratch area */
  3200. SiS_GetSetModeID(pScrn, ModeNo);
  3201. }
  3202. #endif
  3203. #ifdef LINUX_KERNEL /* We never lock registers in XF86 */
  3204. if(KeepLockReg == 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
  3205. else SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
  3206. #endif
  3207. return TRUE;
  3208. }
  3209. /*********************************************/
  3210. /* XFree86: SiSBIOSSetMode() */
  3211. /* for non-Dual-Head mode */
  3212. /*********************************************/
  3213. #ifdef LINUX_XF86
  3214. BOOLEAN
  3215. SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
  3216. DisplayModePtr mode, BOOLEAN IsCustom)
  3217. {
  3218. SISPtr pSiS = SISPTR(pScrn);
  3219. UShort ModeNo = 0;
  3220. SiS_Pr->UseCustomMode = FALSE;
  3221. if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
  3222. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n",
  3223. SiS_Pr->CHDisplay,
  3224. (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
  3225. (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
  3226. SiS_Pr->CVDisplay)));
  3227. } else {
  3228. /* Don't need vbflags here; checks done earlier */
  3229. ModeNo = SiS_GetModeNumber(pScrn, mode, 0);
  3230. if(!ModeNo) return FALSE;
  3231. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
  3232. }
  3233. return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE));
  3234. }
  3235. /*********************************************/
  3236. /* XFree86: SiSBIOSSetModeCRT2() */
  3237. /* for Dual-Head modes */
  3238. /*********************************************/
  3239. BOOLEAN
  3240. SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
  3241. DisplayModePtr mode, BOOLEAN IsCustom)
  3242. {
  3243. USHORT ModeIdIndex;
  3244. SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
  3245. UShort ModeNo = 0;
  3246. unsigned char backupreg=0;
  3247. SISPtr pSiS = SISPTR(pScrn);
  3248. #ifdef SISDUALHEAD
  3249. SISEntPtr pSiSEnt = pSiS->entityPrivate;
  3250. #endif
  3251. SiS_Pr->UseCustomMode = FALSE;
  3252. /* Remember: Custom modes for CRT2 are ONLY supported
  3253. * -) on the 30x/B/C, and
  3254. * -) if CRT2 is LCD or VGA, or CRT1 is LCDA
  3255. */
  3256. if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
  3257. ModeNo = 0xfe;
  3258. } else {
  3259. ModeNo = SiS_GetModeNumber(pScrn, mode, 0);
  3260. if(!ModeNo) return FALSE;
  3261. }
  3262. SiSRegInit(SiS_Pr, BaseAddr);
  3263. SiSInitPtr(SiS_Pr, HwInfo);
  3264. SiS_GetSysFlags(SiS_Pr, HwInfo);
  3265. #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
  3266. SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
  3267. #else
  3268. SiS_Pr->SiS_VGAINFO = 0x11;
  3269. #endif
  3270. SiSInitPCIetc(SiS_Pr, HwInfo);
  3271. SiSSetLVDSetc(SiS_Pr, HwInfo);
  3272. SiSDetermineROMUsage(SiS_Pr, HwInfo);
  3273. /* Save mode info so we can set it from within SetMode for CRT1 */
  3274. #ifdef SISDUALHEAD
  3275. if(pSiS->DualHeadMode) {
  3276. pSiSEnt->CRT2ModeNo = ModeNo;
  3277. pSiSEnt->CRT2DMode = mode;
  3278. pSiSEnt->CRT2IsCustom = IsCustom;
  3279. pSiSEnt->CRT2CR30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
  3280. pSiSEnt->CRT2CR31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
  3281. pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  3282. pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  3283. #if 0
  3284. /* We can't set CRT2 mode before CRT1 mode is set */
  3285. if(pSiSEnt->CRT1ModeNo == -1) {
  3286. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3287. "Setting CRT2 mode delayed until after setting CRT1 mode\n");
  3288. return TRUE;
  3289. }
  3290. #endif
  3291. pSiSEnt->CRT2ModeSet = TRUE;
  3292. }
  3293. #endif
  3294. /* We don't clear the buffer in X */
  3295. SiS_Pr->SiS_flag_clearbuffer=0;
  3296. if(SiS_Pr->UseCustomMode) {
  3297. USHORT temptemp = SiS_Pr->CVDisplay;
  3298. if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
  3299. else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
  3300. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3301. "Setting custom mode %dx%d on CRT2\n",
  3302. SiS_Pr->CHDisplay, temptemp);
  3303. } else {
  3304. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3305. "Setting standard mode 0x%x on CRT2\n", ModeNo);
  3306. }
  3307. SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
  3308. SiS_UnLockCRT2(SiS_Pr, HwInfo);
  3309. if(!SiS_Pr->UseCustomMode) {
  3310. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
  3311. } else {
  3312. ModeIdIndex = 0;
  3313. }
  3314. SiS_GetVBType(SiS_Pr, HwInfo);
  3315. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3316. if(HwInfo->jChipType >= SIS_315H) {
  3317. SiS_ResetVB(SiS_Pr, HwInfo);
  3318. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
  3319. SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
  3320. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  3321. } else {
  3322. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  3323. }
  3324. }
  3325. /* Get VB information (connectors, connected devices) */
  3326. if(!SiS_Pr->UseCustomMode) {
  3327. SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 1);
  3328. } else {
  3329. /* If this is a custom mode, we don't check the modeflag for CRT2Mode */
  3330. SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
  3331. }
  3332. SiS_SetYPbPr(SiS_Pr, HwInfo);
  3333. SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3334. SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3335. SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
  3336. /* Set mode on CRT2 */
  3337. if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
  3338. (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
  3339. (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
  3340. (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
  3341. SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
  3342. }
  3343. SiS_StrangeStuff(SiS_Pr, HwInfo);
  3344. SiS_DisplayOn(SiS_Pr);
  3345. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  3346. if(HwInfo->jChipType >= SIS_315H) {
  3347. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  3348. if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) {
  3349. SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
  3350. }
  3351. }
  3352. }
  3353. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3354. if(HwInfo->jChipType >= SIS_315H) {
  3355. if(!SiS_Pr->SiS_ROMNew) {
  3356. if(SiS_IsVAMode(SiS_Pr,HwInfo)) {
  3357. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
  3358. } else {
  3359. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
  3360. }
  3361. }
  3362. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
  3363. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
  3364. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
  3365. }
  3366. } else if((HwInfo->jChipType == SIS_630) ||
  3367. (HwInfo->jChipType == SIS_730)) {
  3368. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
  3369. }
  3370. }
  3371. /* SetPitch: Adapt to virtual size & position */
  3372. SiS_SetPitchCRT2(SiS_Pr, pScrn);
  3373. return TRUE;
  3374. }
  3375. /*********************************************/
  3376. /* XFree86: SiSBIOSSetModeCRT1() */
  3377. /* for Dual-Head modes */
  3378. /*********************************************/
  3379. BOOLEAN
  3380. SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
  3381. DisplayModePtr mode, BOOLEAN IsCustom)
  3382. {
  3383. SISPtr pSiS = SISPTR(pScrn);
  3384. SISIOADDRESS BaseAddr = HwInfo->ulIOAddress;
  3385. USHORT ModeIdIndex, ModeNo=0;
  3386. UCHAR backupreg=0;
  3387. #ifdef SISDUALHEAD
  3388. SISEntPtr pSiSEnt = pSiS->entityPrivate;
  3389. UCHAR backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0;
  3390. BOOLEAN backupcustom;
  3391. #endif
  3392. SiS_Pr->UseCustomMode = FALSE;
  3393. if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
  3394. USHORT temptemp = SiS_Pr->CVDisplay;
  3395. if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
  3396. else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
  3397. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3398. "Setting custom mode %dx%d on CRT1\n",
  3399. SiS_Pr->CHDisplay, temptemp);
  3400. ModeNo = 0xfe;
  3401. } else {
  3402. ModeNo = SiS_GetModeNumber(pScrn, mode, 0);
  3403. if(!ModeNo) return FALSE;
  3404. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3405. "Setting standard mode 0x%x on CRT1\n", ModeNo);
  3406. }
  3407. SiSInitPtr(SiS_Pr, HwInfo);
  3408. SiSRegInit(SiS_Pr, BaseAddr);
  3409. SiS_GetSysFlags(SiS_Pr, HwInfo);
  3410. #if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__))
  3411. SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
  3412. #else
  3413. SiS_Pr->SiS_VGAINFO = 0x11;
  3414. #endif
  3415. SiSInitPCIetc(SiS_Pr, HwInfo);
  3416. SiSSetLVDSetc(SiS_Pr, HwInfo);
  3417. SiSDetermineROMUsage(SiS_Pr, HwInfo);
  3418. /* We don't clear the buffer in X */
  3419. SiS_Pr->SiS_flag_clearbuffer = 0;
  3420. SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
  3421. SiS_UnLockCRT2(SiS_Pr, HwInfo);
  3422. if(!SiS_Pr->UseCustomMode) {
  3423. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
  3424. } else {
  3425. ModeIdIndex = 0;
  3426. }
  3427. /* Determine VBType */
  3428. SiS_GetVBType(SiS_Pr, HwInfo);
  3429. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3430. if(HwInfo->jChipType >= SIS_315H) {
  3431. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  3432. } else {
  3433. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  3434. }
  3435. }
  3436. /* Get VB information (connectors, connected devices) */
  3437. /* (We don't care if the current mode is a CRT2 mode) */
  3438. SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0);
  3439. SiS_SetYPbPr(SiS_Pr, HwInfo);
  3440. SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3441. SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo);
  3442. SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo);
  3443. if(HwInfo->jChipType >= SIS_315H) {
  3444. SiS_SetupCR5x(SiS_Pr, HwInfo);
  3445. }
  3446. /* Set mode on CRT1 */
  3447. SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex);
  3448. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  3449. SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo);
  3450. }
  3451. /* SetPitch: Adapt to virtual size & position */
  3452. SiS_SetPitchCRT1(SiS_Pr, pScrn);
  3453. #ifdef SISDUALHEAD
  3454. if(pSiS->DualHeadMode) {
  3455. pSiSEnt->CRT1ModeNo = ModeNo;
  3456. pSiSEnt->CRT1DMode = mode;
  3457. }
  3458. #endif
  3459. if(SiS_Pr->UseCustomMode) {
  3460. SiS_Pr->CRT1UsesCustomMode = TRUE;
  3461. SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
  3462. SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
  3463. } else {
  3464. SiS_Pr->CRT1UsesCustomMode = FALSE;
  3465. }
  3466. /* Reset CRT2 if changing mode on CRT1 */
  3467. #ifdef SISDUALHEAD
  3468. if(pSiS->DualHeadMode) {
  3469. if(pSiSEnt->CRT2ModeNo != -1) {
  3470. xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
  3471. "(Re-)Setting mode for CRT2\n");
  3472. backupcustom = SiS_Pr->UseCustomMode;
  3473. backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
  3474. backupcr31 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
  3475. backupcr35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  3476. backupcr38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  3477. if(SiS_Pr->SiS_VBType & VB_SISVB) {
  3478. /* Backup LUT-enable */
  3479. if(pSiSEnt->CRT2ModeSet) {
  3480. backupp40d = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0d) & 0x08;
  3481. }
  3482. }
  3483. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  3484. SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,pSiSEnt->CRT2CR30);
  3485. SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,pSiSEnt->CRT2CR31);
  3486. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
  3487. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
  3488. }
  3489. SiSBIOSSetModeCRT2(SiS_Pr, HwInfo, pSiSEnt->pScrn_1,
  3490. pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom);
  3491. SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
  3492. SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
  3493. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
  3494. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
  3495. if(SiS_Pr->SiS_VBType & VB_SISVB) {
  3496. SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0d, ~0x08, backupp40d);
  3497. }
  3498. SiS_Pr->UseCustomMode = backupcustom;
  3499. }
  3500. }
  3501. #endif
  3502. /* Warning: From here, the custom mode entries in SiS_Pr are
  3503. * possibly overwritten
  3504. */
  3505. SiS_HandleCRT1(SiS_Pr);
  3506. SiS_StrangeStuff(SiS_Pr, HwInfo);
  3507. SiS_DisplayOn(SiS_Pr);
  3508. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  3509. if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
  3510. if(HwInfo->jChipType >= SIS_315H) {
  3511. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
  3512. } else if((HwInfo->jChipType == SIS_630) ||
  3513. (HwInfo->jChipType == SIS_730)) {
  3514. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
  3515. }
  3516. }
  3517. /* Backup/Set ModeNo in BIOS scratch area */
  3518. SiS_GetSetModeID(pScrn,ModeNo);
  3519. return TRUE;
  3520. }
  3521. #endif /* Linux_XF86 */
  3522. #ifdef LINUX_XF86
  3523. BOOLEAN
  3524. SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
  3525. {
  3526. const USHORT PanelTypeTable300[16] = {
  3527. 0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
  3528. 0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
  3529. };
  3530. const USHORT PanelTypeTable31030x[16] = {
  3531. 0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
  3532. 0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
  3533. };
  3534. const USHORT PanelTypeTable310LVDS[16] = {
  3535. 0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
  3536. 0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
  3537. };
  3538. USHORT tempax,tempbx,temp;
  3539. if(HwInfo->jChipType < SIS_315H) {
  3540. tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
  3541. tempbx = tempax & 0x0F;
  3542. if(!(tempax & 0x10)){
  3543. if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
  3544. tempbx = 0;
  3545. temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x38);
  3546. if(temp & 0x40) tempbx |= 0x08;
  3547. if(temp & 0x20) tempbx |= 0x02;
  3548. if(temp & 0x01) tempbx |= 0x01;
  3549. temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x39);
  3550. if(temp & 0x80) tempbx |= 0x04;
  3551. } else {
  3552. return 0;
  3553. }
  3554. }
  3555. tempbx = PanelTypeTable300[tempbx];
  3556. tempbx |= LCDSync;
  3557. temp = tempbx & 0x00FF;
  3558. SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
  3559. temp = (tempbx & 0xFF00) >> 8;
  3560. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
  3561. } else {
  3562. if(HwInfo->jChipType >= SIS_661) return 0;
  3563. tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1a);
  3564. tempax &= 0x1e;
  3565. tempax >>= 1;
  3566. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  3567. if(tempax == 0) {
  3568. /* TODO: Include HUGE detection routine
  3569. (Probably not worth bothering)
  3570. */
  3571. return 0;
  3572. }
  3573. temp = tempax & 0xff;
  3574. tempax--;
  3575. tempbx = PanelTypeTable310LVDS[tempax];
  3576. } else {
  3577. tempbx = PanelTypeTable31030x[tempax];
  3578. temp = tempbx & 0xff;
  3579. }
  3580. SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
  3581. tempbx = (tempbx & 0xff00) >> 8;
  3582. temp = tempbx & 0xc1;
  3583. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
  3584. if(SiS_Pr->SiS_VBType & VB_SISVB) {
  3585. temp = tempbx & 0x04;
  3586. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
  3587. }
  3588. }
  3589. return 1;
  3590. }
  3591. #endif
  3592. #ifndef GETBITSTR
  3593. #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
  3594. #define GENMASK(mask) BITMASK(1?mask,0?mask)
  3595. #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask))
  3596. #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
  3597. #endif
  3598. static void
  3599. SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth)
  3600. {
  3601. SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
  3602. SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
  3603. SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
  3604. SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
  3605. SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
  3606. SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
  3607. (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
  3608. SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
  3609. SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
  3610. | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
  3611. | ((SiS_Pr->CVSyncStart & 0x100) >> 6)
  3612. | (((SiS_Pr->CVBlankStart - 1) & 0x100) >> 5)
  3613. | 0x10
  3614. | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
  3615. | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
  3616. | ((SiS_Pr->CVSyncStart & 0x200) >> 2);
  3617. SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
  3618. if(depth != 8) {
  3619. if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
  3620. else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
  3621. }
  3622. #if 0
  3623. if (mode->VScan >= 32)
  3624. regp->CRTC[9] |= 0x1F;
  3625. else if (mode->VScan > 1)
  3626. regp->CRTC[9] |= mode->VScan - 1;
  3627. #endif
  3628. SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart ) & 0xFF; /* CR10 */
  3629. SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd ) & 0x0F) | 0x80; /* CR11 */
  3630. SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
  3631. SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
  3632. SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
  3633. SiS_Pr->CCRT1CRTC[13] = /* SRA */
  3634. GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
  3635. GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
  3636. GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
  3637. GETBITSTR((SiS_Pr->CVSyncStart ), 10:10, 3:3) |
  3638. GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
  3639. GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
  3640. SiS_Pr->CCRT1CRTC[14] = /* SRB */
  3641. GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
  3642. GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
  3643. GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
  3644. GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
  3645. SiS_Pr->CCRT1CRTC[15] = /* SRC */
  3646. GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
  3647. GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
  3648. }
  3649. void
  3650. SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
  3651. {
  3652. USHORT modeflag, tempax, tempbx, VGAHDE = SiS_Pr->SiS_VGAHDE;
  3653. int i,j;
  3654. /* 1:1 data: use data set by setcrt1crtc() */
  3655. if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
  3656. if(ModeNo <= 0x13) {
  3657. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  3658. } else if(SiS_Pr->UseCustomMode) {
  3659. modeflag = SiS_Pr->CModeFlag;
  3660. } else {
  3661. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  3662. }
  3663. if(modeflag & HalfDCLK) VGAHDE >>= 1;
  3664. SiS_Pr->CHDisplay = VGAHDE;
  3665. SiS_Pr->CHBlankStart = VGAHDE;
  3666. SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
  3667. SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
  3668. tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
  3669. tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
  3670. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3671. tempax = SiS_Pr->PanelXRes;
  3672. }
  3673. tempbx += tempax;
  3674. if(modeflag & HalfDCLK) tempbx -= VGAHDE;
  3675. SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
  3676. tempax = VGAHDE;
  3677. tempbx = SiS_Pr->CHTotal;
  3678. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3679. tempbx = SiS_Pr->PanelXRes;
  3680. if(modeflag & HalfDCLK) tempbx >>= 1;
  3681. tempax += ((tempbx - tempax) >> 1);
  3682. }
  3683. tempax += SiS_Pr->PanelHRS;
  3684. SiS_Pr->CHSyncStart = tempax;
  3685. tempax += SiS_Pr->PanelHRE;
  3686. SiS_Pr->CHSyncEnd = tempax;
  3687. tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
  3688. tempax = SiS_Pr->SiS_VGAVDE;
  3689. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3690. tempax = SiS_Pr->PanelYRes;
  3691. }
  3692. SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
  3693. tempax = SiS_Pr->SiS_VGAVDE;
  3694. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3695. tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
  3696. }
  3697. tempax += SiS_Pr->PanelVRS;
  3698. SiS_Pr->CVSyncStart = tempax;
  3699. tempax += SiS_Pr->PanelVRE;
  3700. SiS_Pr->CVSyncEnd = tempax;
  3701. SiS_CalcCRRegisters(SiS_Pr, 8);
  3702. SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
  3703. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
  3704. for(i=0,j=0;i<=7;i++,j++) {
  3705. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3706. }
  3707. for(j=0x10;i<=10;i++,j++) {
  3708. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3709. }
  3710. for(j=0x15;i<=12;i++,j++) {
  3711. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3712. }
  3713. for(j=0x0A;i<=15;i++,j++) {
  3714. SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
  3715. }
  3716. tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
  3717. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
  3718. tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
  3719. if(modeflag & DoubleScanMode) tempax |= 0x80;
  3720. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
  3721. #ifdef TWDEBUG
  3722. xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
  3723. SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
  3724. SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
  3725. SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
  3726. xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
  3727. SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
  3728. SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
  3729. SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
  3730. SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
  3731. xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
  3732. SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
  3733. SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
  3734. SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
  3735. SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
  3736. xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
  3737. #endif
  3738. }
  3739. #ifdef LINUX_XF86
  3740. void
  3741. SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c)
  3742. {
  3743. int out_n, out_dn, out_div, out_sbit, out_scale;
  3744. unsigned int vclk[5];
  3745. #define Midx 0
  3746. #define Nidx 1
  3747. #define VLDidx 2
  3748. #define Pidx 3
  3749. #define PSNidx 4
  3750. if(SiS_compute_vclk(clock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale)) {
  3751. (*p2b) = (out_div == 2) ? 0x80 : 0x00;
  3752. (*p2b) |= ((out_n - 1) & 0x7f);
  3753. (*p2c) = (out_dn - 1) & 0x1f;
  3754. (*p2c) |= (((out_scale - 1) & 3) << 5);
  3755. (*p2c) |= ((out_sbit & 0x01) << 7);
  3756. #ifdef TWDEBUG
  3757. xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
  3758. clock, out_n, out_dn, out_div, out_sbit, out_scale);
  3759. #endif
  3760. } else {
  3761. SiSCalcClock(pScrn, clock, 2, vclk);
  3762. (*p2b) = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
  3763. (*p2b) |= (vclk[Midx] - 1) & 0x7f;
  3764. (*p2c) = (vclk[Nidx] - 1) & 0x1f;
  3765. if(vclk[Pidx] <= 4) {
  3766. /* postscale 1,2,3,4 */
  3767. (*p2c) |= ((vclk[Pidx] - 1) & 3) << 5;
  3768. } else {
  3769. /* postscale 6,8 */
  3770. (*p2c) |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
  3771. (*p2c) |= 0x80;
  3772. }
  3773. #ifdef TWDEBUG
  3774. xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sc %d\n",
  3775. clock, vclk[Midx], vclk[Nidx], vclk[VLDidx], vclk[Pidx]);
  3776. #endif
  3777. }
  3778. }
  3779. #endif
  3780. /* ================ XFREE86/X.ORG ================= */
  3781. /* Helper functions */
  3782. #ifdef LINUX_XF86
  3783. USHORT
  3784. SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
  3785. {
  3786. SISPtr pSiS = SISPTR(pScrn);
  3787. int depth = pSiS->CurrentLayout.bitsPerPixel;
  3788. pSiS->SiS_Pr->CModeFlag = 0;
  3789. pSiS->SiS_Pr->CDClock = mode->Clock;
  3790. pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
  3791. pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
  3792. pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
  3793. pSiS->SiS_Pr->CHTotal = mode->HTotal;
  3794. pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
  3795. pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
  3796. pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
  3797. pSiS->SiS_Pr->CVTotal = mode->VTotal;
  3798. pSiS->SiS_Pr->CFlags = mode->Flags;
  3799. if(pSiS->SiS_Pr->CFlags & V_INTERLACE) {
  3800. pSiS->SiS_Pr->CVDisplay >>= 1;
  3801. pSiS->SiS_Pr->CVSyncStart >>= 1;
  3802. pSiS->SiS_Pr->CVSyncEnd >>= 1;
  3803. pSiS->SiS_Pr->CVTotal >>= 1;
  3804. }
  3805. if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) {
  3806. /* pSiS->SiS_Pr->CDClock <<= 1; */
  3807. pSiS->SiS_Pr->CVDisplay <<= 1;
  3808. pSiS->SiS_Pr->CVSyncStart <<= 1;
  3809. pSiS->SiS_Pr->CVSyncEnd <<= 1;
  3810. pSiS->SiS_Pr->CVTotal <<= 1;
  3811. }
  3812. pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
  3813. pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
  3814. pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
  3815. pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
  3816. SiS_MakeClockRegs(pScrn, pSiS->SiS_Pr->CDClock, &pSiS->SiS_Pr->CSR2B, &pSiS->SiS_Pr->CSR2C);
  3817. pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1;
  3818. SiS_CalcCRRegisters(pSiS->SiS_Pr, depth);
  3819. switch(depth) {
  3820. case 8: pSiS->SiS_Pr->CModeFlag |= 0x223b; break;
  3821. case 16: pSiS->SiS_Pr->CModeFlag |= 0x227d; break;
  3822. case 32: pSiS->SiS_Pr->CModeFlag |= 0x22ff; break;
  3823. default: return 0;
  3824. }
  3825. if(pSiS->SiS_Pr->CFlags & V_DBLSCAN)
  3826. pSiS->SiS_Pr->CModeFlag |= DoubleScanMode;
  3827. if((pSiS->SiS_Pr->CVDisplay >= 1024) ||
  3828. (pSiS->SiS_Pr->CVTotal >= 1024) ||
  3829. (pSiS->SiS_Pr->CHDisplay >= 1024))
  3830. pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
  3831. if(pSiS->SiS_Pr->CFlags & V_CLKDIV2)
  3832. pSiS->SiS_Pr->CModeFlag |= HalfDCLK;
  3833. pSiS->SiS_Pr->CInfoFlag = 0x0007;
  3834. if(pSiS->SiS_Pr->CFlags & V_NHSYNC)
  3835. pSiS->SiS_Pr->CInfoFlag |= 0x4000;
  3836. if(pSiS->SiS_Pr->CFlags & V_NVSYNC)
  3837. pSiS->SiS_Pr->CInfoFlag |= 0x8000;
  3838. if(pSiS->SiS_Pr->CFlags & V_INTERLACE)
  3839. pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
  3840. pSiS->SiS_Pr->UseCustomMode = TRUE;
  3841. #ifdef TWDEBUG
  3842. xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n",
  3843. pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay);
  3844. xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n",
  3845. pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
  3846. xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
  3847. pSiS->SiS_Pr->CCRT1CRTC[0], pSiS->SiS_Pr->CCRT1CRTC[1],
  3848. pSiS->SiS_Pr->CCRT1CRTC[2], pSiS->SiS_Pr->CCRT1CRTC[3],
  3849. pSiS->SiS_Pr->CCRT1CRTC[4], pSiS->SiS_Pr->CCRT1CRTC[5],
  3850. pSiS->SiS_Pr->CCRT1CRTC[6], pSiS->SiS_Pr->CCRT1CRTC[7]);
  3851. xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
  3852. pSiS->SiS_Pr->CCRT1CRTC[8], pSiS->SiS_Pr->CCRT1CRTC[9],
  3853. pSiS->SiS_Pr->CCRT1CRTC[10], pSiS->SiS_Pr->CCRT1CRTC[11],
  3854. pSiS->SiS_Pr->CCRT1CRTC[12], pSiS->SiS_Pr->CCRT1CRTC[13],
  3855. pSiS->SiS_Pr->CCRT1CRTC[14], pSiS->SiS_Pr->CCRT1CRTC[15]);
  3856. xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
  3857. xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
  3858. pSiS->SiS_Pr->CSR2B, pSiS->SiS_Pr->CSR2C, pSiS->SiS_Pr->CSRClock);
  3859. #endif
  3860. return 1;
  3861. }
  3862. int
  3863. SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct, int *maxx, int *maxy, int *prefx, int *prefy)
  3864. {
  3865. int i, j;
  3866. BOOLEAN done = FALSE;
  3867. i = 0;
  3868. while((!done) && (SiS_PlasmaTable[i].vendor) && panelvendor) {
  3869. if(SiS_PlasmaTable[i].vendor == panelvendor) {
  3870. for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
  3871. if(SiS_PlasmaTable[i].product[j] == panelproduct) {
  3872. if(SiS_PlasmaTable[i].maxx && SiS_PlasmaTable[i].maxy) {
  3873. (*maxx) = (int)SiS_PlasmaTable[i].maxx;
  3874. (*maxy) = (int)SiS_PlasmaTable[i].maxy;
  3875. (*prefx) = (int)SiS_PlasmaTable[i].prefx;
  3876. (*prefy) = (int)SiS_PlasmaTable[i].prefy;
  3877. done = TRUE;
  3878. xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
  3879. "Identified %s, correcting max X res %d, max Y res %d\n",
  3880. SiS_PlasmaTable[i].plasmaname,
  3881. SiS_PlasmaTable[i].maxx, SiS_PlasmaTable[i].maxy);
  3882. break;
  3883. }
  3884. }
  3885. }
  3886. }
  3887. i++;
  3888. }
  3889. return (done) ? 1 : 0;
  3890. }
  3891. /* Build a list of supported modes:
  3892. * Built-in modes for which we have all data are M_T_DEFAULT,
  3893. * modes derived from DDC or database data are M_T_BUILTIN
  3894. */
  3895. DisplayModePtr
  3896. SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi)
  3897. {
  3898. SISPtr pSiS = SISPTR(pScrn);
  3899. unsigned short VRE, VBE, VRS, VBS, VDE, VT;
  3900. unsigned short HRE, HBE, HRS, HBS, HDE, HT;
  3901. unsigned char sr_data, cr_data, cr_data2, cr_data3;
  3902. unsigned char sr2b, sr2c;
  3903. float num, denum, postscalar, divider;
  3904. int A, B, C, D, E, F, temp, i, j, k, l, index, vclkindex;
  3905. DisplayModePtr new = NULL, current = NULL, first = NULL;
  3906. BOOLEAN done = FALSE;
  3907. #if 0
  3908. DisplayModePtr backup = NULL;
  3909. #endif
  3910. pSiS->backupmodelist = NULL;
  3911. pSiS->AddedPlasmaModes = FALSE;
  3912. /* Initialize our pointers */
  3913. if(pSiS->VGAEngine == SIS_300_VGA) {
  3914. #ifdef SIS300
  3915. InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
  3916. #else
  3917. return NULL;
  3918. #endif
  3919. } else if(pSiS->VGAEngine == SIS_315_VGA) {
  3920. #ifdef SIS315H
  3921. InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
  3922. #else
  3923. return NULL;
  3924. #endif
  3925. } else return NULL;
  3926. i = 0;
  3927. while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
  3928. index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
  3929. /* 0x5a (320x240) is a pure FTSN mode, not DSTN! */
  3930. if((!pSiS->FSTN) &&
  3931. (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID == 0x5a)) {
  3932. i++;
  3933. continue;
  3934. }
  3935. if((pSiS->FSTN) &&
  3936. (pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
  3937. (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240) &&
  3938. (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID != 0x5a)) {
  3939. i++;
  3940. continue;
  3941. }
  3942. if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
  3943. memset(new, 0, sizeof(DisplayModeRec));
  3944. if(!(new->name = xalloc(10))) {
  3945. xfree(new);
  3946. return first;
  3947. }
  3948. if(!first) first = new;
  3949. if(current) {
  3950. current->next = new;
  3951. new->prev = current;
  3952. }
  3953. current = new;
  3954. sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
  3955. pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
  3956. current->status = MODE_OK;
  3957. current->type = M_T_DEFAULT;
  3958. vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
  3959. if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
  3960. sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
  3961. sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
  3962. divider = (sr2b & 0x80) ? 2.0 : 1.0;
  3963. postscalar = (sr2c & 0x80) ?
  3964. ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
  3965. num = (sr2b & 0x7f) + 1.0;
  3966. denum = (sr2c & 0x1f) + 1.0;
  3967. #ifdef TWDEBUG
  3968. xf86DrvMsg(0, X_INFO, "------------\n");
  3969. xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
  3970. sr2b, sr2c, divider, postscalar, num, denum);
  3971. #endif
  3972. current->Clock = (int)(14318 * (divider / postscalar) * (num / denum));
  3973. sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14];
  3974. /* inSISIDXREG(SISSR, 0x0b, sr_data); */
  3975. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
  3976. /* inSISIDXREG(SISCR, 0x00, cr_data); */
  3977. /* Horizontal total */
  3978. HT = (cr_data & 0xff) |
  3979. ((unsigned short) (sr_data & 0x03) << 8);
  3980. A = HT + 5;
  3981. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
  3982. /* inSISIDXREG(SISCR, 0x01, cr_data); */
  3983. /* Horizontal display enable end */
  3984. HDE = (cr_data & 0xff) |
  3985. ((unsigned short) (sr_data & 0x0C) << 6);
  3986. E = HDE + 1; /* 0x80 0x64 */
  3987. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
  3988. /* inSISIDXREG(SISCR, 0x04, cr_data); */
  3989. /* Horizontal retrace (=sync) start */
  3990. HRS = (cr_data & 0xff) |
  3991. ((unsigned short) (sr_data & 0xC0) << 2);
  3992. F = HRS - E - 3; /* 0x06 0x06 */
  3993. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
  3994. /* inSISIDXREG(SISCR, 0x02, cr_data); */
  3995. /* Horizontal blank start */
  3996. HBS = (cr_data & 0xff) |
  3997. ((unsigned short) (sr_data & 0x30) << 4);
  3998. sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
  3999. /* inSISIDXREG(SISSR, 0x0c, sr_data); */
  4000. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
  4001. /* inSISIDXREG(SISCR, 0x03, cr_data); */
  4002. cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
  4003. /* inSISIDXREG(SISCR, 0x05, cr_data2); */
  4004. /* Horizontal blank end */
  4005. HBE = (cr_data & 0x1f) |
  4006. ((unsigned short) (cr_data2 & 0x80) >> 2) |
  4007. ((unsigned short) (sr_data & 0x03) << 6);
  4008. /* Horizontal retrace (=sync) end */
  4009. HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
  4010. temp = HBE - ((E - 1) & 255);
  4011. B = (temp > 0) ? temp : (temp + 256);
  4012. temp = HRE - ((E + F + 3) & 63);
  4013. C = (temp > 0) ? temp : (temp + 64); /* 0x0b 0x0b */
  4014. D = B - F - C;
  4015. if((pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
  4016. ((pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 200) ||
  4017. (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240))) {
  4018. /* Terrible hack, but correct CRTC data for
  4019. * these modes only produces a black screen...
  4020. * (HRE is 0, leading into a too large C and
  4021. * a negative D. The CRT controller does not
  4022. * seem to like correcting HRE to 50
  4023. */
  4024. current->HDisplay = 320;
  4025. current->HSyncStart = 328;
  4026. current->HSyncEnd = 376;
  4027. current->HTotal = 400;
  4028. } else {
  4029. current->HDisplay = (E * 8);
  4030. current->HSyncStart = (E * 8) + (F * 8);
  4031. current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
  4032. current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
  4033. }
  4034. #ifdef TWDEBUG
  4035. xf86DrvMsg(0, X_INFO,
  4036. "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
  4037. A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
  4038. #endif
  4039. sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13];
  4040. /* inSISIDXREG(SISSR, 0x0A, sr_data); */
  4041. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6];
  4042. /* inSISIDXREG(SISCR, 0x06, cr_data); */
  4043. cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7];
  4044. /* inSISIDXREG(SISCR, 0x07, cr_data2); */
  4045. /* Vertical total */
  4046. VT = (cr_data & 0xFF) |
  4047. ((unsigned short) (cr_data2 & 0x01) << 8) |
  4048. ((unsigned short)(cr_data2 & 0x20) << 4) |
  4049. ((unsigned short) (sr_data & 0x01) << 10);
  4050. A = VT + 2;
  4051. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10];
  4052. /* inSISIDXREG(SISCR, 0x12, cr_data); */
  4053. /* Vertical display enable end */
  4054. VDE = (cr_data & 0xff) |
  4055. ((unsigned short) (cr_data2 & 0x02) << 7) |
  4056. ((unsigned short) (cr_data2 & 0x40) << 3) |
  4057. ((unsigned short) (sr_data & 0x02) << 9);
  4058. E = VDE + 1;
  4059. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8];
  4060. /* inSISIDXREG(SISCR, 0x10, cr_data); */
  4061. /* Vertical retrace (=sync) start */
  4062. VRS = (cr_data & 0xff) |
  4063. ((unsigned short) (cr_data2 & 0x04) << 6) |
  4064. ((unsigned short) (cr_data2 & 0x80) << 2) |
  4065. ((unsigned short) (sr_data & 0x08) << 7);
  4066. F = VRS + 1 - E;
  4067. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11];
  4068. /* inSISIDXREG(SISCR, 0x15, cr_data); */
  4069. cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
  4070. /* inSISIDXREG(SISCR, 0x09, cr_data3); */
  4071. /* Vertical blank start */
  4072. VBS = (cr_data & 0xff) |
  4073. ((unsigned short) (cr_data2 & 0x08) << 5) |
  4074. ((unsigned short) (cr_data3 & 0x20) << 4) |
  4075. ((unsigned short) (sr_data & 0x04) << 8);
  4076. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12];
  4077. /* inSISIDXREG(SISCR, 0x16, cr_data); */
  4078. /* Vertical blank end */
  4079. VBE = (cr_data & 0xff) |
  4080. ((unsigned short) (sr_data & 0x10) << 4);
  4081. temp = VBE - ((E - 1) & 511);
  4082. B = (temp > 0) ? temp : (temp + 512);
  4083. cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
  4084. /* inSISIDXREG(SISCR, 0x11, cr_data); */
  4085. /* Vertical retrace (=sync) end */
  4086. VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
  4087. temp = VRE - ((E + F - 1) & 31);
  4088. C = (temp > 0) ? temp : (temp + 32);
  4089. D = B - F - C;
  4090. current->VDisplay = VDE + 1;
  4091. current->VSyncStart = VRS + 1;
  4092. current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
  4093. if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
  4094. current->VTotal = E + D + C + F;
  4095. #if 0
  4096. current->VDisplay = E;
  4097. current->VSyncStart = E + D;
  4098. current->VSyncEnd = E + D + C;
  4099. current->VTotal = E + D + C + F;
  4100. #endif
  4101. #ifdef TWDEBUG
  4102. xf86DrvMsg(0, X_INFO,
  4103. "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
  4104. A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
  4105. #endif
  4106. if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
  4107. current->Flags |= V_NHSYNC;
  4108. else
  4109. current->Flags |= V_PHSYNC;
  4110. if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
  4111. current->Flags |= V_NVSYNC;
  4112. else
  4113. current->Flags |= V_PVSYNC;
  4114. if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
  4115. current->Flags |= V_INTERLACE;
  4116. j = 0;
  4117. while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
  4118. if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
  4119. pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
  4120. if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
  4121. current->Flags |= V_DBLSCAN;
  4122. }
  4123. break;
  4124. }
  4125. j++;
  4126. }
  4127. if(current->Flags & V_INTERLACE) {
  4128. current->VDisplay <<= 1;
  4129. current->VSyncStart <<= 1;
  4130. current->VSyncEnd <<= 1;
  4131. current->VTotal <<= 1;
  4132. current->VTotal |= 1;
  4133. }
  4134. if(current->Flags & V_DBLSCAN) {
  4135. current->Clock >>= 1;
  4136. current->VDisplay >>= 1;
  4137. current->VSyncStart >>= 1;
  4138. current->VSyncEnd >>= 1;
  4139. current->VTotal >>= 1;
  4140. }
  4141. #ifdef TWDEBUG
  4142. xf86DrvMsg(pScrn->scrnIndex, X_INFO,
  4143. "Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
  4144. current->name, (float)current->Clock / 1000,
  4145. current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
  4146. current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
  4147. #else
  4148. (void)VBS; (void)HBS; (void)A;
  4149. #endif
  4150. i++;
  4151. }
  4152. /* Add non-standard LCD modes for panel's detailed timings */
  4153. if(!includelcdmodes) return first;
  4154. if(pSiS->SiS_Pr->CP_Vendor) {
  4155. xf86DrvMsg(0, X_INFO, "Checking database for vendor %x, product %x\n",
  4156. pSiS->SiS_Pr->CP_Vendor, pSiS->SiS_Pr->CP_Product);
  4157. }
  4158. i = 0;
  4159. while((!done) && (SiS_PlasmaTable[i].vendor) && (pSiS->SiS_Pr->CP_Vendor)) {
  4160. if(SiS_PlasmaTable[i].vendor == pSiS->SiS_Pr->CP_Vendor) {
  4161. for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
  4162. if(SiS_PlasmaTable[i].product[j] == pSiS->SiS_Pr->CP_Product) {
  4163. xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
  4164. "Identified %s panel, adding specific modes\n",
  4165. SiS_PlasmaTable[i].plasmaname);
  4166. for(k=0; k<SiS_PlasmaTable[i].modenum; k++) {
  4167. if(isfordvi) {
  4168. if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x80)) continue;
  4169. } else {
  4170. if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x40)) continue;
  4171. }
  4172. l = SiS_PlasmaTable[i].plasmamodes[k] & 0x3f;
  4173. if(pSiS->VBFlags & (VB_301|VB_301B|VB_302B|VB_301LV)) {
  4174. if(isfordvi) {
  4175. if(SiS_PlasmaMode[l].VDisplay > 1024) continue;
  4176. }
  4177. }
  4178. if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
  4179. memset(new, 0, sizeof(DisplayModeRec));
  4180. if(!(new->name = xalloc(12))) {
  4181. xfree(new);
  4182. return first;
  4183. }
  4184. if(!first) first = new;
  4185. if(current) {
  4186. current->next = new;
  4187. new->prev = current;
  4188. }
  4189. current = new;
  4190. pSiS->AddedPlasmaModes = TRUE;
  4191. strcpy(current->name, SiS_PlasmaMode[l].name);
  4192. /* sprintf(current->name, "%dx%d", SiS_PlasmaMode[l].HDisplay,
  4193. SiS_PlasmaMode[l].VDisplay); */
  4194. current->status = MODE_OK;
  4195. current->type = M_T_BUILTIN;
  4196. current->Clock = SiS_PlasmaMode[l].clock;
  4197. current->SynthClock = current->Clock;
  4198. current->HDisplay = SiS_PlasmaMode[l].HDisplay;
  4199. current->HSyncStart = current->HDisplay + SiS_PlasmaMode[l].HFrontPorch;
  4200. current->HSyncEnd = current->HSyncStart + SiS_PlasmaMode[l].HSyncWidth;
  4201. current->HTotal = SiS_PlasmaMode[l].HTotal;
  4202. current->VDisplay = SiS_PlasmaMode[l].VDisplay;
  4203. current->VSyncStart = current->VDisplay + SiS_PlasmaMode[l].VFrontPorch;
  4204. current->VSyncEnd = current->VSyncStart + SiS_PlasmaMode[l].VSyncWidth;
  4205. current->VTotal = SiS_PlasmaMode[l].VTotal;
  4206. current->CrtcHDisplay = current->HDisplay;
  4207. current->CrtcHBlankStart = current->HSyncStart;
  4208. current->CrtcHSyncStart = current->HSyncStart;
  4209. current->CrtcHSyncEnd = current->HSyncEnd;
  4210. current->CrtcHBlankEnd = current->HSyncEnd;
  4211. current->CrtcHTotal = current->HTotal;
  4212. current->CrtcVDisplay = current->VDisplay;
  4213. current->CrtcVBlankStart = current->VSyncStart;
  4214. current->CrtcVSyncStart = current->VSyncStart;
  4215. current->CrtcVSyncEnd = current->VSyncEnd;
  4216. current->CrtcVBlankEnd = current->VSyncEnd;
  4217. current->CrtcVTotal = current->VTotal;
  4218. if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_HSYNCP)
  4219. current->Flags |= V_PHSYNC;
  4220. else
  4221. current->Flags |= V_NHSYNC;
  4222. if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_VSYNCP)
  4223. current->Flags |= V_PVSYNC;
  4224. else
  4225. current->Flags |= V_NVSYNC;
  4226. if(current->HDisplay > pSiS->LCDwidth)
  4227. pSiS->LCDwidth = pSiS->SiS_Pr->CP_MaxX = current->HDisplay;
  4228. if(current->VDisplay > pSiS->LCDheight)
  4229. pSiS->LCDheight = pSiS->SiS_Pr->CP_MaxY = current->VDisplay;
  4230. xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
  4231. "\tAdding \"%s\" to list of built-in modes\n", current->name);
  4232. }
  4233. done = TRUE;
  4234. break;
  4235. }
  4236. }
  4237. }
  4238. i++;
  4239. }
  4240. if(pSiS->SiS_Pr->CP_HaveCustomData) {
  4241. for(i=0; i<7; i++) {
  4242. if(pSiS->SiS_Pr->CP_DataValid[i]) {
  4243. if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
  4244. memset(new, 0, sizeof(DisplayModeRec));
  4245. if(!(new->name = xalloc(10))) {
  4246. xfree(new);
  4247. return first;
  4248. }
  4249. if(!first) first = new;
  4250. if(current) {
  4251. current->next = new;
  4252. new->prev = current;
  4253. }
  4254. current = new;
  4255. sprintf(current->name, "%dx%d", pSiS->SiS_Pr->CP_HDisplay[i],
  4256. pSiS->SiS_Pr->CP_VDisplay[i]);
  4257. current->status = MODE_OK;
  4258. current->type = M_T_BUILTIN;
  4259. current->Clock = pSiS->SiS_Pr->CP_Clock[i];
  4260. current->SynthClock = current->Clock;
  4261. current->HDisplay = pSiS->SiS_Pr->CP_HDisplay[i];
  4262. current->HSyncStart = pSiS->SiS_Pr->CP_HSyncStart[i];
  4263. current->HSyncEnd = pSiS->SiS_Pr->CP_HSyncEnd[i];
  4264. current->HTotal = pSiS->SiS_Pr->CP_HTotal[i];
  4265. current->VDisplay = pSiS->SiS_Pr->CP_VDisplay[i];
  4266. current->VSyncStart = pSiS->SiS_Pr->CP_VSyncStart[i];
  4267. current->VSyncEnd = pSiS->SiS_Pr->CP_VSyncEnd[i];
  4268. current->VTotal = pSiS->SiS_Pr->CP_VTotal[i];
  4269. current->CrtcHDisplay = current->HDisplay;
  4270. current->CrtcHBlankStart = pSiS->SiS_Pr->CP_HBlankStart[i];
  4271. current->CrtcHSyncStart = current->HSyncStart;
  4272. current->CrtcHSyncEnd = current->HSyncEnd;
  4273. current->CrtcHBlankEnd = pSiS->SiS_Pr->CP_HBlankEnd[i];
  4274. current->CrtcHTotal = current->HTotal;
  4275. current->CrtcVDisplay = current->VDisplay;
  4276. current->CrtcVBlankStart = pSiS->SiS_Pr->CP_VBlankStart[i];
  4277. current->CrtcVSyncStart = current->VSyncStart;
  4278. current->CrtcVSyncEnd = current->VSyncEnd;
  4279. current->CrtcVBlankEnd = pSiS->SiS_Pr->CP_VBlankEnd[i];
  4280. current->CrtcVTotal = current->VTotal;
  4281. if(pSiS->SiS_Pr->CP_SyncValid[i]) {
  4282. if(pSiS->SiS_Pr->CP_HSync_P[i])
  4283. current->Flags |= V_PHSYNC;
  4284. else
  4285. current->Flags |= V_NHSYNC;
  4286. if(pSiS->SiS_Pr->CP_VSync_P[i])
  4287. current->Flags |= V_PVSYNC;
  4288. else
  4289. current->Flags |= V_NVSYNC;
  4290. } else {
  4291. /* No sync data? Use positive sync... */
  4292. current->Flags |= V_PHSYNC;
  4293. current->Flags |= V_PVSYNC;
  4294. }
  4295. }
  4296. }
  4297. }
  4298. return first;
  4299. }
  4300. /* Translate a mode number into the VESA pendant */
  4301. int
  4302. SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber)
  4303. {
  4304. SISPtr pSiS = SISPTR(pScrn);
  4305. int i = 0;
  4306. /* Initialize our pointers */
  4307. if(pSiS->VGAEngine == SIS_300_VGA) {
  4308. #ifdef SIS300
  4309. InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
  4310. #else
  4311. return -1;
  4312. #endif
  4313. } else if(pSiS->VGAEngine == SIS_315_VGA) {
  4314. #ifdef SIS315H
  4315. InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
  4316. #else
  4317. return -1;
  4318. #endif
  4319. } else return -1;
  4320. if(modenumber <= 0x13) return modenumber;
  4321. #ifdef SIS315H
  4322. if(pSiS->ROM661New) {
  4323. while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) {
  4324. if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) {
  4325. return (int)SiS_EModeIDTable661[i].Ext_VESAID;
  4326. }
  4327. i++;
  4328. }
  4329. } else {
  4330. #endif
  4331. while(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID != 0xff) {
  4332. if(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID == modenumber) {
  4333. return (int)pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID;
  4334. }
  4335. i++;
  4336. }
  4337. #ifdef SIS315H
  4338. }
  4339. #endif
  4340. return -1;
  4341. }
  4342. /* Translate a new BIOS mode number into the driver's pendant */
  4343. int
  4344. SiSTranslateToOldMode(int modenumber)
  4345. {
  4346. #ifdef SIS315H
  4347. int i = 0;
  4348. while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) {
  4349. if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) {
  4350. if(SiS_EModeIDTable661[i].Ext_MyModeID)
  4351. return (int)SiS_EModeIDTable661[i].Ext_MyModeID;
  4352. else
  4353. return modenumber;
  4354. }
  4355. i++;
  4356. }
  4357. #endif
  4358. return modenumber;
  4359. }
  4360. #endif /* Xfree86 */
  4361. #ifdef LINUX_KERNEL
  4362. int
  4363. sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  4364. unsigned char modeno, unsigned char rateindex)
  4365. {
  4366. USHORT ModeNo = modeno;
  4367. USHORT ModeIdIndex = 0, ClockIndex = 0;
  4368. USHORT RefreshRateTableIndex = 0;
  4369. int Clock;
  4370. if(HwInfo->jChipType < SIS_315H) {
  4371. #ifdef SIS300
  4372. InitTo300Pointer(SiS_Pr, HwInfo);
  4373. #else
  4374. return 65 * 1000;
  4375. #endif
  4376. } else {
  4377. #ifdef SIS315H
  4378. InitTo310Pointer(SiS_Pr, HwInfo);
  4379. #else
  4380. return 65 * 1000;
  4381. #endif
  4382. }
  4383. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
  4384. printk(KERN_ERR "Could not find mode %x\n", ModeNo);
  4385. return 65 * 1000;
  4386. }
  4387. RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
  4388. RefreshRateTableIndex += (rateindex - 1);
  4389. ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
  4390. if(HwInfo->jChipType < SIS_315H) {
  4391. ClockIndex &= 0x3F;
  4392. }
  4393. Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
  4394. return(Clock);
  4395. }
  4396. BOOLEAN
  4397. sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  4398. unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex)
  4399. {
  4400. USHORT ModeNo = modeno;
  4401. USHORT ModeIdIndex = 0, CRT1Index = 0;
  4402. USHORT RefreshRateTableIndex = 0;
  4403. unsigned char sr_data, cr_data, cr_data2;
  4404. if(HwInfo->jChipType < SIS_315H) {
  4405. #ifdef SIS300
  4406. InitTo300Pointer(SiS_Pr, HwInfo);
  4407. #else
  4408. return FALSE;
  4409. #endif
  4410. } else {
  4411. #ifdef SIS315H
  4412. InitTo310Pointer(SiS_Pr, HwInfo);
  4413. #else
  4414. return FALSE;
  4415. #endif
  4416. }
  4417. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
  4418. RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
  4419. RefreshRateTableIndex += (rateindex - 1);
  4420. CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
  4421. sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
  4422. cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
  4423. *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
  4424. sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
  4425. cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
  4426. cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
  4427. *vtotal = ((cr_data & 0xFF) |
  4428. ((unsigned short)(cr_data2 & 0x01) << 8) |
  4429. ((unsigned short)(cr_data2 & 0x20) << 4) |
  4430. ((unsigned short)(sr_data & 0x01) << 10)) + 2;
  4431. if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & InterlaceMode)
  4432. *vtotal *= 2;
  4433. return TRUE;
  4434. }
  4435. int
  4436. sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
  4437. unsigned char modeno, unsigned char rateindex,
  4438. struct fb_var_screeninfo *var)
  4439. {
  4440. USHORT ModeNo = modeno;
  4441. USHORT ModeIdIndex = 0, index = 0;
  4442. USHORT RefreshRateTableIndex = 0;
  4443. unsigned short VRE, VBE, VRS, VBS, VDE, VT;
  4444. unsigned short HRE, HBE, HRS, HBS, HDE, HT;
  4445. unsigned char sr_data, cr_data, cr_data2, cr_data3;
  4446. int A, B, C, D, E, F, temp, j;
  4447. if(HwInfo->jChipType < SIS_315H) {
  4448. #ifdef SIS300
  4449. InitTo300Pointer(SiS_Pr, HwInfo);
  4450. #else
  4451. return 0;
  4452. #endif
  4453. } else {
  4454. #ifdef SIS315H
  4455. InitTo310Pointer(SiS_Pr, HwInfo);
  4456. #else
  4457. return 0;
  4458. #endif
  4459. }
  4460. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
  4461. RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
  4462. RefreshRateTableIndex += (rateindex - 1);
  4463. index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
  4464. sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
  4465. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
  4466. /* Horizontal total */
  4467. HT = (cr_data & 0xff) |
  4468. ((unsigned short) (sr_data & 0x03) << 8);
  4469. A = HT + 5;
  4470. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
  4471. /* Horizontal display enable end */
  4472. HDE = (cr_data & 0xff) |
  4473. ((unsigned short) (sr_data & 0x0C) << 6);
  4474. E = HDE + 1;
  4475. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
  4476. /* Horizontal retrace (=sync) start */
  4477. HRS = (cr_data & 0xff) |
  4478. ((unsigned short) (sr_data & 0xC0) << 2);
  4479. F = HRS - E - 3;
  4480. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
  4481. /* Horizontal blank start */
  4482. HBS = (cr_data & 0xff) |
  4483. ((unsigned short) (sr_data & 0x30) << 4);
  4484. sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
  4485. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
  4486. cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
  4487. /* Horizontal blank end */
  4488. HBE = (cr_data & 0x1f) |
  4489. ((unsigned short) (cr_data2 & 0x80) >> 2) |
  4490. ((unsigned short) (sr_data & 0x03) << 6);
  4491. /* Horizontal retrace (=sync) end */
  4492. HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
  4493. temp = HBE - ((E - 1) & 255);
  4494. B = (temp > 0) ? temp : (temp + 256);
  4495. temp = HRE - ((E + F + 3) & 63);
  4496. C = (temp > 0) ? temp : (temp + 64);
  4497. D = B - F - C;
  4498. if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes == 320) &&
  4499. ((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 200) ||
  4500. (SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 240))) {
  4501. /* Terrible hack, but the correct CRTC data for
  4502. * these modes only produces a black screen...
  4503. */
  4504. var->left_margin = (400 - 376);
  4505. var->right_margin = (328 - 320);
  4506. var->hsync_len = (376 - 328);
  4507. } else {
  4508. var->left_margin = D * 8;
  4509. var->right_margin = F * 8;
  4510. var->hsync_len = C * 8;
  4511. }
  4512. sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
  4513. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
  4514. cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
  4515. /* Vertical total */
  4516. VT = (cr_data & 0xFF) |
  4517. ((unsigned short) (cr_data2 & 0x01) << 8) |
  4518. ((unsigned short)(cr_data2 & 0x20) << 4) |
  4519. ((unsigned short) (sr_data & 0x01) << 10);
  4520. A = VT + 2;
  4521. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
  4522. /* Vertical display enable end */
  4523. VDE = (cr_data & 0xff) |
  4524. ((unsigned short) (cr_data2 & 0x02) << 7) |
  4525. ((unsigned short) (cr_data2 & 0x40) << 3) |
  4526. ((unsigned short) (sr_data & 0x02) << 9);
  4527. E = VDE + 1;
  4528. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
  4529. /* Vertical retrace (=sync) start */
  4530. VRS = (cr_data & 0xff) |
  4531. ((unsigned short) (cr_data2 & 0x04) << 6) |
  4532. ((unsigned short) (cr_data2 & 0x80) << 2) |
  4533. ((unsigned short) (sr_data & 0x08) << 7);
  4534. F = VRS + 1 - E;
  4535. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[11];
  4536. cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
  4537. /* Vertical blank start */
  4538. VBS = (cr_data & 0xff) |
  4539. ((unsigned short) (cr_data2 & 0x08) << 5) |
  4540. ((unsigned short) (cr_data3 & 0x20) << 4) |
  4541. ((unsigned short) (sr_data & 0x04) << 8);
  4542. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[12];
  4543. /* Vertical blank end */
  4544. VBE = (cr_data & 0xff) |
  4545. ((unsigned short) (sr_data & 0x10) << 4);
  4546. temp = VBE - ((E - 1) & 511);
  4547. B = (temp > 0) ? temp : (temp + 512);
  4548. cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
  4549. /* Vertical retrace (=sync) end */
  4550. VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
  4551. temp = VRE - ((E + F - 1) & 31);
  4552. C = (temp > 0) ? temp : (temp + 32);
  4553. D = B - F - C;
  4554. var->upper_margin = D;
  4555. var->lower_margin = F;
  4556. var->vsync_len = C;
  4557. if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
  4558. var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
  4559. else
  4560. var->sync |= FB_SYNC_VERT_HIGH_ACT;
  4561. if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
  4562. var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
  4563. else
  4564. var->sync |= FB_SYNC_HOR_HIGH_ACT;
  4565. var->vmode = FB_VMODE_NONINTERLACED;
  4566. if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
  4567. var->vmode = FB_VMODE_INTERLACED;
  4568. else {
  4569. j = 0;
  4570. while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
  4571. if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
  4572. SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
  4573. if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
  4574. var->vmode = FB_VMODE_DOUBLE;
  4575. }
  4576. break;
  4577. }
  4578. j++;
  4579. }
  4580. }
  4581. if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
  4582. #if 0 /* Do this? */
  4583. var->upper_margin <<= 1;
  4584. var->lower_margin <<= 1;
  4585. var->vsync_len <<= 1;
  4586. #endif
  4587. } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
  4588. var->upper_margin >>= 1;
  4589. var->lower_margin >>= 1;
  4590. var->vsync_len >>= 1;
  4591. }
  4592. return 1;
  4593. }
  4594. #endif