aic79xx.reg 65 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958
  1. /*
  2. * Aic79xx register and scratch ram definitions.
  3. *
  4. * Copyright (c) 1994-2001 Justin T. Gibbs.
  5. * Copyright (c) 2000-2002 Adaptec Inc.
  6. * All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions, and the following disclaimer,
  13. * without modification.
  14. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  15. * substantially similar to the "NO WARRANTY" disclaimer below
  16. * ("Disclaimer") and any redistribution must be conditioned upon
  17. * including a substantially similar Disclaimer requirement for further
  18. * binary redistribution.
  19. * 3. Neither the names of the above-listed copyright holders nor the names
  20. * of any contributors may be used to endorse or promote products derived
  21. * from this software without specific prior written permission.
  22. *
  23. * Alternatively, this software may be distributed under the terms of the
  24. * GNU General Public License ("GPL") version 2 as published by the Free
  25. * Software Foundation.
  26. *
  27. * NO WARRANTY
  28. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  31. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  37. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGES.
  39. *
  40. * $FreeBSD$
  41. */
  42. VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $"
  43. /*
  44. * This file is processed by the aic7xxx_asm utility for use in assembling
  45. * firmware for the aic79xx family of SCSI host adapters as well as to generate
  46. * a C header file for use in the kernel portion of the Aic79xx driver.
  47. */
  48. /* Register window Modes */
  49. #define M_DFF0 0
  50. #define M_DFF1 1
  51. #define M_CCHAN 2
  52. #define M_SCSI 3
  53. #define M_CFG 4
  54. #define M_DST_SHIFT 4
  55. #define MK_MODE(src, dst) ((src) | ((dst) << M_DST_SHIFT))
  56. #define SET_MODE(src, dst) \
  57. SET_SRC_MODE src; \
  58. SET_DST_MODE dst; \
  59. if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
  60. mvi MK_MODE(src, dst) call set_mode_work_around; \
  61. } else { \
  62. mvi MODE_PTR, MK_MODE(src, dst); \
  63. }
  64. #define TOGGLE_DFF_MODE \
  65. if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
  66. call toggle_dff_mode_work_around; \
  67. } else { \
  68. xor MODE_PTR, MK_MODE(M_DFF1, M_DFF1); \
  69. }
  70. #define RESTORE_MODE(mode) \
  71. if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
  72. mov mode call set_mode_work_around; \
  73. } else { \
  74. mov MODE_PTR, mode; \
  75. }
  76. #define SET_SEQINTCODE(code) \
  77. if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) { \
  78. mvi code call set_seqint_work_around; \
  79. } else { \
  80. mvi SEQINTCODE, code; \
  81. }
  82. /*
  83. * Mode Pointer
  84. * Controls which of the 5, 512byte, address spaces should be used
  85. * as the source and destination of any register accesses in our
  86. * register window.
  87. */
  88. register MODE_PTR {
  89. address 0x000
  90. access_mode RW
  91. field DST_MODE 0x70
  92. field SRC_MODE 0x07
  93. mode_pointer
  94. }
  95. const SRC_MODE_SHIFT 0
  96. const DST_MODE_SHIFT 4
  97. /*
  98. * Host Interrupt Status
  99. */
  100. register INTSTAT {
  101. address 0x001
  102. access_mode RW
  103. field HWERRINT 0x80
  104. field BRKADRINT 0x40
  105. field SWTMINT 0x20
  106. field PCIINT 0x10
  107. field SCSIINT 0x08
  108. field SEQINT 0x04
  109. field CMDCMPLT 0x02
  110. field SPLTINT 0x01
  111. mask INT_PEND 0xFF
  112. }
  113. /*
  114. * Sequencer Interrupt Code
  115. */
  116. register SEQINTCODE {
  117. address 0x002
  118. access_mode RW
  119. field {
  120. NO_SEQINT, /* No seqint pending. */
  121. BAD_PHASE, /* unknown scsi bus phase */
  122. SEND_REJECT, /* sending a message reject */
  123. PROTO_VIOLATION, /* Protocol Violation */
  124. NO_MATCH, /* no cmd match for reconnect */
  125. IGN_WIDE_RES, /* Complex IGN Wide Res Msg */
  126. PDATA_REINIT, /*
  127. * Returned to data phase
  128. * that requires data
  129. * transfer pointers to be
  130. * recalculated from the
  131. * transfer residual.
  132. */
  133. HOST_MSG_LOOP, /*
  134. * The bus is ready for the
  135. * host to perform another
  136. * message transaction. This
  137. * mechanism is used for things
  138. * like sync/wide negotiation
  139. * that require a kernel based
  140. * message state engine.
  141. */
  142. BAD_STATUS, /* Bad status from target */
  143. DATA_OVERRUN, /*
  144. * Target attempted to write
  145. * beyond the bounds of its
  146. * command.
  147. */
  148. MKMSG_FAILED, /*
  149. * Target completed command
  150. * without honoring our ATN
  151. * request to issue a message.
  152. */
  153. MISSED_BUSFREE, /*
  154. * The sequencer never saw
  155. * the bus go free after
  156. * either a command complete
  157. * or disconnect message.
  158. */
  159. DUMP_CARD_STATE,
  160. ILLEGAL_PHASE,
  161. INVALID_SEQINT,
  162. CFG4ISTAT_INTR,
  163. STATUS_OVERRUN,
  164. CFG4OVERRUN,
  165. ENTERING_NONPACK,
  166. TASKMGMT_FUNC_COMPLETE, /*
  167. * Task management function
  168. * request completed with
  169. * an expected busfree.
  170. */
  171. TASKMGMT_CMD_CMPLT_OKAY, /*
  172. * A command with a non-zero
  173. * task management function
  174. * has completed via the normal
  175. * command completion method
  176. * for commands with a zero
  177. * task management function.
  178. * This happens when an attempt
  179. * to abort a command loses
  180. * the race for the command to
  181. * complete normally.
  182. */
  183. TRACEPOINT0,
  184. TRACEPOINT1,
  185. TRACEPOINT2,
  186. TRACEPOINT3,
  187. SAW_HWERR,
  188. BAD_SCB_STATUS
  189. }
  190. }
  191. /*
  192. * Clear Host Interrupt
  193. */
  194. register CLRINT {
  195. address 0x003
  196. access_mode WO
  197. field CLRHWERRINT 0x80 /* Rev B or greater */
  198. field CLRBRKADRINT 0x40
  199. field CLRSWTMINT 0x20
  200. field CLRPCIINT 0x10
  201. field CLRSCSIINT 0x08
  202. field CLRSEQINT 0x04
  203. field CLRCMDINT 0x02
  204. field CLRSPLTINT 0x01
  205. }
  206. /*
  207. * Error Register
  208. */
  209. register ERROR {
  210. address 0x004
  211. access_mode RO
  212. field CIOPARERR 0x80
  213. field CIOACCESFAIL 0x40 /* Rev B or greater */
  214. field MPARERR 0x20
  215. field DPARERR 0x10
  216. field SQPARERR 0x08
  217. field ILLOPCODE 0x04
  218. field DSCTMOUT 0x02
  219. }
  220. /*
  221. * Clear Error
  222. */
  223. register CLRERR {
  224. address 0x004
  225. access_mode WO
  226. field CLRCIOPARERR 0x80
  227. field CLRCIOACCESFAIL 0x40 /* Rev B or greater */
  228. field CLRMPARERR 0x20
  229. field CLRDPARERR 0x10
  230. field CLRSQPARERR 0x08
  231. field CLRILLOPCODE 0x04
  232. field CLRDSCTMOUT 0x02
  233. }
  234. /*
  235. * Host Control Register
  236. * Overall host control of the device.
  237. */
  238. register HCNTRL {
  239. address 0x005
  240. access_mode RW
  241. field SEQ_RESET 0x80 /* Rev B or greater */
  242. field POWRDN 0x40
  243. field SWINT 0x10
  244. field SWTIMER_START_B 0x08 /* Rev B or greater */
  245. field PAUSE 0x04
  246. field INTEN 0x02
  247. field CHIPRST 0x01
  248. field CHIPRSTACK 0x01
  249. }
  250. /*
  251. * Host New SCB Queue Offset
  252. */
  253. register HNSCB_QOFF {
  254. address 0x006
  255. access_mode RW
  256. size 2
  257. }
  258. /*
  259. * Host Empty SCB Queue Offset
  260. */
  261. register HESCB_QOFF {
  262. address 0x008
  263. access_mode RW
  264. }
  265. /*
  266. * Host Mailbox
  267. */
  268. register HS_MAILBOX {
  269. address 0x00B
  270. access_mode RW
  271. mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
  272. mask ENINT_COALESCE 0x40 /* Perform interrupt coalescing */
  273. }
  274. /*
  275. * Sequencer Interupt Status
  276. */
  277. register SEQINTSTAT {
  278. address 0x00C
  279. access_mode RO
  280. field SEQ_SWTMRTO 0x10
  281. field SEQ_SEQINT 0x08
  282. field SEQ_SCSIINT 0x04
  283. field SEQ_PCIINT 0x02
  284. field SEQ_SPLTINT 0x01
  285. }
  286. /*
  287. * Clear SEQ Interrupt
  288. */
  289. register CLRSEQINTSTAT {
  290. address 0x00C
  291. access_mode WO
  292. field CLRSEQ_SWTMRTO 0x10
  293. field CLRSEQ_SEQINT 0x08
  294. field CLRSEQ_SCSIINT 0x04
  295. field CLRSEQ_PCIINT 0x02
  296. field CLRSEQ_SPLTINT 0x01
  297. }
  298. /*
  299. * Software Timer
  300. */
  301. register SWTIMER {
  302. address 0x00E
  303. access_mode RW
  304. size 2
  305. }
  306. /*
  307. * SEQ New SCB Queue Offset
  308. */
  309. register SNSCB_QOFF {
  310. address 0x010
  311. access_mode RW
  312. size 2
  313. modes M_CCHAN
  314. }
  315. /*
  316. * SEQ Empty SCB Queue Offset
  317. */
  318. register SESCB_QOFF {
  319. address 0x012
  320. access_mode RW
  321. modes M_CCHAN
  322. }
  323. /*
  324. * SEQ Done SCB Queue Offset
  325. */
  326. register SDSCB_QOFF {
  327. address 0x014
  328. access_mode RW
  329. modes M_CCHAN
  330. size 2
  331. }
  332. /*
  333. * Queue Offset Control & Status
  334. */
  335. register QOFF_CTLSTA {
  336. address 0x016
  337. access_mode RW
  338. modes M_CCHAN
  339. field EMPTY_SCB_AVAIL 0x80
  340. field NEW_SCB_AVAIL 0x40
  341. field SDSCB_ROLLOVR 0x20
  342. field HS_MAILBOX_ACT 0x10
  343. field SCB_QSIZE 0x0F {
  344. SCB_QSIZE_4,
  345. SCB_QSIZE_8,
  346. SCB_QSIZE_16,
  347. SCB_QSIZE_32,
  348. SCB_QSIZE_64,
  349. SCB_QSIZE_128,
  350. SCB_QSIZE_256,
  351. SCB_QSIZE_512,
  352. SCB_QSIZE_1024,
  353. SCB_QSIZE_2048,
  354. SCB_QSIZE_4096,
  355. SCB_QSIZE_8192,
  356. SCB_QSIZE_16384
  357. }
  358. }
  359. /*
  360. * Interrupt Control
  361. */
  362. register INTCTL {
  363. address 0x018
  364. access_mode RW
  365. field SWTMINTMASK 0x80
  366. field SWTMINTEN 0x40
  367. field SWTIMER_START 0x20
  368. field AUTOCLRCMDINT 0x10
  369. field PCIINTEN 0x08
  370. field SCSIINTEN 0x04
  371. field SEQINTEN 0x02
  372. field SPLTINTEN 0x01
  373. }
  374. /*
  375. * Data FIFO Control
  376. */
  377. register DFCNTRL {
  378. address 0x019
  379. access_mode RW
  380. modes M_DFF0, M_DFF1
  381. field PRELOADEN 0x80
  382. field SCSIENWRDIS 0x40 /* Rev B only. */
  383. field SCSIEN 0x20
  384. field SCSIENACK 0x20
  385. field HDMAEN 0x08
  386. field HDMAENACK 0x08
  387. field DIRECTION 0x04
  388. field DIRECTIONACK 0x04
  389. field FIFOFLUSH 0x02
  390. field FIFOFLUSHACK 0x02
  391. field DIRECTIONEN 0x01
  392. }
  393. /*
  394. * Device Space Command 0
  395. */
  396. register DSCOMMAND0 {
  397. address 0x019
  398. access_mode RW
  399. modes M_CFG
  400. field CACHETHEN 0x80 /* Cache Threshold enable */
  401. field DPARCKEN 0x40 /* Data Parity Check Enable */
  402. field MPARCKEN 0x20 /* Memory Parity Check Enable */
  403. field EXTREQLCK 0x10 /* External Request Lock */
  404. field DISABLE_TWATE 0x02 /* Rev B or greater */
  405. field CIOPARCKEN 0x01 /* Internal bus parity error enable */
  406. }
  407. /*
  408. * Data FIFO Status
  409. */
  410. register DFSTATUS {
  411. address 0x01A
  412. access_mode RO
  413. modes M_DFF0, M_DFF1
  414. field PRELOAD_AVAIL 0x80
  415. field PKT_PRELOAD_AVAIL 0x40
  416. field MREQPEND 0x10
  417. field HDONE 0x08
  418. field DFTHRESH 0x04
  419. field FIFOFULL 0x02
  420. field FIFOEMP 0x01
  421. }
  422. /*
  423. * S/G Cache Pointer
  424. */
  425. register SG_CACHE_PRE {
  426. address 0x01B
  427. access_mode WO
  428. modes M_DFF0, M_DFF1
  429. field SG_ADDR_MASK 0xf8
  430. field ODD_SEG 0x04
  431. field LAST_SEG 0x02
  432. }
  433. register SG_CACHE_SHADOW {
  434. address 0x01B
  435. access_mode RO
  436. modes M_DFF0, M_DFF1
  437. field SG_ADDR_MASK 0xf8
  438. field ODD_SEG 0x04
  439. field LAST_SEG 0x02
  440. field LAST_SEG_DONE 0x01
  441. }
  442. /*
  443. * Arbiter Control
  444. */
  445. register ARBCTL {
  446. address 0x01B
  447. access_mode RW
  448. modes M_CFG
  449. field RESET_HARB 0x80
  450. field RETRY_SWEN 0x08
  451. field USE_TIME 0x07
  452. }
  453. /*
  454. * Data Channel Host Address
  455. */
  456. register HADDR {
  457. address 0x070
  458. access_mode RW
  459. size 8
  460. modes M_DFF0, M_DFF1
  461. }
  462. /*
  463. * Host Overlay DMA Address
  464. */
  465. register HODMAADR {
  466. address 0x070
  467. access_mode RW
  468. size 8
  469. modes M_SCSI
  470. }
  471. /*
  472. * PCI PLL Delay.
  473. */
  474. register PLLDELAY {
  475. address 0x070
  476. access_mode RW
  477. size 1
  478. modes M_CFG
  479. field SPLIT_DROP_REQ 0x80
  480. }
  481. /*
  482. * Data Channel Host Count
  483. */
  484. register HCNT {
  485. address 0x078
  486. access_mode RW
  487. size 3
  488. modes M_DFF0, M_DFF1
  489. }
  490. /*
  491. * Host Overlay DMA Count
  492. */
  493. register HODMACNT {
  494. address 0x078
  495. access_mode RW
  496. size 2
  497. modes M_SCSI
  498. }
  499. /*
  500. * Host Overlay DMA Enable
  501. */
  502. register HODMAEN {
  503. address 0x07A
  504. access_mode RW
  505. modes M_SCSI
  506. }
  507. /*
  508. * Scatter/Gather Host Address
  509. */
  510. register SGHADDR {
  511. address 0x07C
  512. access_mode RW
  513. size 8
  514. modes M_DFF0, M_DFF1
  515. }
  516. /*
  517. * SCB Host Address
  518. */
  519. register SCBHADDR {
  520. address 0x07C
  521. access_mode RW
  522. size 8
  523. modes M_CCHAN
  524. }
  525. /*
  526. * Scatter/Gather Host Count
  527. */
  528. register SGHCNT {
  529. address 0x084
  530. access_mode RW
  531. modes M_DFF0, M_DFF1
  532. }
  533. /*
  534. * SCB Host Count
  535. */
  536. register SCBHCNT {
  537. address 0x084
  538. access_mode RW
  539. modes M_CCHAN
  540. }
  541. /*
  542. * Data FIFO Threshold
  543. */
  544. register DFF_THRSH {
  545. address 0x088
  546. access_mode RW
  547. modes M_CFG
  548. field WR_DFTHRSH 0x70 {
  549. WR_DFTHRSH_MIN,
  550. WR_DFTHRSH_25,
  551. WR_DFTHRSH_50,
  552. WR_DFTHRSH_63,
  553. WR_DFTHRSH_75,
  554. WR_DFTHRSH_85,
  555. WR_DFTHRSH_90,
  556. WR_DFTHRSH_MAX
  557. }
  558. field RD_DFTHRSH 0x07 {
  559. RD_DFTHRSH_MIN,
  560. RD_DFTHRSH_25,
  561. RD_DFTHRSH_50,
  562. RD_DFTHRSH_63,
  563. RD_DFTHRSH_75,
  564. RD_DFTHRSH_85,
  565. RD_DFTHRSH_90,
  566. RD_DFTHRSH_MAX
  567. }
  568. }
  569. /*
  570. * ROM Address
  571. */
  572. register ROMADDR {
  573. address 0x08A
  574. access_mode RW
  575. size 3
  576. }
  577. /*
  578. * ROM Control
  579. */
  580. register ROMCNTRL {
  581. address 0x08D
  582. access_mode RW
  583. field ROMOP 0xE0
  584. field ROMSPD 0x18
  585. field REPEAT 0x02
  586. field RDY 0x01
  587. }
  588. /*
  589. * ROM Data
  590. */
  591. register ROMDATA {
  592. address 0x08E
  593. access_mode RW
  594. }
  595. /*
  596. * Data Channel Receive Message 0
  597. */
  598. register DCHRXMSG0 {
  599. address 0x090
  600. access_mode RO
  601. modes M_DFF0, M_DFF1
  602. field CDNUM 0xF8
  603. field CFNUM 0x07
  604. }
  605. /*
  606. * CMC Recieve Message 0
  607. */
  608. register CMCRXMSG0 {
  609. address 0x090
  610. access_mode RO
  611. modes M_CCHAN
  612. field CDNUM 0xF8
  613. field CFNUM 0x07
  614. }
  615. /*
  616. * Overlay Recieve Message 0
  617. */
  618. register OVLYRXMSG0 {
  619. address 0x090
  620. access_mode RO
  621. modes M_SCSI
  622. field CDNUM 0xF8
  623. field CFNUM 0x07
  624. }
  625. /*
  626. * Relaxed Order Enable
  627. */
  628. register ROENABLE {
  629. address 0x090
  630. access_mode RW
  631. modes M_CFG
  632. field MSIROEN 0x20
  633. field OVLYROEN 0x10
  634. field CMCROEN 0x08
  635. field SGROEN 0x04
  636. field DCH1ROEN 0x02
  637. field DCH0ROEN 0x01
  638. }
  639. /*
  640. * Data Channel Receive Message 1
  641. */
  642. register DCHRXMSG1 {
  643. address 0x091
  644. access_mode RO
  645. modes M_DFF0, M_DFF1
  646. field CBNUM 0xFF
  647. }
  648. /*
  649. * CMC Recieve Message 1
  650. */
  651. register CMCRXMSG1 {
  652. address 0x091
  653. access_mode RO
  654. modes M_CCHAN
  655. field CBNUM 0xFF
  656. }
  657. /*
  658. * Overlay Recieve Message 1
  659. */
  660. register OVLYRXMSG1 {
  661. address 0x091
  662. access_mode RO
  663. modes M_SCSI
  664. field CBNUM 0xFF
  665. }
  666. /*
  667. * No Snoop Enable
  668. */
  669. register NSENABLE {
  670. address 0x091
  671. access_mode RW
  672. modes M_CFG
  673. field MSINSEN 0x20
  674. field OVLYNSEN 0x10
  675. field CMCNSEN 0x08
  676. field SGNSEN 0x04
  677. field DCH1NSEN 0x02
  678. field DCH0NSEN 0x01
  679. }
  680. /*
  681. * Data Channel Receive Message 2
  682. */
  683. register DCHRXMSG2 {
  684. address 0x092
  685. access_mode RO
  686. modes M_DFF0, M_DFF1
  687. field MINDEX 0xFF
  688. }
  689. /*
  690. * CMC Recieve Message 2
  691. */
  692. register CMCRXMSG2 {
  693. address 0x092
  694. access_mode RO
  695. modes M_CCHAN
  696. field MINDEX 0xFF
  697. }
  698. /*
  699. * Overlay Recieve Message 2
  700. */
  701. register OVLYRXMSG2 {
  702. address 0x092
  703. access_mode RO
  704. modes M_SCSI
  705. field MINDEX 0xFF
  706. }
  707. /*
  708. * Outstanding Split Transactions
  709. */
  710. register OST {
  711. address 0x092
  712. access_mode RW
  713. modes M_CFG
  714. }
  715. /*
  716. * Data Channel Receive Message 3
  717. */
  718. register DCHRXMSG3 {
  719. address 0x093
  720. access_mode RO
  721. modes M_DFF0, M_DFF1
  722. field MCLASS 0x0F
  723. }
  724. /*
  725. * CMC Recieve Message 3
  726. */
  727. register CMCRXMSG3 {
  728. address 0x093
  729. access_mode RO
  730. modes M_CCHAN
  731. field MCLASS 0x0F
  732. }
  733. /*
  734. * Overlay Recieve Message 3
  735. */
  736. register OVLYRXMSG3 {
  737. address 0x093
  738. access_mode RO
  739. modes M_SCSI
  740. field MCLASS 0x0F
  741. }
  742. /*
  743. * PCI-X Control
  744. */
  745. register PCIXCTL {
  746. address 0x093
  747. access_mode RW
  748. modes M_CFG
  749. field SERRPULSE 0x80
  750. field UNEXPSCIEN 0x20
  751. field SPLTSMADIS 0x10
  752. field SPLTSTADIS 0x08
  753. field SRSPDPEEN 0x04
  754. field TSCSERREN 0x02
  755. field CMPABCDIS 0x01
  756. }
  757. /*
  758. * CMC Sequencer Byte Count
  759. */
  760. register CMCSEQBCNT {
  761. address 0x094
  762. access_mode RO
  763. modes M_CCHAN
  764. }
  765. /*
  766. * Overlay Sequencer Byte Count
  767. */
  768. register OVLYSEQBCNT {
  769. address 0x094
  770. access_mode RO
  771. modes M_SCSI
  772. }
  773. /*
  774. * Data Channel Sequencer Byte Count
  775. */
  776. register DCHSEQBCNT {
  777. address 0x094
  778. access_mode RO
  779. size 2
  780. modes M_DFF0, M_DFF1
  781. }
  782. /*
  783. * Data Channel Split Status 0
  784. */
  785. register DCHSPLTSTAT0 {
  786. address 0x096
  787. access_mode RW
  788. modes M_DFF0, M_DFF1
  789. field STAETERM 0x80
  790. field SCBCERR 0x40
  791. field SCADERR 0x20
  792. field SCDATBUCKET 0x10
  793. field CNTNOTCMPLT 0x08
  794. field RXOVRUN 0x04
  795. field RXSCEMSG 0x02
  796. field RXSPLTRSP 0x01
  797. }
  798. /*
  799. * CMC Split Status 0
  800. */
  801. register CMCSPLTSTAT0 {
  802. address 0x096
  803. access_mode RW
  804. modes M_CCHAN
  805. field STAETERM 0x80
  806. field SCBCERR 0x40
  807. field SCADERR 0x20
  808. field SCDATBUCKET 0x10
  809. field CNTNOTCMPLT 0x08
  810. field RXOVRUN 0x04
  811. field RXSCEMSG 0x02
  812. field RXSPLTRSP 0x01
  813. }
  814. /*
  815. * Overlay Split Status 0
  816. */
  817. register OVLYSPLTSTAT0 {
  818. address 0x096
  819. access_mode RW
  820. modes M_SCSI
  821. field STAETERM 0x80
  822. field SCBCERR 0x40
  823. field SCADERR 0x20
  824. field SCDATBUCKET 0x10
  825. field CNTNOTCMPLT 0x08
  826. field RXOVRUN 0x04
  827. field RXSCEMSG 0x02
  828. field RXSPLTRSP 0x01
  829. }
  830. /*
  831. * Data Channel Split Status 1
  832. */
  833. register DCHSPLTSTAT1 {
  834. address 0x097
  835. access_mode RW
  836. modes M_DFF0, M_DFF1
  837. field RXDATABUCKET 0x01
  838. }
  839. /*
  840. * CMC Split Status 1
  841. */
  842. register CMCSPLTSTAT1 {
  843. address 0x097
  844. access_mode RW
  845. modes M_CCHAN
  846. field RXDATABUCKET 0x01
  847. }
  848. /*
  849. * Overlay Split Status 1
  850. */
  851. register OVLYSPLTSTAT1 {
  852. address 0x097
  853. access_mode RW
  854. modes M_SCSI
  855. field RXDATABUCKET 0x01
  856. }
  857. /*
  858. * S/G Receive Message 0
  859. */
  860. register SGRXMSG0 {
  861. address 0x098
  862. access_mode RO
  863. modes M_DFF0, M_DFF1
  864. field CDNUM 0xF8
  865. field CFNUM 0x07
  866. }
  867. /*
  868. * S/G Receive Message 1
  869. */
  870. register SGRXMSG1 {
  871. address 0x099
  872. access_mode RO
  873. modes M_DFF0, M_DFF1
  874. field CBNUM 0xFF
  875. }
  876. /*
  877. * S/G Receive Message 2
  878. */
  879. register SGRXMSG2 {
  880. address 0x09A
  881. access_mode RO
  882. modes M_DFF0, M_DFF1
  883. field MINDEX 0xFF
  884. }
  885. /*
  886. * S/G Receive Message 3
  887. */
  888. register SGRXMSG3 {
  889. address 0x09B
  890. access_mode RO
  891. modes M_DFF0, M_DFF1
  892. field MCLASS 0x0F
  893. }
  894. /*
  895. * Slave Split Out Address 0
  896. */
  897. register SLVSPLTOUTADR0 {
  898. address 0x098
  899. access_mode RO
  900. modes M_SCSI
  901. field LOWER_ADDR 0x7F
  902. }
  903. /*
  904. * Slave Split Out Address 1
  905. */
  906. register SLVSPLTOUTADR1 {
  907. address 0x099
  908. access_mode RO
  909. modes M_SCSI
  910. field REQ_DNUM 0xF8
  911. field REQ_FNUM 0x07
  912. }
  913. /*
  914. * Slave Split Out Address 2
  915. */
  916. register SLVSPLTOUTADR2 {
  917. address 0x09A
  918. access_mode RO
  919. modes M_SCSI
  920. field REQ_BNUM 0xFF
  921. }
  922. /*
  923. * Slave Split Out Address 3
  924. */
  925. register SLVSPLTOUTADR3 {
  926. address 0x09B
  927. access_mode RO
  928. modes M_SCSI
  929. field RLXORD 020
  930. field TAG_NUM 0x1F
  931. }
  932. /*
  933. * SG Sequencer Byte Count
  934. */
  935. register SGSEQBCNT {
  936. address 0x09C
  937. access_mode RO
  938. modes M_DFF0, M_DFF1
  939. }
  940. /*
  941. * Slave Split Out Attribute 0
  942. */
  943. register SLVSPLTOUTATTR0 {
  944. address 0x09C
  945. access_mode RO
  946. modes M_SCSI
  947. field LOWER_BCNT 0xFF
  948. }
  949. /*
  950. * Slave Split Out Attribute 1
  951. */
  952. register SLVSPLTOUTATTR1 {
  953. address 0x09D
  954. access_mode RO
  955. modes M_SCSI
  956. field CMPLT_DNUM 0xF8
  957. field CMPLT_FNUM 0x07
  958. }
  959. /*
  960. * Slave Split Out Attribute 2
  961. */
  962. register SLVSPLTOUTATTR2 {
  963. address 0x09E
  964. access_mode RO
  965. size 2
  966. modes M_SCSI
  967. field CMPLT_BNUM 0xFF
  968. }
  969. /*
  970. * S/G Split Status 0
  971. */
  972. register SGSPLTSTAT0 {
  973. address 0x09E
  974. access_mode RW
  975. modes M_DFF0, M_DFF1
  976. field STAETERM 0x80
  977. field SCBCERR 0x40
  978. field SCADERR 0x20
  979. field SCDATBUCKET 0x10
  980. field CNTNOTCMPLT 0x08
  981. field RXOVRUN 0x04
  982. field RXSCEMSG 0x02
  983. field RXSPLTRSP 0x01
  984. }
  985. /*
  986. * S/G Split Status 1
  987. */
  988. register SGSPLTSTAT1 {
  989. address 0x09F
  990. access_mode RW
  991. modes M_DFF0, M_DFF1
  992. field RXDATABUCKET 0x01
  993. }
  994. /*
  995. * Special Function
  996. */
  997. register SFUNCT {
  998. address 0x09f
  999. access_mode RW
  1000. modes M_CFG
  1001. field TEST_GROUP 0xF0
  1002. field TEST_NUM 0x0F
  1003. }
  1004. /*
  1005. * Data FIFO 0 PCI Status
  1006. */
  1007. register DF0PCISTAT {
  1008. address 0x0A0
  1009. access_mode RW
  1010. modes M_CFG
  1011. field DPE 0x80
  1012. field SSE 0x40
  1013. field RMA 0x20
  1014. field RTA 0x10
  1015. field SCAAPERR 0x08
  1016. field RDPERR 0x04
  1017. field TWATERR 0x02
  1018. field DPR 0x01
  1019. }
  1020. /*
  1021. * Data FIFO 1 PCI Status
  1022. */
  1023. register DF1PCISTAT {
  1024. address 0x0A1
  1025. access_mode RW
  1026. modes M_CFG
  1027. field DPE 0x80
  1028. field SSE 0x40
  1029. field RMA 0x20
  1030. field RTA 0x10
  1031. field SCAAPERR 0x08
  1032. field RDPERR 0x04
  1033. field TWATERR 0x02
  1034. field DPR 0x01
  1035. }
  1036. /*
  1037. * S/G PCI Status
  1038. */
  1039. register SGPCISTAT {
  1040. address 0x0A2
  1041. access_mode RW
  1042. modes M_CFG
  1043. field DPE 0x80
  1044. field SSE 0x40
  1045. field RMA 0x20
  1046. field RTA 0x10
  1047. field SCAAPERR 0x08
  1048. field RDPERR 0x04
  1049. field DPR 0x01
  1050. }
  1051. /*
  1052. * CMC PCI Status
  1053. */
  1054. register CMCPCISTAT {
  1055. address 0x0A3
  1056. access_mode RW
  1057. modes M_CFG
  1058. field DPE 0x80
  1059. field SSE 0x40
  1060. field RMA 0x20
  1061. field RTA 0x10
  1062. field SCAAPERR 0x08
  1063. field RDPERR 0x04
  1064. field TWATERR 0x02
  1065. field DPR 0x01
  1066. }
  1067. /*
  1068. * Overlay PCI Status
  1069. */
  1070. register OVLYPCISTAT {
  1071. address 0x0A4
  1072. access_mode RW
  1073. modes M_CFG
  1074. field DPE 0x80
  1075. field SSE 0x40
  1076. field RMA 0x20
  1077. field RTA 0x10
  1078. field SCAAPERR 0x08
  1079. field RDPERR 0x04
  1080. field DPR 0x01
  1081. }
  1082. /*
  1083. * PCI Status for MSI Master DMA Transfer
  1084. */
  1085. register MSIPCISTAT {
  1086. address 0x0A6
  1087. access_mode RW
  1088. modes M_CFG
  1089. field SSE 0x40
  1090. field RMA 0x20
  1091. field RTA 0x10
  1092. field CLRPENDMSI 0x08
  1093. field TWATERR 0x02
  1094. field DPR 0x01
  1095. }
  1096. /*
  1097. * PCI Status for Target
  1098. */
  1099. register TARGPCISTAT {
  1100. address 0x0A7
  1101. access_mode RW
  1102. modes M_CFG
  1103. field DPE 0x80
  1104. field SSE 0x40
  1105. field STA 0x08
  1106. field TWATERR 0x02
  1107. }
  1108. /*
  1109. * LQ Packet In
  1110. * The last LQ Packet received
  1111. */
  1112. register LQIN {
  1113. address 0x020
  1114. access_mode RW
  1115. size 20
  1116. modes M_DFF0, M_DFF1, M_SCSI
  1117. }
  1118. /*
  1119. * SCB Type Pointer
  1120. * SCB offset for Target Mode SCB type information
  1121. */
  1122. register TYPEPTR {
  1123. address 0x020
  1124. access_mode RW
  1125. modes M_CFG
  1126. }
  1127. /*
  1128. * Queue Tag Pointer
  1129. * SCB offset to the Two Byte tag identifier used for target mode.
  1130. */
  1131. register TAGPTR {
  1132. address 0x021
  1133. access_mode RW
  1134. modes M_CFG
  1135. }
  1136. /*
  1137. * Logical Unit Number Pointer
  1138. * SCB offset to the LSB (little endian) of the lun field.
  1139. */
  1140. register LUNPTR {
  1141. address 0x022
  1142. access_mode RW
  1143. modes M_CFG
  1144. }
  1145. /*
  1146. * Data Length Pointer
  1147. * SCB offset for the 4 byte data length field in target mode.
  1148. */
  1149. register DATALENPTR {
  1150. address 0x023
  1151. access_mode RW
  1152. modes M_CFG
  1153. }
  1154. /*
  1155. * Status Length Pointer
  1156. * SCB offset to the two byte status field in target SCBs.
  1157. */
  1158. register STATLENPTR {
  1159. address 0x024
  1160. access_mode RW
  1161. modes M_CFG
  1162. }
  1163. /*
  1164. * Command Length Pointer
  1165. * Scb offset for the CDB length field in initiator SCBs.
  1166. */
  1167. register CMDLENPTR {
  1168. address 0x025
  1169. access_mode RW
  1170. modes M_CFG
  1171. }
  1172. /*
  1173. * Task Attribute Pointer
  1174. * Scb offset for the byte field specifying the attribute byte
  1175. * to be used in command packets.
  1176. */
  1177. register ATTRPTR {
  1178. address 0x026
  1179. access_mode RW
  1180. modes M_CFG
  1181. }
  1182. /*
  1183. * Task Management Flags Pointer
  1184. * Scb offset for the byte field specifying the attribute flags
  1185. * byte to be used in command packets.
  1186. */
  1187. register FLAGPTR {
  1188. address 0x027
  1189. access_mode RW
  1190. modes M_CFG
  1191. }
  1192. /*
  1193. * Command Pointer
  1194. * Scb offset for the first byte in the CDB for initiator SCBs.
  1195. */
  1196. register CMDPTR {
  1197. address 0x028
  1198. access_mode RW
  1199. modes M_CFG
  1200. }
  1201. /*
  1202. * Queue Next Pointer
  1203. * Scb offset for the 2 byte "next scb link".
  1204. */
  1205. register QNEXTPTR {
  1206. address 0x029
  1207. access_mode RW
  1208. modes M_CFG
  1209. }
  1210. /*
  1211. * SCSI ID Pointer
  1212. * Scb offset to the value to place in the SCSIID register
  1213. * during target mode connections.
  1214. */
  1215. register IDPTR {
  1216. address 0x02A
  1217. access_mode RW
  1218. modes M_CFG
  1219. }
  1220. /*
  1221. * Command Aborted Byte Pointer
  1222. * Offset to the SCB flags field that includes the
  1223. * "SCB aborted" status bit.
  1224. */
  1225. register ABRTBYTEPTR {
  1226. address 0x02B
  1227. access_mode RW
  1228. modes M_CFG
  1229. }
  1230. /*
  1231. * Command Aborted Bit Pointer
  1232. * Bit offset in the SCB flags field for "SCB aborted" status.
  1233. */
  1234. register ABRTBITPTR {
  1235. address 0x02C
  1236. access_mode RW
  1237. modes M_CFG
  1238. }
  1239. /*
  1240. * Rev B or greater.
  1241. */
  1242. register MAXCMDBYTES {
  1243. address 0x02D
  1244. access_mode RW
  1245. modes M_CFG
  1246. }
  1247. /*
  1248. * Rev B or greater.
  1249. */
  1250. register MAXCMD2RCV {
  1251. address 0x02E
  1252. access_mode RW
  1253. modes M_CFG
  1254. }
  1255. /*
  1256. * Rev B or greater.
  1257. */
  1258. register SHORTTHRESH {
  1259. address 0x02F
  1260. access_mode RW
  1261. modes M_CFG
  1262. }
  1263. /*
  1264. * Logical Unit Number Length
  1265. * The length, in bytes, of the SCB lun field.
  1266. */
  1267. register LUNLEN {
  1268. address 0x030
  1269. access_mode RW
  1270. modes M_CFG
  1271. mask ILUNLEN 0x0F
  1272. mask TLUNLEN 0xF0
  1273. }
  1274. const LUNLEN_SINGLE_LEVEL_LUN 0xF
  1275. /*
  1276. * CDB Limit
  1277. * The size, in bytes, of the embedded CDB field in initator SCBs.
  1278. */
  1279. register CDBLIMIT {
  1280. address 0x031
  1281. access_mode RW
  1282. modes M_CFG
  1283. }
  1284. /*
  1285. * Maximum Commands
  1286. * The maximum number of commands to issue during a
  1287. * single packetized connection.
  1288. */
  1289. register MAXCMD {
  1290. address 0x032
  1291. access_mode RW
  1292. modes M_CFG
  1293. }
  1294. /*
  1295. * Maximum Command Counter
  1296. * The number of commands already sent during this connection
  1297. */
  1298. register MAXCMDCNT {
  1299. address 0x033
  1300. access_mode RW
  1301. modes M_CFG
  1302. }
  1303. /*
  1304. * LQ Packet Reserved Bytes
  1305. * The bytes to be sent in the currently reserved fileds
  1306. * of all LQ packets.
  1307. */
  1308. register LQRSVD01 {
  1309. address 0x034
  1310. access_mode RW
  1311. modes M_SCSI
  1312. }
  1313. register LQRSVD16 {
  1314. address 0x035
  1315. access_mode RW
  1316. modes M_SCSI
  1317. }
  1318. register LQRSVD17 {
  1319. address 0x036
  1320. access_mode RW
  1321. modes M_SCSI
  1322. }
  1323. /*
  1324. * Command Reserved 0
  1325. * The byte to be sent for the reserved byte 0 of
  1326. * outgoing command packets.
  1327. */
  1328. register CMDRSVD0 {
  1329. address 0x037
  1330. access_mode RW
  1331. modes M_CFG
  1332. }
  1333. /*
  1334. * LQ Manager Control 0
  1335. */
  1336. register LQCTL0 {
  1337. address 0x038
  1338. access_mode RW
  1339. modes M_CFG
  1340. field LQITARGCLT 0xC0
  1341. field LQIINITGCLT 0x30
  1342. field LQ0TARGCLT 0x0C
  1343. field LQ0INITGCLT 0x03
  1344. }
  1345. /*
  1346. * LQ Manager Control 1
  1347. */
  1348. register LQCTL1 {
  1349. address 0x038
  1350. access_mode RW
  1351. modes M_DFF0, M_DFF1, M_SCSI
  1352. field PCI2PCI 0x04
  1353. field SINGLECMD 0x02
  1354. field ABORTPENDING 0x01
  1355. }
  1356. /*
  1357. * LQ Manager Control 2
  1358. */
  1359. register LQCTL2 {
  1360. address 0x039
  1361. access_mode RW
  1362. modes M_DFF0, M_DFF1, M_SCSI
  1363. field LQIRETRY 0x80
  1364. field LQICONTINUE 0x40
  1365. field LQITOIDLE 0x20
  1366. field LQIPAUSE 0x10
  1367. field LQORETRY 0x08
  1368. field LQOCONTINUE 0x04
  1369. field LQOTOIDLE 0x02
  1370. field LQOPAUSE 0x01
  1371. }
  1372. /*
  1373. * SCSI RAM BIST0
  1374. */
  1375. register SCSBIST0 {
  1376. address 0x039
  1377. access_mode RW
  1378. modes M_CFG
  1379. field GSBISTERR 0x40
  1380. field GSBISTDONE 0x20
  1381. field GSBISTRUN 0x10
  1382. field OSBISTERR 0x04
  1383. field OSBISTDONE 0x02
  1384. field OSBISTRUN 0x01
  1385. }
  1386. /*
  1387. * SCSI Sequence Control0
  1388. */
  1389. register SCSISEQ0 {
  1390. address 0x03A
  1391. access_mode RW
  1392. modes M_DFF0, M_DFF1, M_SCSI
  1393. field TEMODEO 0x80
  1394. field ENSELO 0x40
  1395. field ENARBO 0x20
  1396. field FORCEBUSFREE 0x10
  1397. field SCSIRSTO 0x01
  1398. }
  1399. /*
  1400. * SCSI RAM BIST 1
  1401. */
  1402. register SCSBIST1 {
  1403. address 0x03A
  1404. access_mode RW
  1405. modes M_CFG
  1406. field NTBISTERR 0x04
  1407. field NTBISTDONE 0x02
  1408. field NTBISTRUN 0x01
  1409. }
  1410. /*
  1411. * SCSI Sequence Control 1
  1412. */
  1413. register SCSISEQ1 {
  1414. address 0x03B
  1415. access_mode RW
  1416. modes M_DFF0, M_DFF1, M_SCSI
  1417. field MANUALCTL 0x40
  1418. field ENSELI 0x20
  1419. field ENRSELI 0x10
  1420. field MANUALP 0x0C
  1421. field ENAUTOATNP 0x02
  1422. field ALTSTIM 0x01
  1423. }
  1424. /*
  1425. * SCSI Transfer Control 0
  1426. */
  1427. register SXFRCTL0 {
  1428. address 0x03C
  1429. access_mode RW
  1430. modes M_SCSI
  1431. field DFON 0x80
  1432. field DFPEXP 0x40
  1433. field BIOSCANCELEN 0x10
  1434. field SPIOEN 0x08
  1435. }
  1436. /*
  1437. * SCSI Transfer Control 1
  1438. */
  1439. register SXFRCTL1 {
  1440. address 0x03D
  1441. access_mode RW
  1442. modes M_SCSI
  1443. field BITBUCKET 0x80
  1444. field ENSACHK 0x40
  1445. field ENSPCHK 0x20
  1446. field STIMESEL 0x18
  1447. field ENSTIMER 0x04
  1448. field ACTNEGEN 0x02
  1449. field STPWEN 0x01
  1450. }
  1451. /*
  1452. * SCSI Transfer Control 2
  1453. */
  1454. register SXFRCTL2 {
  1455. address 0x03E
  1456. access_mode RW
  1457. modes M_SCSI
  1458. field AUTORSTDIS 0x10
  1459. field CMDDMAEN 0x08
  1460. field ASU 0x07
  1461. }
  1462. /*
  1463. * SCSI Bus Initiator IDs
  1464. * Bitmask of observed initiators on the bus.
  1465. */
  1466. register BUSINITID {
  1467. address 0x03C
  1468. access_mode RW
  1469. modes M_CFG
  1470. size 2
  1471. }
  1472. /*
  1473. * Data Length Counters
  1474. * Packet byte counter.
  1475. */
  1476. register DLCOUNT {
  1477. address 0x03C
  1478. access_mode RW
  1479. modes M_DFF0, M_DFF1
  1480. size 3
  1481. }
  1482. /*
  1483. * Data FIFO Status
  1484. */
  1485. register DFFSTAT {
  1486. address 0x03F
  1487. access_mode RW
  1488. modes M_SCSI
  1489. field FIFO1FREE 0x20
  1490. field FIFO0FREE 0x10
  1491. /*
  1492. * On the B, this enum only works
  1493. * in the read direction. For writes,
  1494. * you must use the B version of the
  1495. * CURRFIFO_0 definition which is defined
  1496. * as a constant outside of this register
  1497. * definition to avoid confusing the
  1498. * register pretty printing code.
  1499. */
  1500. enum CURRFIFO 0x03 {
  1501. CURRFIFO_0,
  1502. CURRFIFO_1,
  1503. CURRFIFO_NONE 0x3
  1504. }
  1505. }
  1506. const B_CURRFIFO_0 0x2
  1507. /*
  1508. * SCSI Bus Target IDs
  1509. * Bitmask of observed targets on the bus.
  1510. */
  1511. register BUSTARGID {
  1512. address 0x03E
  1513. access_mode RW
  1514. modes M_CFG
  1515. size 2
  1516. }
  1517. /*
  1518. * SCSI Control Signal Out
  1519. */
  1520. register SCSISIGO {
  1521. address 0x040
  1522. access_mode RW
  1523. modes M_DFF0, M_DFF1, M_SCSI
  1524. field CDO 0x80
  1525. field IOO 0x40
  1526. field MSGO 0x20
  1527. field ATNO 0x10
  1528. field SELO 0x08
  1529. field BSYO 0x04
  1530. field REQO 0x02
  1531. field ACKO 0x01
  1532. /*
  1533. * Possible phases to write into SCSISIG0
  1534. */
  1535. enum PHASE_MASK CDO|IOO|MSGO {
  1536. P_DATAOUT 0x0,
  1537. P_DATAIN IOO,
  1538. P_DATAOUT_DT P_DATAOUT|MSGO,
  1539. P_DATAIN_DT P_DATAIN|MSGO,
  1540. P_COMMAND CDO,
  1541. P_MESGOUT CDO|MSGO,
  1542. P_STATUS CDO|IOO,
  1543. P_MESGIN CDO|IOO|MSGO
  1544. }
  1545. }
  1546. register SCSISIGI {
  1547. address 0x041
  1548. access_mode RO
  1549. modes M_DFF0, M_DFF1, M_SCSI
  1550. field CDI 0x80
  1551. field IOI 0x40
  1552. field MSGI 0x20
  1553. field ATNI 0x10
  1554. field SELI 0x08
  1555. field BSYI 0x04
  1556. field REQI 0x02
  1557. field ACKI 0x01
  1558. /*
  1559. * Possible phases in SCSISIGI
  1560. */
  1561. enum PHASE_MASK CDO|IOO|MSGO {
  1562. P_DATAOUT 0x0,
  1563. P_DATAIN IOO,
  1564. P_DATAOUT_DT P_DATAOUT|MSGO,
  1565. P_DATAIN_DT P_DATAIN|MSGO,
  1566. P_COMMAND CDO,
  1567. P_MESGOUT CDO|MSGO,
  1568. P_STATUS CDO|IOO,
  1569. P_MESGIN CDO|IOO|MSGO
  1570. }
  1571. }
  1572. /*
  1573. * Multiple Target IDs
  1574. * Bitmask of ids to respond as a target.
  1575. */
  1576. register MULTARGID {
  1577. address 0x040
  1578. access_mode RW
  1579. modes M_CFG
  1580. size 2
  1581. }
  1582. /*
  1583. * SCSI Phase
  1584. */
  1585. register SCSIPHASE {
  1586. address 0x042
  1587. access_mode RO
  1588. modes M_DFF0, M_DFF1, M_SCSI
  1589. field STATUS_PHASE 0x20
  1590. field COMMAND_PHASE 0x10
  1591. field MSG_IN_PHASE 0x08
  1592. field MSG_OUT_PHASE 0x04
  1593. field DATA_PHASE_MASK 0x03 {
  1594. DATA_OUT_PHASE 0x01,
  1595. DATA_IN_PHASE 0x02
  1596. }
  1597. }
  1598. /*
  1599. * SCSI Data 0 Image
  1600. */
  1601. register SCSIDAT0_IMG {
  1602. address 0x043
  1603. access_mode RW
  1604. modes M_DFF0, M_DFF1, M_SCSI
  1605. }
  1606. /*
  1607. * SCSI Latched Data
  1608. */
  1609. register SCSIDAT {
  1610. address 0x044
  1611. access_mode RW
  1612. modes M_DFF0, M_DFF1, M_SCSI
  1613. size 2
  1614. }
  1615. /*
  1616. * SCSI Data Bus
  1617. */
  1618. register SCSIBUS {
  1619. address 0x046
  1620. access_mode RW
  1621. modes M_DFF0, M_DFF1, M_SCSI
  1622. size 2
  1623. }
  1624. /*
  1625. * Target ID In
  1626. */
  1627. register TARGIDIN {
  1628. address 0x048
  1629. access_mode RO
  1630. modes M_DFF0, M_DFF1, M_SCSI
  1631. field CLKOUT 0x80
  1632. field TARGID 0x0F
  1633. }
  1634. /*
  1635. * Selection/Reselection ID
  1636. * Upper four bits are the device id. The ONEBIT is set when the re/selecting
  1637. * device did not set its own ID.
  1638. */
  1639. register SELID {
  1640. address 0x049
  1641. access_mode RW
  1642. modes M_DFF0, M_DFF1, M_SCSI
  1643. field SELID_MASK 0xf0
  1644. field ONEBIT 0x08
  1645. }
  1646. /*
  1647. * SCSI Block Control
  1648. * Controls Bus type and channel selection. SELWIDE allows for the
  1649. * coexistence of 8bit and 16bit devices on a wide bus.
  1650. */
  1651. register SBLKCTL {
  1652. address 0x04A
  1653. access_mode RW
  1654. modes M_DFF0, M_DFF1, M_SCSI
  1655. field DIAGLEDEN 0x80
  1656. field DIAGLEDON 0x40
  1657. field ENAB40 0x08 /* LVD transceiver active */
  1658. field ENAB20 0x04 /* SE/HVD transceiver active */
  1659. field SELWIDE 0x02
  1660. }
  1661. /*
  1662. * Option Mode
  1663. */
  1664. register OPTIONMODE {
  1665. address 0x04A
  1666. access_mode RW
  1667. modes M_CFG
  1668. field BIOSCANCTL 0x80
  1669. field AUTOACKEN 0x40
  1670. field BIASCANCTL 0x20
  1671. field BUSFREEREV 0x10
  1672. field ENDGFORMCHK 0x04
  1673. field AUTO_MSGOUT_DE 0x02
  1674. mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE
  1675. }
  1676. /*
  1677. * SCSI Status 0
  1678. */
  1679. register SSTAT0 {
  1680. address 0x04B
  1681. access_mode RO
  1682. modes M_DFF0, M_DFF1, M_SCSI
  1683. field TARGET 0x80 /* Board acting as target */
  1684. field SELDO 0x40 /* Selection Done */
  1685. field SELDI 0x20 /* Board has been selected */
  1686. field SELINGO 0x10 /* Selection In Progress */
  1687. field IOERR 0x08 /* LVD Tranceiver mode changed */
  1688. field OVERRUN 0x04 /* SCSI Offset overrun detected */
  1689. field SPIORDY 0x02 /* SCSI PIO Ready */
  1690. field ARBDO 0x01 /* Arbitration Done Out */
  1691. }
  1692. /*
  1693. * Clear SCSI Interrupt 0
  1694. * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
  1695. */
  1696. register CLRSINT0 {
  1697. address 0x04B
  1698. access_mode WO
  1699. modes M_DFF0, M_DFF1, M_SCSI
  1700. field CLRSELDO 0x40
  1701. field CLRSELDI 0x20
  1702. field CLRSELINGO 0x10
  1703. field CLRIOERR 0x08
  1704. field CLROVERRUN 0x04
  1705. field CLRSPIORDY 0x02
  1706. field CLRARBDO 0x01
  1707. }
  1708. /*
  1709. * SCSI Interrupt Mode 0
  1710. * Setting any bit will enable the corresponding function
  1711. * in SIMODE0 to interrupt via the IRQ pin.
  1712. */
  1713. register SIMODE0 {
  1714. address 0x04B
  1715. access_mode RW
  1716. modes M_CFG
  1717. field ENSELDO 0x40
  1718. field ENSELDI 0x20
  1719. field ENSELINGO 0x10
  1720. field ENIOERR 0x08
  1721. field ENOVERRUN 0x04
  1722. field ENSPIORDY 0x02
  1723. field ENARBDO 0x01
  1724. }
  1725. /*
  1726. * SCSI Status 1
  1727. */
  1728. register SSTAT1 {
  1729. address 0x04C
  1730. access_mode RO
  1731. modes M_DFF0, M_DFF1, M_SCSI
  1732. field SELTO 0x80
  1733. field ATNTARG 0x40
  1734. field SCSIRSTI 0x20
  1735. field PHASEMIS 0x10
  1736. field BUSFREE 0x08
  1737. field SCSIPERR 0x04
  1738. field STRB2FAST 0x02
  1739. field REQINIT 0x01
  1740. }
  1741. /*
  1742. * Clear SCSI Interrupt 1
  1743. * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
  1744. */
  1745. register CLRSINT1 {
  1746. address 0x04C
  1747. access_mode WO
  1748. modes M_DFF0, M_DFF1, M_SCSI
  1749. field CLRSELTIMEO 0x80
  1750. field CLRATNO 0x40
  1751. field CLRSCSIRSTI 0x20
  1752. field CLRBUSFREE 0x08
  1753. field CLRSCSIPERR 0x04
  1754. field CLRSTRB2FAST 0x02
  1755. field CLRREQINIT 0x01
  1756. }
  1757. /*
  1758. * SCSI Status 2
  1759. */
  1760. register SSTAT2 {
  1761. address 0x04d
  1762. access_mode RO
  1763. modes M_DFF0, M_DFF1, M_SCSI
  1764. field BUSFREETIME 0xc0 {
  1765. BUSFREE_LQO 0x40,
  1766. BUSFREE_DFF0 0x80,
  1767. BUSFREE_DFF1 0xC0
  1768. }
  1769. field NONPACKREQ 0x20
  1770. field EXP_ACTIVE 0x10 /* SCSI Expander Active */
  1771. field BSYX 0x08 /* Busy Expander */
  1772. field WIDE_RES 0x04 /* Modes 0 and 1 only */
  1773. field SDONE 0x02 /* Modes 0 and 1 only */
  1774. field DMADONE 0x01 /* Modes 0 and 1 only */
  1775. }
  1776. /*
  1777. * Clear SCSI Interrupt 2
  1778. */
  1779. register CLRSINT2 {
  1780. address 0x04D
  1781. access_mode WO
  1782. modes M_DFF0, M_DFF1, M_SCSI
  1783. field CLRNONPACKREQ 0x20
  1784. field CLRWIDE_RES 0x04 /* Modes 0 and 1 only */
  1785. field CLRSDONE 0x02 /* Modes 0 and 1 only */
  1786. field CLRDMADONE 0x01 /* Modes 0 and 1 only */
  1787. }
  1788. /*
  1789. * SCSI Interrupt Mode 2
  1790. */
  1791. register SIMODE2 {
  1792. address 0x04D
  1793. access_mode RW
  1794. modes M_CFG
  1795. field ENWIDE_RES 0x04
  1796. field ENSDONE 0x02
  1797. field ENDMADONE 0x01
  1798. }
  1799. /*
  1800. * Physical Error Diagnosis
  1801. */
  1802. register PERRDIAG {
  1803. address 0x04E
  1804. access_mode RO
  1805. modes M_DFF0, M_DFF1, M_SCSI
  1806. field HIZERO 0x80
  1807. field HIPERR 0x40
  1808. field PREVPHASE 0x20
  1809. field PARITYERR 0x10
  1810. field AIPERR 0x08
  1811. field CRCERR 0x04
  1812. field DGFORMERR 0x02
  1813. field DTERR 0x01
  1814. }
  1815. /*
  1816. * LQI Manager Current State
  1817. */
  1818. register LQISTATE {
  1819. address 0x04E
  1820. access_mode RO
  1821. modes M_CFG
  1822. }
  1823. /*
  1824. * SCSI Offset Count
  1825. */
  1826. register SOFFCNT {
  1827. address 0x04F
  1828. access_mode RO
  1829. modes M_DFF0, M_DFF1, M_SCSI
  1830. }
  1831. /*
  1832. * LQO Manager Current State
  1833. */
  1834. register LQOSTATE {
  1835. address 0x04F
  1836. access_mode RO
  1837. modes M_CFG
  1838. }
  1839. /*
  1840. * LQI Manager Status
  1841. */
  1842. register LQISTAT0 {
  1843. address 0x050
  1844. access_mode RO
  1845. modes M_DFF0, M_DFF1, M_SCSI
  1846. field LQIATNQAS 0x20
  1847. field LQICRCT1 0x10
  1848. field LQICRCT2 0x08
  1849. field LQIBADLQT 0x04
  1850. field LQIATNLQ 0x02
  1851. field LQIATNCMD 0x01
  1852. }
  1853. /*
  1854. * Clear LQI Interrupts 0
  1855. */
  1856. register CLRLQIINT0 {
  1857. address 0x050
  1858. access_mode WO
  1859. modes M_DFF0, M_DFF1, M_SCSI
  1860. field CLRLQIATNQAS 0x20
  1861. field CLRLQICRCT1 0x10
  1862. field CLRLQICRCT2 0x08
  1863. field CLRLQIBADLQT 0x04
  1864. field CLRLQIATNLQ 0x02
  1865. field CLRLQIATNCMD 0x01
  1866. }
  1867. /*
  1868. * LQI Manager Interrupt Mode 0
  1869. */
  1870. register LQIMODE0 {
  1871. address 0x050
  1872. access_mode RW
  1873. modes M_CFG
  1874. field ENLQIATNQASK 0x20
  1875. field ENLQICRCT1 0x10
  1876. field ENLQICRCT2 0x08
  1877. field ENLQIBADLQT 0x04
  1878. field ENLQIATNLQ 0x02
  1879. field ENLQIATNCMD 0x01
  1880. }
  1881. /*
  1882. * LQI Manager Status 1
  1883. */
  1884. register LQISTAT1 {
  1885. address 0x051
  1886. access_mode RO
  1887. modes M_DFF0, M_DFF1, M_SCSI
  1888. field LQIPHASE_LQ 0x80
  1889. field LQIPHASE_NLQ 0x40
  1890. field LQIABORT 0x20
  1891. field LQICRCI_LQ 0x10
  1892. field LQICRCI_NLQ 0x08
  1893. field LQIBADLQI 0x04
  1894. field LQIOVERI_LQ 0x02
  1895. field LQIOVERI_NLQ 0x01
  1896. }
  1897. /*
  1898. * Clear LQI Manager Interrupts1
  1899. */
  1900. register CLRLQIINT1 {
  1901. address 0x051
  1902. access_mode WO
  1903. modes M_DFF0, M_DFF1, M_SCSI
  1904. field CLRLQIPHASE_LQ 0x80
  1905. field CLRLQIPHASE_NLQ 0x40
  1906. field CLRLIQABORT 0x20
  1907. field CLRLQICRCI_LQ 0x10
  1908. field CLRLQICRCI_NLQ 0x08
  1909. field CLRLQIBADLQI 0x04
  1910. field CLRLQIOVERI_LQ 0x02
  1911. field CLRLQIOVERI_NLQ 0x01
  1912. }
  1913. /*
  1914. * LQI Manager Interrupt Mode 1
  1915. */
  1916. register LQIMODE1 {
  1917. address 0x051
  1918. access_mode RW
  1919. modes M_CFG
  1920. field ENLQIPHASE_LQ 0x80 /* LQIPHASE1 */
  1921. field ENLQIPHASE_NLQ 0x40 /* LQIPHASE2 */
  1922. field ENLIQABORT 0x20
  1923. field ENLQICRCI_LQ 0x10 /* LQICRCI1 */
  1924. field ENLQICRCI_NLQ 0x08 /* LQICRCI2 */
  1925. field ENLQIBADLQI 0x04
  1926. field ENLQIOVERI_LQ 0x02 /* LQIOVERI1 */
  1927. field ENLQIOVERI_NLQ 0x01 /* LQIOVERI2 */
  1928. }
  1929. /*
  1930. * LQI Manager Status 2
  1931. */
  1932. register LQISTAT2 {
  1933. address 0x052
  1934. access_mode RO
  1935. modes M_DFF0, M_DFF1, M_SCSI
  1936. field PACKETIZED 0x80
  1937. field LQIPHASE_OUTPKT 0x40
  1938. field LQIWORKONLQ 0x20
  1939. field LQIWAITFIFO 0x10
  1940. field LQISTOPPKT 0x08
  1941. field LQISTOPLQ 0x04
  1942. field LQISTOPCMD 0x02
  1943. field LQIGSAVAIL 0x01
  1944. }
  1945. /*
  1946. * SCSI Status 3
  1947. */
  1948. register SSTAT3 {
  1949. address 0x053
  1950. access_mode RO
  1951. modes M_DFF0, M_DFF1, M_SCSI
  1952. field NTRAMPERR 0x02
  1953. field OSRAMPERR 0x01
  1954. }
  1955. /*
  1956. * Clear SCSI Status 3
  1957. */
  1958. register CLRSINT3 {
  1959. address 0x053
  1960. access_mode WO
  1961. modes M_DFF0, M_DFF1, M_SCSI
  1962. field CLRNTRAMPERR 0x02
  1963. field CLROSRAMPERR 0x01
  1964. }
  1965. /*
  1966. * SCSI Interrupt Mode 3
  1967. */
  1968. register SIMODE3 {
  1969. address 0x053
  1970. access_mode RW
  1971. modes M_CFG
  1972. field ENNTRAMPERR 0x02
  1973. field ENOSRAMPERR 0x01
  1974. }
  1975. /*
  1976. * LQO Manager Status 0
  1977. */
  1978. register LQOSTAT0 {
  1979. address 0x054
  1980. access_mode RO
  1981. modes M_DFF0, M_DFF1, M_SCSI
  1982. field LQOTARGSCBPERR 0x10
  1983. field LQOSTOPT2 0x08
  1984. field LQOATNLQ 0x04
  1985. field LQOATNPKT 0x02
  1986. field LQOTCRC 0x01
  1987. }
  1988. /*
  1989. * Clear LQO Manager interrupt 0
  1990. */
  1991. register CLRLQOINT0 {
  1992. address 0x054
  1993. access_mode WO
  1994. modes M_DFF0, M_DFF1, M_SCSI
  1995. field CLRLQOTARGSCBPERR 0x10
  1996. field CLRLQOSTOPT2 0x08
  1997. field CLRLQOATNLQ 0x04
  1998. field CLRLQOATNPKT 0x02
  1999. field CLRLQOTCRC 0x01
  2000. }
  2001. /*
  2002. * LQO Manager Interrupt Mode 0
  2003. */
  2004. register LQOMODE0 {
  2005. address 0x054
  2006. access_mode RW
  2007. modes M_CFG
  2008. field ENLQOTARGSCBPERR 0x10
  2009. field ENLQOSTOPT2 0x08
  2010. field ENLQOATNLQ 0x04
  2011. field ENLQOATNPKT 0x02
  2012. field ENLQOTCRC 0x01
  2013. }
  2014. /*
  2015. * LQO Manager Status 1
  2016. */
  2017. register LQOSTAT1 {
  2018. address 0x055
  2019. access_mode RO
  2020. modes M_DFF0, M_DFF1, M_SCSI
  2021. field LQOINITSCBPERR 0x10
  2022. field LQOSTOPI2 0x08
  2023. field LQOBADQAS 0x04
  2024. field LQOBUSFREE 0x02
  2025. field LQOPHACHGINPKT 0x01
  2026. }
  2027. /*
  2028. * Clear LOQ Interrupt 1
  2029. */
  2030. register CLRLQOINT1 {
  2031. address 0x055
  2032. access_mode WO
  2033. modes M_DFF0, M_DFF1, M_SCSI
  2034. field CLRLQOINITSCBPERR 0x10
  2035. field CLRLQOSTOPI2 0x08
  2036. field CLRLQOBADQAS 0x04
  2037. field CLRLQOBUSFREE 0x02
  2038. field CLRLQOPHACHGINPKT 0x01
  2039. }
  2040. /*
  2041. * LQO Manager Interrupt Mode 1
  2042. */
  2043. register LQOMODE1 {
  2044. address 0x055
  2045. access_mode RW
  2046. modes M_CFG
  2047. field ENLQOINITSCBPERR 0x10
  2048. field ENLQOSTOPI2 0x08
  2049. field ENLQOBADQAS 0x04
  2050. field ENLQOBUSFREE 0x02
  2051. field ENLQOPHACHGINPKT 0x01
  2052. }
  2053. /*
  2054. * LQO Manager Status 2
  2055. */
  2056. register LQOSTAT2 {
  2057. address 0x056
  2058. access_mode RO
  2059. modes M_DFF0, M_DFF1, M_SCSI
  2060. field LQOPKT 0xE0
  2061. field LQOWAITFIFO 0x10
  2062. field LQOPHACHGOUTPKT 0x02 /* outside of packet boundaries. */
  2063. field LQOSTOP0 0x01 /* Stopped after sending all packets */
  2064. }
  2065. /*
  2066. * Output Synchronizer Space Count
  2067. */
  2068. register OS_SPACE_CNT {
  2069. address 0x056
  2070. access_mode RO
  2071. modes M_CFG
  2072. }
  2073. /*
  2074. * SCSI Interrupt Mode 1
  2075. * Setting any bit will enable the corresponding function
  2076. * in SIMODE1 to interrupt via the IRQ pin.
  2077. */
  2078. register SIMODE1 {
  2079. address 0x057
  2080. access_mode RW
  2081. modes M_DFF0, M_DFF1, M_SCSI
  2082. field ENSELTIMO 0x80
  2083. field ENATNTARG 0x40
  2084. field ENSCSIRST 0x20
  2085. field ENPHASEMIS 0x10
  2086. field ENBUSFREE 0x08
  2087. field ENSCSIPERR 0x04
  2088. field ENSTRB2FAST 0x02
  2089. field ENREQINIT 0x01
  2090. }
  2091. /*
  2092. * Good Status FIFO
  2093. */
  2094. register GSFIFO {
  2095. address 0x058
  2096. access_mode RO
  2097. size 2
  2098. modes M_DFF0, M_DFF1, M_SCSI
  2099. }
  2100. /*
  2101. * Data FIFO SCSI Transfer Control
  2102. */
  2103. register DFFSXFRCTL {
  2104. address 0x05A
  2105. access_mode RW
  2106. modes M_DFF0, M_DFF1
  2107. field DFFBITBUCKET 0x08
  2108. field CLRSHCNT 0x04
  2109. field CLRCHN 0x02
  2110. field RSTCHN 0x01
  2111. }
  2112. /*
  2113. * Next SCSI Control Block
  2114. */
  2115. register NEXTSCB {
  2116. address 0x05A
  2117. access_mode RW
  2118. size 2
  2119. modes M_SCSI
  2120. }
  2121. /* Rev B only. */
  2122. register LQOSCSCTL {
  2123. address 0x05A
  2124. access_mode RW
  2125. size 1
  2126. modes M_CFG
  2127. field LQOH2A_VERSION 0x80
  2128. field LQONOCHKOVER 0x01
  2129. }
  2130. /*
  2131. * SEQ Interrupts
  2132. */
  2133. register SEQINTSRC {
  2134. address 0x05B
  2135. access_mode RO
  2136. modes M_DFF0, M_DFF1
  2137. field CTXTDONE 0x40
  2138. field SAVEPTRS 0x20
  2139. field CFG4DATA 0x10
  2140. field CFG4ISTAT 0x08
  2141. field CFG4TSTAT 0x04
  2142. field CFG4ICMD 0x02
  2143. field CFG4TCMD 0x01
  2144. }
  2145. /*
  2146. * Clear Arp Interrupts
  2147. */
  2148. register CLRSEQINTSRC {
  2149. address 0x05B
  2150. access_mode WO
  2151. modes M_DFF0, M_DFF1
  2152. field CLRCTXTDONE 0x40
  2153. field CLRSAVEPTRS 0x20
  2154. field CLRCFG4DATA 0x10
  2155. field CLRCFG4ISTAT 0x08
  2156. field CLRCFG4TSTAT 0x04
  2157. field CLRCFG4ICMD 0x02
  2158. field CLRCFG4TCMD 0x01
  2159. }
  2160. /*
  2161. * SEQ Interrupt Enabled (Shared)
  2162. */
  2163. register SEQIMODE {
  2164. address 0x05C
  2165. access_mode RW
  2166. modes M_DFF0, M_DFF1
  2167. field ENCTXTDONE 0x40
  2168. field ENSAVEPTRS 0x20
  2169. field ENCFG4DATA 0x10
  2170. field ENCFG4ISTAT 0x08
  2171. field ENCFG4TSTAT 0x04
  2172. field ENCFG4ICMD 0x02
  2173. field ENCFG4TCMD 0x01
  2174. }
  2175. /*
  2176. * Current SCSI Control Block
  2177. */
  2178. register CURRSCB {
  2179. address 0x05C
  2180. access_mode RW
  2181. size 2
  2182. modes M_SCSI
  2183. }
  2184. /*
  2185. * Data FIFO Status
  2186. */
  2187. register MDFFSTAT {
  2188. address 0x05D
  2189. access_mode RO
  2190. modes M_DFF0, M_DFF1
  2191. field SHCNTNEGATIVE 0x40 /* Rev B or higher */
  2192. field SHCNTMINUS1 0x20 /* Rev B or higher */
  2193. field LASTSDONE 0x10
  2194. field SHVALID 0x08
  2195. field DLZERO 0x04 /* FIFO data ends on packet boundary. */
  2196. field DATAINFIFO 0x02
  2197. field FIFOFREE 0x01
  2198. }
  2199. /*
  2200. * CRC Control
  2201. */
  2202. register CRCCONTROL {
  2203. address 0x05d
  2204. access_mode RW
  2205. modes M_CFG
  2206. field CRCVALCHKEN 0x40
  2207. }
  2208. /*
  2209. * SCSI Test Control
  2210. */
  2211. register SCSITEST {
  2212. address 0x05E
  2213. access_mode RW
  2214. modes M_CFG
  2215. field CNTRTEST 0x08
  2216. field SEL_TXPLL_DEBUG 0x04
  2217. }
  2218. /*
  2219. * Data FIFO Queue Tag
  2220. */
  2221. register DFFTAG {
  2222. address 0x05E
  2223. access_mode RW
  2224. size 2
  2225. modes M_DFF0, M_DFF1
  2226. }
  2227. /*
  2228. * Last SCSI Control Block
  2229. */
  2230. register LASTSCB {
  2231. address 0x05E
  2232. access_mode RW
  2233. size 2
  2234. modes M_SCSI
  2235. }
  2236. /*
  2237. * SCSI I/O Cell Power-down Control
  2238. */
  2239. register IOPDNCTL {
  2240. address 0x05F
  2241. access_mode RW
  2242. modes M_CFG
  2243. field DISABLE_OE 0x80
  2244. field PDN_IDIST 0x04
  2245. field PDN_DIFFSENSE 0x01
  2246. }
  2247. /*
  2248. * Shaddow Host Address.
  2249. */
  2250. register SHADDR {
  2251. address 0x060
  2252. access_mode RO
  2253. size 8
  2254. modes M_DFF0, M_DFF1
  2255. }
  2256. /*
  2257. * Data Group CRC Interval.
  2258. */
  2259. register DGRPCRCI {
  2260. address 0x060
  2261. access_mode RW
  2262. size 2
  2263. modes M_CFG
  2264. }
  2265. /*
  2266. * Data Transfer Negotiation Address
  2267. */
  2268. register NEGOADDR {
  2269. address 0x060
  2270. access_mode RW
  2271. modes M_SCSI
  2272. }
  2273. /*
  2274. * Data Transfer Negotiation Data - Period Byte
  2275. */
  2276. register NEGPERIOD {
  2277. address 0x061
  2278. access_mode RW
  2279. modes M_SCSI
  2280. }
  2281. /*
  2282. * Packetized CRC Interval
  2283. */
  2284. register PACKCRCI {
  2285. address 0x062
  2286. access_mode RW
  2287. size 2
  2288. modes M_CFG
  2289. }
  2290. /*
  2291. * Data Transfer Negotiation Data - Offset Byte
  2292. */
  2293. register NEGOFFSET {
  2294. address 0x062
  2295. access_mode RW
  2296. modes M_SCSI
  2297. }
  2298. /*
  2299. * Data Transfer Negotiation Data - PPR Options
  2300. */
  2301. register NEGPPROPTS {
  2302. address 0x063
  2303. access_mode RW
  2304. modes M_SCSI
  2305. field PPROPT_PACE 0x08
  2306. field PPROPT_QAS 0x04
  2307. field PPROPT_DT 0x02
  2308. field PPROPT_IUT 0x01
  2309. }
  2310. /*
  2311. * Data Transfer Negotiation Data - Connection Options
  2312. */
  2313. register NEGCONOPTS {
  2314. address 0x064
  2315. access_mode RW
  2316. modes M_SCSI
  2317. field ENSNAPSHOT 0x40
  2318. field RTI_WRTDIS 0x20
  2319. field RTI_OVRDTRN 0x10
  2320. field ENSLOWCRC 0x08
  2321. field ENAUTOATNI 0x04
  2322. field ENAUTOATNO 0x02
  2323. field WIDEXFER 0x01
  2324. }
  2325. /*
  2326. * Negotiation Table Annex Column Index.
  2327. */
  2328. register ANNEXCOL {
  2329. address 0x065
  2330. access_mode RW
  2331. modes M_SCSI
  2332. }
  2333. register SCSCHKN {
  2334. address 0x066
  2335. access_mode RW
  2336. modes M_CFG
  2337. field STSELSKIDDIS 0x40
  2338. field CURRFIFODEF 0x20
  2339. field WIDERESEN 0x10
  2340. field SDONEMSKDIS 0x08
  2341. field DFFACTCLR 0x04
  2342. field SHVALIDSTDIS 0x02
  2343. field LSTSGCLRDIS 0x01
  2344. }
  2345. const AHD_ANNEXCOL_PER_DEV0 4
  2346. const AHD_NUM_PER_DEV_ANNEXCOLS 4
  2347. const AHD_ANNEXCOL_PRECOMP_SLEW 4
  2348. const AHD_PRECOMP_MASK 0x07
  2349. const AHD_PRECOMP_SHIFT 0
  2350. const AHD_PRECOMP_CUTBACK_17 0x04
  2351. const AHD_PRECOMP_CUTBACK_29 0x06
  2352. const AHD_PRECOMP_CUTBACK_37 0x07
  2353. const AHD_SLEWRATE_MASK 0x78
  2354. const AHD_SLEWRATE_SHIFT 3
  2355. /*
  2356. * Rev A has only a single bit (high bit of field) of slew adjustment.
  2357. * Rev B has 4 bits. The current default happens to be the same for both.
  2358. */
  2359. const AHD_SLEWRATE_DEF_REVA 0x08
  2360. const AHD_SLEWRATE_DEF_REVB 0x08
  2361. /* Rev A does not have any amplitude setting. */
  2362. const AHD_ANNEXCOL_AMPLITUDE 6
  2363. const AHD_AMPLITUDE_MASK 0x7
  2364. const AHD_AMPLITUDE_SHIFT 0
  2365. const AHD_AMPLITUDE_DEF 0x7
  2366. /*
  2367. * Negotiation Table Annex Data Port.
  2368. */
  2369. register ANNEXDAT {
  2370. address 0x066
  2371. access_mode RW
  2372. modes M_SCSI
  2373. }
  2374. /*
  2375. * Initiator's Own Id.
  2376. * The SCSI ID to use for Selection Out and seen during a reselection..
  2377. */
  2378. register IOWNID {
  2379. address 0x067
  2380. access_mode RW
  2381. modes M_SCSI
  2382. }
  2383. /*
  2384. * 960MHz Phase-Locked Loop Control 0
  2385. */
  2386. register PLL960CTL0 {
  2387. address 0x068
  2388. access_mode RW
  2389. modes M_CFG
  2390. field PLL_VCOSEL 0x80
  2391. field PLL_PWDN 0x40
  2392. field PLL_NS 0x30
  2393. field PLL_ENLUD 0x08
  2394. field PLL_ENLPF 0x04
  2395. field PLL_DLPF 0x02
  2396. field PLL_ENFBM 0x01
  2397. }
  2398. /*
  2399. * Target Own Id
  2400. */
  2401. register TOWNID {
  2402. address 0x069
  2403. access_mode RW
  2404. modes M_SCSI
  2405. }
  2406. /*
  2407. * 960MHz Phase-Locked Loop Control 1
  2408. */
  2409. register PLL960CTL1 {
  2410. address 0x069
  2411. access_mode RW
  2412. modes M_CFG
  2413. field PLL_CNTEN 0x80
  2414. field PLL_CNTCLR 0x40
  2415. field PLL_RST 0x01
  2416. }
  2417. /*
  2418. * Expander Signature
  2419. */
  2420. register XSIG {
  2421. address 0x06A
  2422. access_mode RW
  2423. modes M_SCSI
  2424. }
  2425. /*
  2426. * Shadow Byte Count
  2427. */
  2428. register SHCNT {
  2429. address 0x068
  2430. access_mode RW
  2431. size 3
  2432. modes M_DFF0, M_DFF1
  2433. }
  2434. /*
  2435. * Selection Out ID
  2436. */
  2437. register SELOID {
  2438. address 0x06B
  2439. access_mode RW
  2440. modes M_SCSI
  2441. }
  2442. /*
  2443. * 960-MHz Phase-Locked Loop Test Count
  2444. */
  2445. register PLL960CNT0 {
  2446. address 0x06A
  2447. access_mode RO
  2448. size 2
  2449. modes M_CFG
  2450. }
  2451. /*
  2452. * 400-MHz Phase-Locked Loop Control 0
  2453. */
  2454. register PLL400CTL0 {
  2455. address 0x06C
  2456. access_mode RW
  2457. modes M_CFG
  2458. field PLL_VCOSEL 0x80
  2459. field PLL_PWDN 0x40
  2460. field PLL_NS 0x30
  2461. field PLL_ENLUD 0x08
  2462. field PLL_ENLPF 0x04
  2463. field PLL_DLPF 0x02
  2464. field PLL_ENFBM 0x01
  2465. }
  2466. /*
  2467. * Arbitration Fairness
  2468. */
  2469. register FAIRNESS {
  2470. address 0x06C
  2471. access_mode RW
  2472. size 2
  2473. modes M_SCSI
  2474. }
  2475. /*
  2476. * 400-MHz Phase-Locked Loop Control 1
  2477. */
  2478. register PLL400CTL1 {
  2479. address 0x06D
  2480. access_mode RW
  2481. modes M_CFG
  2482. field PLL_CNTEN 0x80
  2483. field PLL_CNTCLR 0x40
  2484. field PLL_RST 0x01
  2485. }
  2486. /*
  2487. * Arbitration Unfairness
  2488. */
  2489. register UNFAIRNESS {
  2490. address 0x06E
  2491. access_mode RW
  2492. size 2
  2493. modes M_SCSI
  2494. }
  2495. /*
  2496. * 400-MHz Phase-Locked Loop Test Count
  2497. */
  2498. register PLL400CNT0 {
  2499. address 0x06E
  2500. access_mode RO
  2501. size 2
  2502. modes M_CFG
  2503. }
  2504. /*
  2505. * SCB Page Pointer
  2506. */
  2507. register SCBPTR {
  2508. address 0x0A8
  2509. access_mode RW
  2510. size 2
  2511. modes M_DFF0, M_DFF1, M_CCHAN, M_SCSI
  2512. }
  2513. /*
  2514. * CMC SCB Array Count
  2515. * Number of bytes to transfer between CMC SCB memory and SCBRAM.
  2516. * Transfers must be 8byte aligned and sized.
  2517. */
  2518. register CCSCBACNT {
  2519. address 0x0AB
  2520. access_mode RW
  2521. modes M_CCHAN
  2522. }
  2523. /*
  2524. * SCB Autopointer
  2525. * SCB-Next Address Snooping logic. When an SCB is transferred to
  2526. * the card, the next SCB address to be used by the CMC array can
  2527. * be autoloaded from that transfer.
  2528. */
  2529. register SCBAUTOPTR {
  2530. address 0x0AB
  2531. access_mode RW
  2532. modes M_CFG
  2533. field AUSCBPTR_EN 0x80
  2534. field SCBPTR_ADDR 0x38
  2535. field SCBPTR_OFF 0x07
  2536. }
  2537. /*
  2538. * CMC SG Ram Address Pointer
  2539. */
  2540. register CCSGADDR {
  2541. address 0x0AC
  2542. access_mode RW
  2543. modes M_DFF0, M_DFF1
  2544. }
  2545. /*
  2546. * CMC SCB RAM Address Pointer
  2547. */
  2548. register CCSCBADDR {
  2549. address 0x0AC
  2550. access_mode RW
  2551. modes M_CCHAN
  2552. }
  2553. /*
  2554. * CMC SCB Ram Back-up Address Pointer
  2555. * Indicates the true stop location of transfers halted prior
  2556. * to SCBHCNT going to 0.
  2557. */
  2558. register CCSCBADR_BK {
  2559. address 0x0AC
  2560. access_mode RO
  2561. modes M_CFG
  2562. }
  2563. /*
  2564. * CMC SG Control
  2565. */
  2566. register CCSGCTL {
  2567. address 0x0AD
  2568. access_mode RW
  2569. modes M_DFF0, M_DFF1
  2570. field CCSGDONE 0x80
  2571. field SG_CACHE_AVAIL 0x10
  2572. field CCSGENACK 0x08
  2573. mask CCSGEN 0x0C
  2574. field SG_FETCH_REQ 0x02
  2575. field CCSGRESET 0x01
  2576. }
  2577. /*
  2578. * CMD SCB Control
  2579. */
  2580. register CCSCBCTL {
  2581. address 0x0AD
  2582. access_mode RW
  2583. modes M_CCHAN
  2584. field CCSCBDONE 0x80
  2585. field ARRDONE 0x40
  2586. field CCARREN 0x10
  2587. field CCSCBEN 0x08
  2588. field CCSCBDIR 0x04
  2589. field CCSCBRESET 0x01
  2590. }
  2591. /*
  2592. * CMC Ram BIST
  2593. */
  2594. register CMC_RAMBIST {
  2595. address 0x0AD
  2596. access_mode RW
  2597. modes M_CFG
  2598. field SG_ELEMENT_SIZE 0x80
  2599. field SCBRAMBIST_FAIL 0x40
  2600. field SG_BIST_FAIL 0x20
  2601. field SG_BIST_EN 0x10
  2602. field CMC_BUFFER_BIST_FAIL 0x02
  2603. field CMC_BUFFER_BIST_EN 0x01
  2604. }
  2605. /*
  2606. * CMC SG RAM Data Port
  2607. */
  2608. register CCSGRAM {
  2609. address 0x0B0
  2610. access_mode RW
  2611. modes M_DFF0, M_DFF1
  2612. }
  2613. /*
  2614. * CMC SCB RAM Data Port
  2615. */
  2616. register CCSCBRAM {
  2617. address 0x0B0
  2618. access_mode RW
  2619. modes M_CCHAN
  2620. }
  2621. /*
  2622. * Flex DMA Address.
  2623. */
  2624. register FLEXADR {
  2625. address 0x0B0
  2626. access_mode RW
  2627. size 3
  2628. modes M_SCSI
  2629. }
  2630. /*
  2631. * Flex DMA Byte Count
  2632. */
  2633. register FLEXCNT {
  2634. address 0x0B3
  2635. access_mode RW
  2636. size 2
  2637. modes M_SCSI
  2638. }
  2639. /*
  2640. * Flex DMA Status
  2641. */
  2642. register FLEXDMASTAT {
  2643. address 0x0B5
  2644. access_mode RW
  2645. modes M_SCSI
  2646. field FLEXDMAERR 0x02
  2647. field FLEXDMADONE 0x01
  2648. }
  2649. /*
  2650. * Flex DMA Data Port
  2651. */
  2652. register FLEXDATA {
  2653. address 0x0B6
  2654. access_mode RW
  2655. modes M_SCSI
  2656. }
  2657. /*
  2658. * Board Data
  2659. */
  2660. register BRDDAT {
  2661. address 0x0B8
  2662. access_mode RW
  2663. modes M_SCSI
  2664. }
  2665. /*
  2666. * Board Control
  2667. */
  2668. register BRDCTL {
  2669. address 0x0B9
  2670. access_mode RW
  2671. modes M_SCSI
  2672. field FLXARBACK 0x80
  2673. field FLXARBREQ 0x40
  2674. field BRDADDR 0x38
  2675. field BRDEN 0x04
  2676. field BRDRW 0x02
  2677. field BRDSTB 0x01
  2678. }
  2679. /*
  2680. * Serial EEPROM Address
  2681. */
  2682. register SEEADR {
  2683. address 0x0BA
  2684. access_mode RW
  2685. modes M_SCSI
  2686. }
  2687. /*
  2688. * Serial EEPROM Data
  2689. */
  2690. register SEEDAT {
  2691. address 0x0BC
  2692. access_mode RW
  2693. size 2
  2694. modes M_SCSI
  2695. }
  2696. /*
  2697. * Serial EEPROM Status
  2698. */
  2699. register SEESTAT {
  2700. address 0x0BE
  2701. access_mode RO
  2702. modes M_SCSI
  2703. field INIT_DONE 0x80
  2704. field SEEOPCODE 0x70
  2705. field LDALTID_L 0x08
  2706. field SEEARBACK 0x04
  2707. field SEEBUSY 0x02
  2708. field SEESTART 0x01
  2709. }
  2710. /*
  2711. * Serial EEPROM Control
  2712. */
  2713. register SEECTL {
  2714. address 0x0BE
  2715. access_mode RW
  2716. modes M_SCSI
  2717. field SEEOPCODE 0x70 {
  2718. SEEOP_ERASE 0x70,
  2719. SEEOP_READ 0x60,
  2720. SEEOP_WRITE 0x50,
  2721. /*
  2722. * The following four commands use special
  2723. * addresses for differentiation.
  2724. */
  2725. SEEOP_ERAL 0x40
  2726. }
  2727. mask SEEOP_EWEN 0x40
  2728. mask SEEOP_WALL 0x40
  2729. mask SEEOP_EWDS 0x40
  2730. field SEERST 0x02
  2731. field SEESTART 0x01
  2732. }
  2733. const SEEOP_ERAL_ADDR 0x80
  2734. const SEEOP_EWEN_ADDR 0xC0
  2735. const SEEOP_WRAL_ADDR 0x40
  2736. const SEEOP_EWDS_ADDR 0x00
  2737. /*
  2738. * SCB Counter
  2739. */
  2740. register SCBCNT {
  2741. address 0x0BF
  2742. access_mode RW
  2743. modes M_SCSI
  2744. }
  2745. /*
  2746. * Data FIFO Write Address
  2747. * Pointer to the next QWD location to be written to the data FIFO.
  2748. */
  2749. register DFWADDR {
  2750. address 0x0C0
  2751. access_mode RW
  2752. size 2
  2753. modes M_DFF0, M_DFF1
  2754. }
  2755. /*
  2756. * DSP Filter Control
  2757. */
  2758. register DSPFLTRCTL {
  2759. address 0x0C0
  2760. access_mode RW
  2761. modes M_CFG
  2762. field FLTRDISABLE 0x20
  2763. field EDGESENSE 0x10
  2764. field DSPFCNTSEL 0x0F
  2765. }
  2766. /*
  2767. * DSP Data Channel Control
  2768. */
  2769. register DSPDATACTL {
  2770. address 0x0C1
  2771. access_mode RW
  2772. modes M_CFG
  2773. field BYPASSENAB 0x80
  2774. field DESQDIS 0x10
  2775. field RCVROFFSTDIS 0x04
  2776. field XMITOFFSTDIS 0x02
  2777. }
  2778. /*
  2779. * Data FIFO Read Address
  2780. * Pointer to the next QWD location to be read from the data FIFO.
  2781. */
  2782. register DFRADDR {
  2783. address 0x0C2
  2784. access_mode RW
  2785. size 2
  2786. modes M_DFF0, M_DFF1
  2787. }
  2788. /*
  2789. * DSP REQ Control
  2790. */
  2791. register DSPREQCTL {
  2792. address 0x0C2
  2793. access_mode RW
  2794. modes M_CFG
  2795. field MANREQCTL 0xC0
  2796. field MANREQDLY 0x3F
  2797. }
  2798. /*
  2799. * DSP ACK Control
  2800. */
  2801. register DSPACKCTL {
  2802. address 0x0C3
  2803. access_mode RW
  2804. modes M_CFG
  2805. field MANACKCTL 0xC0
  2806. field MANACKDLY 0x3F
  2807. }
  2808. /*
  2809. * Data FIFO Data
  2810. * Read/Write byte port into the data FIFO. The read and write
  2811. * FIFO pointers increment with each read and write respectively
  2812. * to this port.
  2813. */
  2814. register DFDAT {
  2815. address 0x0C4
  2816. access_mode RW
  2817. modes M_DFF0, M_DFF1
  2818. }
  2819. /*
  2820. * DSP Channel Select
  2821. */
  2822. register DSPSELECT {
  2823. address 0x0C4
  2824. access_mode RW
  2825. modes M_CFG
  2826. field AUTOINCEN 0x80
  2827. field DSPSEL 0x1F
  2828. }
  2829. const NUMDSPS 0x14
  2830. /*
  2831. * Write Bias Control
  2832. */
  2833. register WRTBIASCTL {
  2834. address 0x0C5
  2835. access_mode WO
  2836. modes M_CFG
  2837. field AUTOXBCDIS 0x80
  2838. field XMITMANVAL 0x3F
  2839. }
  2840. /*
  2841. * Currently the WRTBIASCTL is the same as the default.
  2842. */
  2843. const WRTBIASCTL_HP_DEFAULT 0x0
  2844. /*
  2845. * Receiver Bias Control
  2846. */
  2847. register RCVRBIOSCTL {
  2848. address 0x0C6
  2849. access_mode WO
  2850. modes M_CFG
  2851. field AUTORBCDIS 0x80
  2852. field RCVRMANVAL 0x3F
  2853. }
  2854. /*
  2855. * Write Bias Calculator
  2856. */
  2857. register WRTBIASCALC {
  2858. address 0x0C7
  2859. access_mode RO
  2860. modes M_CFG
  2861. }
  2862. /*
  2863. * Data FIFO Pointers
  2864. * Contains the byte offset from DFWADDR and DWRADDR to the current
  2865. * FIFO write/read locations.
  2866. */
  2867. register DFPTRS {
  2868. address 0x0C8
  2869. access_mode RW
  2870. modes M_DFF0, M_DFF1
  2871. }
  2872. /*
  2873. * Receiver Bias Calculator
  2874. */
  2875. register RCVRBIASCALC {
  2876. address 0x0C8
  2877. access_mode RO
  2878. modes M_CFG
  2879. }
  2880. /*
  2881. * Data FIFO Backup Read Pointer
  2882. * Contains the data FIFO address to be restored if the last
  2883. * data accessed from the data FIFO was not transferred successfully.
  2884. */
  2885. register DFBKPTR {
  2886. address 0x0C9
  2887. access_mode RW
  2888. size 2
  2889. modes M_DFF0, M_DFF1
  2890. }
  2891. /*
  2892. * Skew Calculator
  2893. */
  2894. register SKEWCALC {
  2895. address 0x0C9
  2896. access_mode RO
  2897. modes M_CFG
  2898. }
  2899. /*
  2900. * Data FIFO Debug Control
  2901. */
  2902. register DFDBCTL {
  2903. address 0x0CB
  2904. access_mode RW
  2905. modes M_DFF0, M_DFF1
  2906. field DFF_CIO_WR_RDY 0x20
  2907. field DFF_CIO_RD_RDY 0x10
  2908. field DFF_DIR_ERR 0x08
  2909. field DFF_RAMBIST_FAIL 0x04
  2910. field DFF_RAMBIST_DONE 0x02
  2911. field DFF_RAMBIST_EN 0x01
  2912. }
  2913. /*
  2914. * Data FIFO Space Count
  2915. * Number of FIFO locations that are free.
  2916. */
  2917. register DFSCNT {
  2918. address 0x0CC
  2919. access_mode RO
  2920. size 2
  2921. modes M_DFF0, M_DFF1
  2922. }
  2923. /*
  2924. * Data FIFO Byte Count
  2925. * Number of filled FIFO locations.
  2926. */
  2927. register DFBCNT {
  2928. address 0x0CE
  2929. access_mode RO
  2930. size 2
  2931. modes M_DFF0, M_DFF1
  2932. }
  2933. /*
  2934. * Sequencer Program Overlay Address.
  2935. * Low address must be written prior to high address.
  2936. */
  2937. register OVLYADDR {
  2938. address 0x0D4
  2939. modes M_SCSI
  2940. size 2
  2941. access_mode RW
  2942. }
  2943. /*
  2944. * Sequencer Control 0
  2945. * Error detection mode, speed configuration,
  2946. * single step, breakpoints and program load.
  2947. */
  2948. register SEQCTL0 {
  2949. address 0x0D6
  2950. access_mode RW
  2951. field PERRORDIS 0x80
  2952. field PAUSEDIS 0x40
  2953. field FAILDIS 0x20
  2954. field FASTMODE 0x10
  2955. field BRKADRINTEN 0x08
  2956. field STEP 0x04
  2957. field SEQRESET 0x02
  2958. field LOADRAM 0x01
  2959. }
  2960. /*
  2961. * Sequencer Control 1
  2962. * Instruction RAM Diagnostics
  2963. */
  2964. register SEQCTL1 {
  2965. address 0x0D7
  2966. access_mode RW
  2967. field OVRLAY_DATA_CHK 0x08
  2968. field RAMBIST_DONE 0x04
  2969. field RAMBIST_FAIL 0x02
  2970. field RAMBIST_EN 0x01
  2971. }
  2972. /*
  2973. * Sequencer Flags
  2974. * Zero and Carry state of the ALU.
  2975. */
  2976. register FLAGS {
  2977. address 0x0D8
  2978. access_mode RO
  2979. field ZERO 0x02
  2980. field CARRY 0x01
  2981. }
  2982. /*
  2983. * Sequencer Interrupt Control
  2984. */
  2985. register SEQINTCTL {
  2986. address 0x0D9
  2987. access_mode RW
  2988. field INTVEC1DSL 0x80
  2989. field INT1_CONTEXT 0x20
  2990. field SCS_SEQ_INT1M1 0x10
  2991. field SCS_SEQ_INT1M0 0x08
  2992. field INTMASK2 0x04
  2993. field INTMASK1 0x02
  2994. field IRET 0x01
  2995. }
  2996. /*
  2997. * Sequencer RAM Data Port
  2998. * Single byte window into the Sequencer Instruction Ram area starting
  2999. * at the address specified by OVLYADDR. To write a full instruction word,
  3000. * simply write four bytes in succession. OVLYADDR will increment after the
  3001. * most significant instrution byte (the byte with the parity bit) is written.
  3002. */
  3003. register SEQRAM {
  3004. address 0x0DA
  3005. access_mode RW
  3006. }
  3007. /*
  3008. * Sequencer Program Counter
  3009. * Low byte must be written prior to high byte.
  3010. */
  3011. register PRGMCNT {
  3012. address 0x0DE
  3013. access_mode RW
  3014. size 2
  3015. }
  3016. /*
  3017. * Accumulator
  3018. */
  3019. register ACCUM {
  3020. address 0x0E0
  3021. access_mode RW
  3022. accumulator
  3023. }
  3024. /*
  3025. * Source Index Register
  3026. * Incrementing index for reads of SINDIR and the destination (low byte only)
  3027. * for any immediate operands passed in jmp, jc, jnc, call instructions.
  3028. * Example:
  3029. * mvi 0xFF call some_routine;
  3030. *
  3031. * Will set SINDEX[0] to 0xFF and call the routine "some_routine.
  3032. */
  3033. register SINDEX {
  3034. address 0x0E2
  3035. access_mode RW
  3036. size 2
  3037. sindex
  3038. }
  3039. /*
  3040. * Destination Index Register
  3041. * Incrementing index for writes to DINDIR. Can be used as a scratch register.
  3042. */
  3043. register DINDEX {
  3044. address 0x0E4
  3045. access_mode RW
  3046. size 2
  3047. }
  3048. /*
  3049. * Break Address
  3050. * Sequencer instruction breakpoint address address.
  3051. */
  3052. register BRKADDR0 {
  3053. address 0x0E6
  3054. access_mode RW
  3055. }
  3056. register BRKADDR1 {
  3057. address 0x0E6
  3058. access_mode RW
  3059. field BRKDIS 0x80 /* Disable Breakpoint */
  3060. }
  3061. /*
  3062. * All Ones
  3063. * All reads to this register return the value 0xFF.
  3064. */
  3065. register ALLONES {
  3066. address 0x0E8
  3067. access_mode RO
  3068. allones
  3069. }
  3070. /*
  3071. * All Zeros
  3072. * All reads to this register return the value 0.
  3073. */
  3074. register ALLZEROS {
  3075. address 0x0EA
  3076. access_mode RO
  3077. allzeros
  3078. }
  3079. /*
  3080. * No Destination
  3081. * Writes to this register have no effect.
  3082. */
  3083. register NONE {
  3084. address 0x0EA
  3085. access_mode WO
  3086. none
  3087. }
  3088. /*
  3089. * Source Index Indirect
  3090. * Reading this register is equivalent to reading (register_base + SINDEX) and
  3091. * incrementing SINDEX by 1.
  3092. */
  3093. register SINDIR {
  3094. address 0x0EC
  3095. access_mode RO
  3096. }
  3097. /*
  3098. * Destination Index Indirect
  3099. * Writing this register is equivalent to writing to (register_base + DINDEX)
  3100. * and incrementing DINDEX by 1.
  3101. */
  3102. register DINDIR {
  3103. address 0x0ED
  3104. access_mode WO
  3105. }
  3106. /*
  3107. * Function One
  3108. * 2's complement to bit value conversion. Write the 2's complement value
  3109. * (0-7 only) to the top nibble and retrieve the bit indexed by that value
  3110. * on the next read of this register.
  3111. * Example:
  3112. * Write 0x60
  3113. * Read 0x40
  3114. */
  3115. register FUNCTION1 {
  3116. address 0x0F0
  3117. access_mode RW
  3118. }
  3119. /*
  3120. * Stack
  3121. * Window into the stack. Each stack location is 10 bits wide reported
  3122. * low byte followed by high byte. There are 8 stack locations.
  3123. */
  3124. register STACK {
  3125. address 0x0F2
  3126. access_mode RW
  3127. }
  3128. /*
  3129. * Interrupt Vector 1 Address
  3130. * Interrupt branch address for SCS SEQ_INT1 mode 0 and 1 interrupts.
  3131. */
  3132. register INTVEC1_ADDR {
  3133. address 0x0F4
  3134. access_mode RW
  3135. size 2
  3136. modes M_CFG
  3137. }
  3138. /*
  3139. * Current Address
  3140. * Address of the SEQRAM instruction currently executing instruction.
  3141. */
  3142. register CURADDR {
  3143. address 0x0F4
  3144. access_mode RW
  3145. size 2
  3146. modes M_SCSI
  3147. }
  3148. /*
  3149. * Interrupt Vector 2 Address
  3150. * Interrupt branch address for HST_SEQ_INT2 interrupts.
  3151. */
  3152. register INTVEC2_ADDR {
  3153. address 0x0F6
  3154. access_mode RW
  3155. size 2
  3156. modes M_CFG
  3157. }
  3158. /*
  3159. * Last Address
  3160. * Address of the SEQRAM instruction executed prior to the current instruction.
  3161. */
  3162. register LASTADDR {
  3163. address 0x0F6
  3164. access_mode RW
  3165. size 2
  3166. modes M_SCSI
  3167. }
  3168. register AHD_PCI_CONFIG_BASE {
  3169. address 0x100
  3170. access_mode RW
  3171. size 256
  3172. modes M_CFG
  3173. }
  3174. /* ---------------------- Scratch RAM Offsets ------------------------- */
  3175. scratch_ram {
  3176. /* Mode Specific */
  3177. address 0x0A0
  3178. size 8
  3179. modes 0, 1, 2, 3
  3180. REG0 {
  3181. size 2
  3182. }
  3183. REG1 {
  3184. size 2
  3185. }
  3186. REG_ISR {
  3187. size 2
  3188. }
  3189. SG_STATE {
  3190. size 1
  3191. field SEGS_AVAIL 0x01
  3192. field LOADING_NEEDED 0x02
  3193. field FETCH_INPROG 0x04
  3194. }
  3195. /*
  3196. * Track whether the transfer byte count for
  3197. * the current data phase is odd.
  3198. */
  3199. DATA_COUNT_ODD {
  3200. size 1
  3201. }
  3202. }
  3203. scratch_ram {
  3204. /* Mode Specific */
  3205. address 0x0F8
  3206. size 8
  3207. modes 0, 1, 2, 3
  3208. LONGJMP_ADDR {
  3209. size 2
  3210. }
  3211. ACCUM_SAVE {
  3212. size 1
  3213. }
  3214. }
  3215. scratch_ram {
  3216. address 0x100
  3217. size 128
  3218. modes 0, 1, 2, 3
  3219. /*
  3220. * Per "other-id" execution queues. We use an array of
  3221. * tail pointers into lists of SCBs sorted by "other-id".
  3222. * The execution head pointer threads the head SCBs for
  3223. * each list.
  3224. */
  3225. WAITING_SCB_TAILS {
  3226. size 32
  3227. }
  3228. WAITING_TID_HEAD {
  3229. size 2
  3230. }
  3231. WAITING_TID_TAIL {
  3232. size 2
  3233. }
  3234. /*
  3235. * SCBID of the next SCB in the new SCB queue.
  3236. */
  3237. NEXT_QUEUED_SCB_ADDR {
  3238. size 4
  3239. }
  3240. /*
  3241. * head of list of SCBs that have
  3242. * completed but have not been
  3243. * put into the qoutfifo.
  3244. */
  3245. COMPLETE_SCB_HEAD {
  3246. size 2
  3247. }
  3248. /*
  3249. * The list of completed SCBs in
  3250. * the active DMA.
  3251. */
  3252. COMPLETE_SCB_DMAINPROG_HEAD {
  3253. size 2
  3254. }
  3255. /*
  3256. * head of list of SCBs that have
  3257. * completed but need to be uploaded
  3258. * to the host prior to being completed.
  3259. */
  3260. COMPLETE_DMA_SCB_HEAD {
  3261. size 2
  3262. }
  3263. /* Counting semaphore to prevent new select-outs */
  3264. QFREEZE_COUNT {
  3265. size 2
  3266. }
  3267. /*
  3268. * Mode to restore on legacy idle loop exit.
  3269. */
  3270. SAVED_MODE {
  3271. size 1
  3272. }
  3273. /*
  3274. * Single byte buffer used to designate the type or message
  3275. * to send to a target.
  3276. */
  3277. MSG_OUT {
  3278. size 1
  3279. }
  3280. /* Parameters for DMA Logic */
  3281. DMAPARAMS {
  3282. size 1
  3283. field PRELOADEN 0x80
  3284. field WIDEODD 0x40
  3285. field SCSIEN 0x20
  3286. field SDMAEN 0x10
  3287. field SDMAENACK 0x10
  3288. field HDMAEN 0x08
  3289. field HDMAENACK 0x08
  3290. field DIRECTION 0x04 /* Set indicates PCI->SCSI */
  3291. field FIFOFLUSH 0x02
  3292. field FIFORESET 0x01
  3293. }
  3294. SEQ_FLAGS {
  3295. size 1
  3296. field NOT_IDENTIFIED 0x80
  3297. field NO_CDB_SENT 0x40
  3298. field TARGET_CMD_IS_TAGGED 0x40
  3299. field DPHASE 0x20
  3300. /* Target flags */
  3301. field TARG_CMD_PENDING 0x10
  3302. field CMDPHASE_PENDING 0x08
  3303. field DPHASE_PENDING 0x04
  3304. field SPHASE_PENDING 0x02
  3305. field NO_DISCONNECT 0x01
  3306. }
  3307. /*
  3308. * Temporary storage for the
  3309. * target/channel/lun of a
  3310. * reconnecting target
  3311. */
  3312. SAVED_SCSIID {
  3313. size 1
  3314. }
  3315. SAVED_LUN {
  3316. size 1
  3317. }
  3318. /*
  3319. * The last bus phase as seen by the sequencer.
  3320. */
  3321. LASTPHASE {
  3322. size 1
  3323. field CDI 0x80
  3324. field IOI 0x40
  3325. field MSGI 0x20
  3326. field P_BUSFREE 0x01
  3327. enum PHASE_MASK CDO|IOO|MSGO {
  3328. P_DATAOUT 0x0,
  3329. P_DATAIN IOO,
  3330. P_DATAOUT_DT P_DATAOUT|MSGO,
  3331. P_DATAIN_DT P_DATAIN|MSGO,
  3332. P_COMMAND CDO,
  3333. P_MESGOUT CDO|MSGO,
  3334. P_STATUS CDO|IOO,
  3335. P_MESGIN CDO|IOO|MSGO
  3336. }
  3337. }
  3338. /*
  3339. * Value to "or" into the SCBPTR[1] value to
  3340. * indicate that an entry in the QINFIFO is valid.
  3341. */
  3342. QOUTFIFO_ENTRY_VALID_TAG {
  3343. size 1
  3344. }
  3345. /*
  3346. * Base address of our shared data with the kernel driver in host
  3347. * memory. This includes the qoutfifo and target mode
  3348. * incoming command queue.
  3349. */
  3350. SHARED_DATA_ADDR {
  3351. size 4
  3352. }
  3353. /*
  3354. * Pointer to location in host memory for next
  3355. * position in the qoutfifo.
  3356. */
  3357. QOUTFIFO_NEXT_ADDR {
  3358. size 4
  3359. }
  3360. /*
  3361. * Kernel and sequencer offsets into the queue of
  3362. * incoming target mode command descriptors. The
  3363. * queue is full when the KERNEL_TQINPOS == TQINPOS.
  3364. */
  3365. KERNEL_TQINPOS {
  3366. size 1
  3367. }
  3368. TQINPOS {
  3369. size 1
  3370. }
  3371. ARG_1 {
  3372. size 1
  3373. mask SEND_MSG 0x80
  3374. mask SEND_SENSE 0x40
  3375. mask SEND_REJ 0x20
  3376. mask MSGOUT_PHASEMIS 0x10
  3377. mask EXIT_MSG_LOOP 0x08
  3378. mask CONT_MSG_LOOP_WRITE 0x04
  3379. mask CONT_MSG_LOOP_READ 0x03
  3380. mask CONT_MSG_LOOP_TARG 0x02
  3381. alias RETURN_1
  3382. }
  3383. ARG_2 {
  3384. size 1
  3385. alias RETURN_2
  3386. }
  3387. /*
  3388. * Snapshot of MSG_OUT taken after each message is sent.
  3389. */
  3390. LAST_MSG {
  3391. size 1
  3392. }
  3393. /*
  3394. * Sequences the kernel driver has okayed for us. This allows
  3395. * the driver to do things like prevent initiator or target
  3396. * operations.
  3397. */
  3398. SCSISEQ_TEMPLATE {
  3399. size 1
  3400. field MANUALCTL 0x40
  3401. field ENSELI 0x20
  3402. field ENRSELI 0x10
  3403. field MANUALP 0x0C
  3404. field ENAUTOATNP 0x02
  3405. field ALTSTIM 0x01
  3406. }
  3407. /*
  3408. * The initiator specified tag for this target mode transaction.
  3409. */
  3410. INITIATOR_TAG {
  3411. size 1
  3412. }
  3413. SEQ_FLAGS2 {
  3414. size 1
  3415. field TARGET_MSG_PENDING 0x02
  3416. field SELECTOUT_QFROZEN 0x04
  3417. }
  3418. ALLOCFIFO_SCBPTR {
  3419. size 2
  3420. }
  3421. /*
  3422. * The maximum amount of time to wait, when interrupt coalescing
  3423. * is enabled, before issueing a CMDCMPLT interrupt for a completed
  3424. * command.
  3425. */
  3426. INT_COALESCING_TIMER {
  3427. size 2
  3428. }
  3429. /*
  3430. * The maximum number of commands to coalesce into a single interrupt.
  3431. * Actually the 2's complement of that value to simplify sequencer
  3432. * code.
  3433. */
  3434. INT_COALESCING_MAXCMDS {
  3435. size 1
  3436. }
  3437. /*
  3438. * The minimum number of commands still outstanding required
  3439. * to continue coalescing (2's complement of value).
  3440. */
  3441. INT_COALESCING_MINCMDS {
  3442. size 1
  3443. }
  3444. /*
  3445. * Number of commands "in-flight".
  3446. */
  3447. CMDS_PENDING {
  3448. size 2
  3449. }
  3450. /*
  3451. * The count of commands that have been coalesced.
  3452. */
  3453. INT_COALESCING_CMDCOUNT {
  3454. size 1
  3455. }
  3456. /*
  3457. * Since the HS_MAIBOX is self clearing, copy its contents to
  3458. * this position in scratch ram every time it changes.
  3459. */
  3460. LOCAL_HS_MAILBOX {
  3461. size 1
  3462. }
  3463. /*
  3464. * Target-mode CDB type to CDB length table used
  3465. * in non-packetized operation.
  3466. */
  3467. CMDSIZE_TABLE {
  3468. size 8
  3469. }
  3470. }
  3471. /************************* Hardware SCB Definition ****************************/
  3472. scb {
  3473. address 0x180
  3474. size 64
  3475. modes 0, 1, 2, 3
  3476. SCB_RESIDUAL_DATACNT {
  3477. size 4
  3478. alias SCB_CDB_STORE
  3479. alias SCB_HOST_CDB_PTR
  3480. }
  3481. SCB_RESIDUAL_SGPTR {
  3482. size 4
  3483. field SG_ADDR_MASK 0xf8 /* In the last byte */
  3484. field SG_OVERRUN_RESID 0x02 /* In the first byte */
  3485. field SG_LIST_NULL 0x01 /* In the first byte */
  3486. }
  3487. SCB_SCSI_STATUS {
  3488. size 1
  3489. alias SCB_HOST_CDB_LEN
  3490. }
  3491. SCB_TARGET_PHASES {
  3492. size 1
  3493. }
  3494. SCB_TARGET_DATA_DIR {
  3495. size 1
  3496. }
  3497. SCB_TARGET_ITAG {
  3498. size 1
  3499. }
  3500. SCB_SENSE_BUSADDR {
  3501. /*
  3502. * Only valid if CDB length is less than 13 bytes or
  3503. * we are using a CDB pointer. Otherwise contains
  3504. * the last 4 bytes of embedded cdb information.
  3505. */
  3506. size 4
  3507. alias SCB_NEXT_COMPLETE
  3508. }
  3509. SCB_TAG {
  3510. alias SCB_FIFO_USE_COUNT
  3511. size 2
  3512. }
  3513. SCB_CONTROL {
  3514. size 1
  3515. field TARGET_SCB 0x80
  3516. field DISCENB 0x40
  3517. field TAG_ENB 0x20
  3518. field MK_MESSAGE 0x10
  3519. field STATUS_RCVD 0x08
  3520. field DISCONNECTED 0x04
  3521. field SCB_TAG_TYPE 0x03
  3522. }
  3523. SCB_SCSIID {
  3524. size 1
  3525. field TID 0xF0
  3526. field OID 0x0F
  3527. }
  3528. SCB_LUN {
  3529. size 1
  3530. field LID 0xff
  3531. }
  3532. SCB_TASK_ATTRIBUTE {
  3533. size 1
  3534. /*
  3535. * Overloaded field for non-packetized
  3536. * ignore wide residue message handling.
  3537. */
  3538. field SCB_XFERLEN_ODD 0x01
  3539. }
  3540. SCB_CDB_LEN {
  3541. size 1
  3542. field SCB_CDB_LEN_PTR 0x80 /* CDB in host memory */
  3543. }
  3544. SCB_TASK_MANAGEMENT {
  3545. size 1
  3546. }
  3547. SCB_DATAPTR {
  3548. size 8
  3549. }
  3550. SCB_DATACNT {
  3551. /*
  3552. * The last byte is really the high address bits for
  3553. * the data address.
  3554. */
  3555. size 4
  3556. field SG_LAST_SEG 0x80 /* In the fourth byte */
  3557. field SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */
  3558. }
  3559. SCB_SGPTR {
  3560. size 4
  3561. field SG_STATUS_VALID 0x04 /* In the first byte */
  3562. field SG_FULL_RESID 0x02 /* In the first byte */
  3563. field SG_LIST_NULL 0x01 /* In the first byte */
  3564. }
  3565. SCB_BUSADDR {
  3566. size 4
  3567. }
  3568. SCB_NEXT {
  3569. alias SCB_NEXT_SCB_BUSADDR
  3570. size 2
  3571. }
  3572. SCB_NEXT2 {
  3573. size 2
  3574. }
  3575. SCB_SPARE {
  3576. size 8
  3577. alias SCB_PKT_LUN
  3578. }
  3579. SCB_DISCONNECTED_LISTS {
  3580. size 8
  3581. }
  3582. }
  3583. /*********************************** Constants ********************************/
  3584. const MK_MESSAGE_BIT_OFFSET 4
  3585. const TID_SHIFT 4
  3586. const TARGET_CMD_CMPLT 0xfe
  3587. const INVALID_ADDR 0x80
  3588. #define SCB_LIST_NULL 0xff
  3589. #define QOUTFIFO_ENTRY_VALID_TOGGLE 0x80
  3590. const CCSGADDR_MAX 0x80
  3591. const CCSCBADDR_MAX 0x80
  3592. const CCSGRAM_MAXSEGS 16
  3593. /* Selection Timeout Timer Constants */
  3594. const STIMESEL_SHIFT 3
  3595. const STIMESEL_MIN 0x18
  3596. const STIMESEL_BUG_ADJ 0x8
  3597. /* WDTR Message values */
  3598. const BUS_8_BIT 0x00
  3599. const BUS_16_BIT 0x01
  3600. const BUS_32_BIT 0x02
  3601. /* Offset maximums */
  3602. const MAX_OFFSET 0xfe
  3603. const MAX_OFFSET_PACED 0xfe
  3604. const MAX_OFFSET_PACED_BUG 0x7f
  3605. /*
  3606. * Some 160 devices incorrectly accept 0xfe as a
  3607. * sync offset, but will overrun this value. Limit
  3608. * to 0x7f for speed lower than U320 which will
  3609. * avoid the persistent sync offset overruns.
  3610. */
  3611. const MAX_OFFSET_NON_PACED 0x7f
  3612. const HOST_MSG 0xff
  3613. /*
  3614. * The size of our sense buffers.
  3615. * Sense buffer mapping can be handled in either of two ways.
  3616. * The first is to allocate a dmamap for each transaction.
  3617. * Depending on the architecture, dmamaps can be costly. The
  3618. * alternative is to statically map the buffers in much the same
  3619. * way we handle our scatter gather lists. The driver implements
  3620. * the later.
  3621. */
  3622. const AHD_SENSE_BUFSIZE 256
  3623. /* Target mode command processing constants */
  3624. const CMD_GROUP_CODE_SHIFT 0x05
  3625. const STATUS_BUSY 0x08
  3626. const STATUS_QUEUE_FULL 0x28
  3627. const STATUS_PKT_SENSE 0xFF
  3628. const TARGET_DATA_IN 1
  3629. const SCB_TRANSFER_SIZE_FULL_LUN 56
  3630. const SCB_TRANSFER_SIZE_1BYTE_LUN 48
  3631. /* PKT_OVERRUN_BUFSIZE must be a multiple of 256 less than 64K */
  3632. const PKT_OVERRUN_BUFSIZE 512
  3633. /*
  3634. * Timer parameters.
  3635. */
  3636. const AHD_TIMER_US_PER_TICK 25
  3637. const AHD_TIMER_MAX_TICKS 0xFFFF
  3638. const AHD_TIMER_MAX_US (AHD_TIMER_MAX_TICKS * AHD_TIMER_US_PER_TICK)
  3639. /*
  3640. * Downloaded (kernel inserted) constants
  3641. */
  3642. const SG_PREFETCH_CNT download
  3643. const SG_PREFETCH_CNT_LIMIT download
  3644. const SG_PREFETCH_ALIGN_MASK download
  3645. const SG_PREFETCH_ADDR_MASK download
  3646. const SG_SIZEOF download
  3647. const PKT_OVERRUN_BUFOFFSET download
  3648. const SCB_TRANSFER_SIZE download
  3649. /*
  3650. * BIOS SCB offsets
  3651. */
  3652. const NVRAM_SCB_OFFSET 0x2C