au1000_pb1x00.c 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418
  1. /*
  2. *
  3. * Alchemy Semi Pb1x00 boards specific pcmcia routines.
  4. *
  5. * Copyright 2002 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * ########################################################################
  10. *
  11. * This program is free software; you can distribute it and/or modify it
  12. * under the terms of the GNU General Public License (Version 2) as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope it will be useful, but WITHOUT
  16. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  18. * for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License along
  21. * with this program; if not, write to the Free Software Foundation, Inc.,
  22. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/ioport.h>
  28. #include <linux/kernel.h>
  29. #include <linux/tqueue.h>
  30. #include <linux/timer.h>
  31. #include <linux/mm.h>
  32. #include <linux/proc_fs.h>
  33. #include <linux/version.h>
  34. #include <linux/types.h>
  35. #include <pcmcia/cs_types.h>
  36. #include <pcmcia/cs.h>
  37. #include <pcmcia/ss.h>
  38. #include <pcmcia/bulkmem.h>
  39. #include <pcmcia/cistpl.h>
  40. #include <pcmcia/bus_ops.h>
  41. #include "cs_internal.h"
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/system.h>
  45. #include <asm/au1000.h>
  46. #include <asm/au1000_pcmcia.h>
  47. #define debug(fmt, arg...) do { } while (0)
  48. #ifdef CONFIG_MIPS_PB1000
  49. #include <asm/pb1000.h>
  50. #define PCMCIA_IRQ AU1000_GPIO_15
  51. #elif defined (CONFIG_MIPS_PB1500)
  52. #include <asm/pb1500.h>
  53. #define PCMCIA_IRQ AU1500_GPIO_203
  54. #elif defined (CONFIG_MIPS_PB1100)
  55. #include <asm/pb1100.h>
  56. #define PCMCIA_IRQ AU1000_GPIO_11
  57. #endif
  58. static int pb1x00_pcmcia_init(struct pcmcia_init *init)
  59. {
  60. #ifdef CONFIG_MIPS_PB1000
  61. u16 pcr;
  62. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  63. au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
  64. au_sync_delay(100);
  65. au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
  66. au_sync();
  67. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  68. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  69. au_writel(pcr, PB1000_PCR);
  70. au_sync_delay(20);
  71. return PCMCIA_NUM_SOCKS;
  72. #else /* fixme -- take care of the Pb1500 at some point */
  73. u16 pcr;
  74. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  75. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  76. au_writew(pcr, PCMCIA_BOARD_REG);
  77. au_sync_delay(500);
  78. return PCMCIA_NUM_SOCKS;
  79. #endif
  80. }
  81. static int pb1x00_pcmcia_shutdown(void)
  82. {
  83. #ifdef CONFIG_MIPS_PB1000
  84. u16 pcr;
  85. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  86. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  87. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  88. au_writel(pcr, PB1000_PCR);
  89. au_sync_delay(20);
  90. return 0;
  91. #else
  92. u16 pcr;
  93. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  94. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  95. au_writew(pcr, PCMCIA_BOARD_REG);
  96. au_sync_delay(2);
  97. return 0;
  98. #endif
  99. }
  100. static int
  101. pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
  102. {
  103. u32 inserted0, inserted1;
  104. u16 vs0, vs1;
  105. #ifdef CONFIG_MIPS_PB1000
  106. vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
  107. inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
  108. inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
  109. vs0 = (vs0 >> 4) & 0x3;
  110. vs1 = (vs1 >> 12) & 0x3;
  111. #else
  112. vs0 = (au_readw(BOARD_STATUS_REG) >> 4) & 0x3;
  113. #ifdef CONFIG_MIPS_PB1500
  114. inserted0 = !((au_readl(GPIO2_PINSTATE) >> 1) & 0x1); /* gpio 201 */
  115. #else /* Pb1100 */
  116. inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
  117. #endif
  118. inserted1 = 0;
  119. #endif
  120. state->ready = 0;
  121. state->vs_Xv = 0;
  122. state->vs_3v = 0;
  123. state->detect = 0;
  124. if (sock == 0) {
  125. if (inserted0) {
  126. switch (vs0) {
  127. case 0:
  128. case 2:
  129. state->vs_3v=1;
  130. break;
  131. case 3: /* 5V */
  132. break;
  133. default:
  134. /* return without setting 'detect' */
  135. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  136. vs0);
  137. return 0;
  138. }
  139. state->detect = 1;
  140. }
  141. }
  142. else {
  143. if (inserted1) {
  144. switch (vs1) {
  145. case 0:
  146. case 2:
  147. state->vs_3v=1;
  148. break;
  149. case 3: /* 5V */
  150. break;
  151. default:
  152. /* return without setting 'detect' */
  153. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  154. vs1);
  155. return 0;
  156. }
  157. state->detect = 1;
  158. }
  159. }
  160. if (state->detect) {
  161. state->ready = 1;
  162. }
  163. state->bvd1=1;
  164. state->bvd2=1;
  165. state->wrprot=0;
  166. return 1;
  167. }
  168. static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
  169. {
  170. if(info->sock > PCMCIA_MAX_SOCK) return -1;
  171. /*
  172. * Even in the case of the Pb1000, both sockets are connected
  173. * to the same irq line.
  174. */
  175. info->irq = PCMCIA_IRQ;
  176. return 0;
  177. }
  178. static int
  179. pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
  180. {
  181. u16 pcr;
  182. if(configure->sock > PCMCIA_MAX_SOCK) return -1;
  183. #ifdef CONFIG_MIPS_PB1000
  184. pcr = au_readl(PB1000_PCR);
  185. if (configure->sock == 0) {
  186. pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
  187. PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
  188. }
  189. else {
  190. pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
  191. PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
  192. }
  193. pcr &= ~PCR_SLOT_0_RST;
  194. debug("Vcc %dV Vpp %dV, pcr %x\n",
  195. configure->vcc, configure->vpp, pcr);
  196. switch(configure->vcc){
  197. case 0: /* Vcc 0 */
  198. switch(configure->vpp) {
  199. case 0:
  200. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
  201. configure->sock);
  202. break;
  203. case 12:
  204. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
  205. configure->sock);
  206. break;
  207. case 50:
  208. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
  209. configure->sock);
  210. break;
  211. case 33:
  212. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
  213. configure->sock);
  214. break;
  215. default:
  216. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  217. configure->sock);
  218. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  219. __FUNCTION__,
  220. configure->vcc,
  221. configure->vpp);
  222. break;
  223. }
  224. break;
  225. case 50: /* Vcc 5V */
  226. switch(configure->vpp) {
  227. case 0:
  228. pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
  229. configure->sock);
  230. break;
  231. case 50:
  232. pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
  233. configure->sock);
  234. break;
  235. case 12:
  236. pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
  237. configure->sock);
  238. break;
  239. case 33:
  240. pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
  241. configure->sock);
  242. break;
  243. default:
  244. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  245. configure->sock);
  246. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  247. __FUNCTION__,
  248. configure->vcc,
  249. configure->vpp);
  250. break;
  251. }
  252. break;
  253. case 33: /* Vcc 3.3V */
  254. switch(configure->vpp) {
  255. case 0:
  256. pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
  257. configure->sock);
  258. break;
  259. case 50:
  260. pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
  261. configure->sock);
  262. break;
  263. case 12:
  264. pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
  265. configure->sock);
  266. break;
  267. case 33:
  268. pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
  269. configure->sock);
  270. break;
  271. default:
  272. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  273. configure->sock);
  274. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  275. __FUNCTION__,
  276. configure->vcc,
  277. configure->vpp);
  278. break;
  279. }
  280. break;
  281. default: /* what's this ? */
  282. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
  283. printk(KERN_ERR "%s: bad Vcc %d\n",
  284. __FUNCTION__, configure->vcc);
  285. break;
  286. }
  287. if (configure->sock == 0) {
  288. pcr &= ~(PCR_SLOT_0_RST);
  289. if (configure->reset)
  290. pcr |= PCR_SLOT_0_RST;
  291. }
  292. else {
  293. pcr &= ~(PCR_SLOT_1_RST);
  294. if (configure->reset)
  295. pcr |= PCR_SLOT_1_RST;
  296. }
  297. au_writel(pcr, PB1000_PCR);
  298. au_sync_delay(300);
  299. #else
  300. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf;
  301. debug("Vcc %dV Vpp %dV, pcr %x, reset %d\n",
  302. configure->vcc, configure->vpp, pcr, configure->reset);
  303. switch(configure->vcc){
  304. case 0: /* Vcc 0 */
  305. pcr |= SET_VCC_VPP(0,0);
  306. break;
  307. case 50: /* Vcc 5V */
  308. switch(configure->vpp) {
  309. case 0:
  310. pcr |= SET_VCC_VPP(2,0);
  311. break;
  312. case 50:
  313. pcr |= SET_VCC_VPP(2,1);
  314. break;
  315. case 12:
  316. pcr |= SET_VCC_VPP(2,2);
  317. break;
  318. case 33:
  319. default:
  320. pcr |= SET_VCC_VPP(0,0);
  321. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  322. __FUNCTION__,
  323. configure->vcc,
  324. configure->vpp);
  325. break;
  326. }
  327. break;
  328. case 33: /* Vcc 3.3V */
  329. switch(configure->vpp) {
  330. case 0:
  331. pcr |= SET_VCC_VPP(1,0);
  332. break;
  333. case 12:
  334. pcr |= SET_VCC_VPP(1,2);
  335. break;
  336. case 33:
  337. pcr |= SET_VCC_VPP(1,1);
  338. break;
  339. case 50:
  340. default:
  341. pcr |= SET_VCC_VPP(0,0);
  342. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  343. __FUNCTION__,
  344. configure->vcc,
  345. configure->vpp);
  346. break;
  347. }
  348. break;
  349. default: /* what's this ? */
  350. pcr |= SET_VCC_VPP(0,0);
  351. printk(KERN_ERR "%s: bad Vcc %d\n",
  352. __FUNCTION__, configure->vcc);
  353. break;
  354. }
  355. au_writew(pcr, PCMCIA_BOARD_REG);
  356. au_sync_delay(300);
  357. if (!configure->reset) {
  358. pcr |= PC_DRV_EN;
  359. au_writew(pcr, PCMCIA_BOARD_REG);
  360. au_sync_delay(100);
  361. pcr |= PC_DEASSERT_RST;
  362. au_writew(pcr, PCMCIA_BOARD_REG);
  363. au_sync_delay(100);
  364. }
  365. else {
  366. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  367. au_writew(pcr, PCMCIA_BOARD_REG);
  368. au_sync_delay(100);
  369. }
  370. #endif
  371. return 0;
  372. }
  373. struct pcmcia_low_level pb1x00_pcmcia_ops = {
  374. pb1x00_pcmcia_init,
  375. pb1x00_pcmcia_shutdown,
  376. pb1x00_pcmcia_socket_state,
  377. pb1x00_pcmcia_get_irq_info,
  378. pb1x00_pcmcia_configure_socket
  379. };