zoran_device.c 45 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785
  1. /*
  2. * Zoran zr36057/zr36067 PCI controller driver, for the
  3. * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
  4. * Media Labs LML33/LML33R10.
  5. *
  6. * This part handles device access (PCI/I2C/codec/...)
  7. *
  8. * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
  9. *
  10. * Currently maintained by:
  11. * Ronald Bultje <rbultje@ronald.bitfreak.net>
  12. * Laurent Pinchart <laurent.pinchart@skynet.be>
  13. * Mailinglist <mjpeg-users@lists.sf.net>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/config.h>
  30. #include <linux/types.h>
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/vmalloc.h>
  34. #include <linux/byteorder/generic.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/proc_fs.h>
  37. #include <linux/i2c.h>
  38. #include <linux/i2c-algo-bit.h>
  39. #include <linux/videodev.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/sem.h>
  42. #include <linux/pci.h>
  43. #include <linux/video_decoder.h>
  44. #include <linux/video_encoder.h>
  45. #include <linux/delay.h>
  46. #include <linux/wait.h>
  47. #include <asm/io.h>
  48. #include "videocodec.h"
  49. #include "zoran.h"
  50. #include "zoran_device.h"
  51. #define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \
  52. ZR36057_ISR_GIRQ1 | \
  53. ZR36057_ISR_JPEGRepIRQ )
  54. extern const struct zoran_format zoran_formats[];
  55. extern int *zr_debug;
  56. #define dprintk(num, format, args...) \
  57. do { \
  58. if (*zr_debug >= num) \
  59. printk(format, ##args); \
  60. } while (0)
  61. static int lml33dpath = 0; /* 1 will use digital path in capture
  62. * mode instead of analog. It can be
  63. * used for picture adjustments using
  64. * tool like xawtv while watching image
  65. * on TV monitor connected to the output.
  66. * However, due to absence of 75 Ohm
  67. * load on Bt819 input, there will be
  68. * some image imperfections */
  69. module_param(lml33dpath, bool, 0);
  70. MODULE_PARM_DESC(lml33dpath,
  71. "Use digital path capture mode (on LML33 cards)");
  72. static void
  73. zr36057_init_vfe (struct zoran *zr);
  74. /*
  75. * General Purpose I/O and Guest bus access
  76. */
  77. /*
  78. * This is a bit tricky. When a board lacks a GPIO function, the corresponding
  79. * GPIO bit number in the card_info structure is set to 0.
  80. */
  81. void
  82. GPIO (struct zoran *zr,
  83. int bit,
  84. unsigned int value)
  85. {
  86. u32 reg;
  87. u32 mask;
  88. /* Make sure the bit number is legal
  89. * A bit number of -1 (lacking) gives a mask of 0,
  90. * making it harmless */
  91. mask = (1 << (24 + bit)) & 0xff000000;
  92. reg = btread(ZR36057_GPPGCR1) & ~mask;
  93. if (value) {
  94. reg |= mask;
  95. }
  96. btwrite(reg, ZR36057_GPPGCR1);
  97. udelay(1);
  98. }
  99. /*
  100. * Wait til post office is no longer busy
  101. */
  102. int
  103. post_office_wait (struct zoran *zr)
  104. {
  105. u32 por;
  106. // while (((por = btread(ZR36057_POR)) & (ZR36057_POR_POPen | ZR36057_POR_POTime)) == ZR36057_POR_POPen) {
  107. while ((por = btread(ZR36057_POR)) & ZR36057_POR_POPen) {
  108. /* wait for something to happen */
  109. }
  110. if ((por & ZR36057_POR_POTime) && !zr->card.gws_not_connected) {
  111. /* In LML33/BUZ \GWS line is not connected, so it has always timeout set */
  112. dprintk(1, KERN_INFO "%s: pop timeout %08x\n", ZR_DEVNAME(zr),
  113. por);
  114. return -1;
  115. }
  116. return 0;
  117. }
  118. int
  119. post_office_write (struct zoran *zr,
  120. unsigned int guest,
  121. unsigned int reg,
  122. unsigned int value)
  123. {
  124. u32 por;
  125. por =
  126. ZR36057_POR_PODir | ZR36057_POR_POTime | ((guest & 7) << 20) |
  127. ((reg & 7) << 16) | (value & 0xFF);
  128. btwrite(por, ZR36057_POR);
  129. return post_office_wait(zr);
  130. }
  131. int
  132. post_office_read (struct zoran *zr,
  133. unsigned int guest,
  134. unsigned int reg)
  135. {
  136. u32 por;
  137. por = ZR36057_POR_POTime | ((guest & 7) << 20) | ((reg & 7) << 16);
  138. btwrite(por, ZR36057_POR);
  139. if (post_office_wait(zr) < 0) {
  140. return -1;
  141. }
  142. return btread(ZR36057_POR) & 0xFF;
  143. }
  144. /*
  145. * detect guests
  146. */
  147. static void
  148. dump_guests (struct zoran *zr)
  149. {
  150. if (*zr_debug > 2) {
  151. int i, guest[8];
  152. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  153. guest[i] = post_office_read(zr, i, 0);
  154. }
  155. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  156. for (i = 1; i < 8; i++) {
  157. printk(" 0x%02x", guest[i]);
  158. }
  159. printk("\n");
  160. }
  161. }
  162. static inline unsigned long
  163. get_time (void)
  164. {
  165. struct timeval tv;
  166. do_gettimeofday(&tv);
  167. return (1000000 * tv.tv_sec + tv.tv_usec);
  168. }
  169. void
  170. detect_guest_activity (struct zoran *zr)
  171. {
  172. int timeout, i, j, res, guest[8], guest0[8], change[8][3];
  173. unsigned long t0, t1;
  174. dump_guests(zr);
  175. printk(KERN_INFO "%s: Detecting guests activity, please wait...\n",
  176. ZR_DEVNAME(zr));
  177. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  178. guest0[i] = guest[i] = post_office_read(zr, i, 0);
  179. }
  180. timeout = 0;
  181. j = 0;
  182. t0 = get_time();
  183. while (timeout < 10000) {
  184. udelay(10);
  185. timeout++;
  186. for (i = 1; (i < 8) && (j < 8); i++) {
  187. res = post_office_read(zr, i, 0);
  188. if (res != guest[i]) {
  189. t1 = get_time();
  190. change[j][0] = (t1 - t0);
  191. t0 = t1;
  192. change[j][1] = i;
  193. change[j][2] = res;
  194. j++;
  195. guest[i] = res;
  196. }
  197. }
  198. if (j >= 8)
  199. break;
  200. }
  201. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  202. for (i = 1; i < 8; i++) {
  203. printk(" 0x%02x", guest0[i]);
  204. }
  205. printk("\n");
  206. if (j == 0) {
  207. printk(KERN_INFO "%s: No activity detected.\n", ZR_DEVNAME(zr));
  208. return;
  209. }
  210. for (i = 0; i < j; i++) {
  211. printk(KERN_INFO "%s: %6d: %d => 0x%02x\n", ZR_DEVNAME(zr),
  212. change[i][0], change[i][1], change[i][2]);
  213. }
  214. }
  215. /*
  216. * JPEG Codec access
  217. */
  218. void
  219. jpeg_codec_sleep (struct zoran *zr,
  220. int sleep)
  221. {
  222. GPIO(zr, zr->card.gpio[GPIO_JPEG_SLEEP], !sleep);
  223. if (!sleep) {
  224. dprintk(3,
  225. KERN_DEBUG
  226. "%s: jpeg_codec_sleep() - wake GPIO=0x%08x\n",
  227. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  228. udelay(500);
  229. } else {
  230. dprintk(3,
  231. KERN_DEBUG
  232. "%s: jpeg_codec_sleep() - sleep GPIO=0x%08x\n",
  233. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  234. udelay(2);
  235. }
  236. }
  237. int
  238. jpeg_codec_reset (struct zoran *zr)
  239. {
  240. /* Take the codec out of sleep */
  241. jpeg_codec_sleep(zr, 0);
  242. if (zr->card.gpcs[GPCS_JPEG_RESET] != 0xff) {
  243. post_office_write(zr, zr->card.gpcs[GPCS_JPEG_RESET], 0,
  244. 0);
  245. udelay(2);
  246. } else {
  247. GPIO(zr, zr->card.gpio[GPIO_JPEG_RESET], 0);
  248. udelay(2);
  249. GPIO(zr, zr->card.gpio[GPIO_JPEG_RESET], 1);
  250. udelay(2);
  251. }
  252. return 0;
  253. }
  254. /*
  255. * Set the registers for the size we have specified. Don't bother
  256. * trying to understand this without the ZR36057 manual in front of
  257. * you [AC].
  258. *
  259. * PS: The manual is free for download in .pdf format from
  260. * www.zoran.com - nicely done those folks.
  261. */
  262. static void
  263. zr36057_adjust_vfe (struct zoran *zr,
  264. enum zoran_codec_mode mode)
  265. {
  266. u32 reg;
  267. switch (mode) {
  268. case BUZ_MODE_MOTION_DECOMPRESS:
  269. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  270. reg = btread(ZR36057_VFEHCR);
  271. if ((reg & (1 << 10)) && zr->card.type != LML33R10) {
  272. reg += ((1 << 10) | 1);
  273. }
  274. btwrite(reg, ZR36057_VFEHCR);
  275. break;
  276. case BUZ_MODE_MOTION_COMPRESS:
  277. case BUZ_MODE_IDLE:
  278. default:
  279. if (zr->norm == VIDEO_MODE_NTSC ||
  280. (zr->card.type == LML33R10 &&
  281. zr->norm == VIDEO_MODE_PAL))
  282. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  283. else
  284. btor(ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  285. reg = btread(ZR36057_VFEHCR);
  286. if (!(reg & (1 << 10)) && zr->card.type != LML33R10) {
  287. reg -= ((1 << 10) | 1);
  288. }
  289. btwrite(reg, ZR36057_VFEHCR);
  290. break;
  291. }
  292. }
  293. /*
  294. * set geometry
  295. */
  296. static void
  297. zr36057_set_vfe (struct zoran *zr,
  298. int video_width,
  299. int video_height,
  300. const struct zoran_format *format)
  301. {
  302. struct tvnorm *tvn;
  303. unsigned HStart, HEnd, VStart, VEnd;
  304. unsigned DispMode;
  305. unsigned VidWinWid, VidWinHt;
  306. unsigned hcrop1, hcrop2, vcrop1, vcrop2;
  307. unsigned Wa, We, Ha, He;
  308. unsigned X, Y, HorDcm, VerDcm;
  309. u32 reg;
  310. unsigned mask_line_size;
  311. tvn = zr->timing;
  312. Wa = tvn->Wa;
  313. Ha = tvn->Ha;
  314. dprintk(2, KERN_INFO "%s: set_vfe() - width = %d, height = %d\n",
  315. ZR_DEVNAME(zr), video_width, video_height);
  316. if (zr->norm != VIDEO_MODE_PAL &&
  317. zr->norm != VIDEO_MODE_NTSC &&
  318. zr->norm != VIDEO_MODE_SECAM) {
  319. dprintk(1,
  320. KERN_ERR "%s: set_vfe() - norm = %d not valid\n",
  321. ZR_DEVNAME(zr), zr->norm);
  322. return;
  323. }
  324. if (video_width < BUZ_MIN_WIDTH ||
  325. video_height < BUZ_MIN_HEIGHT ||
  326. video_width > Wa || video_height > Ha) {
  327. dprintk(1, KERN_ERR "%s: set_vfe: w=%d h=%d not valid\n",
  328. ZR_DEVNAME(zr), video_width, video_height);
  329. return;
  330. }
  331. /**** zr36057 ****/
  332. /* horizontal */
  333. VidWinWid = video_width;
  334. X = (VidWinWid * 64 + tvn->Wa - 1) / tvn->Wa;
  335. We = (VidWinWid * 64) / X;
  336. HorDcm = 64 - X;
  337. hcrop1 = 2 * ((tvn->Wa - We) / 4);
  338. hcrop2 = tvn->Wa - We - hcrop1;
  339. HStart = tvn->HStart ? tvn->HStart : 1;
  340. /* (Ronald) Original comment:
  341. * "| 1 Doesn't have any effect, tested on both a DC10 and a DC10+"
  342. * this is false. It inverses chroma values on the LML33R10 (so Cr
  343. * suddenly is shown as Cb and reverse, really cool effect if you
  344. * want to see blue faces, not useful otherwise). So don't use |1.
  345. * However, the DC10 has '0' as HStart, but does need |1, so we
  346. * use a dirty check...
  347. */
  348. HEnd = HStart + tvn->Wa - 1;
  349. HStart += hcrop1;
  350. HEnd -= hcrop2;
  351. reg = ((HStart & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HStart)
  352. | ((HEnd & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HEnd);
  353. if (zr->card.vfe_pol.hsync_pol)
  354. reg |= ZR36057_VFEHCR_HSPol;
  355. btwrite(reg, ZR36057_VFEHCR);
  356. /* Vertical */
  357. DispMode = !(video_height > BUZ_MAX_HEIGHT / 2);
  358. VidWinHt = DispMode ? video_height : video_height / 2;
  359. Y = (VidWinHt * 64 * 2 + tvn->Ha - 1) / tvn->Ha;
  360. He = (VidWinHt * 64) / Y;
  361. VerDcm = 64 - Y;
  362. vcrop1 = (tvn->Ha / 2 - He) / 2;
  363. vcrop2 = tvn->Ha / 2 - He - vcrop1;
  364. VStart = tvn->VStart;
  365. VEnd = VStart + tvn->Ha / 2; // - 1; FIXME SnapShot times out with -1 in 768*576 on the DC10 - LP
  366. VStart += vcrop1;
  367. VEnd -= vcrop2;
  368. reg = ((VStart & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VStart)
  369. | ((VEnd & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VEnd);
  370. if (zr->card.vfe_pol.vsync_pol)
  371. reg |= ZR36057_VFEVCR_VSPol;
  372. btwrite(reg, ZR36057_VFEVCR);
  373. /* scaler and pixel format */
  374. reg = 0;
  375. reg |= (HorDcm << ZR36057_VFESPFR_HorDcm);
  376. reg |= (VerDcm << ZR36057_VFESPFR_VerDcm);
  377. reg |= (DispMode << ZR36057_VFESPFR_DispMode);
  378. if (format->palette != VIDEO_PALETTE_YUV422)
  379. reg |= ZR36057_VFESPFR_LittleEndian;
  380. /* RJ: I don't know, why the following has to be the opposite
  381. * of the corresponding ZR36060 setting, but only this way
  382. * we get the correct colors when uncompressing to the screen */
  383. //reg |= ZR36057_VFESPFR_VCLKPol; /**/
  384. /* RJ: Don't know if that is needed for NTSC also */
  385. if (zr->norm != VIDEO_MODE_NTSC)
  386. reg |= ZR36057_VFESPFR_ExtFl; // NEEDED!!!!!!! Wolfgang
  387. reg |= ZR36057_VFESPFR_TopField;
  388. switch (format->palette) {
  389. case VIDEO_PALETTE_YUV422:
  390. reg |= ZR36057_VFESPFR_YUV422;
  391. break;
  392. case VIDEO_PALETTE_RGB555:
  393. reg |= ZR36057_VFESPFR_RGB555 | ZR36057_VFESPFR_ErrDif;
  394. break;
  395. case VIDEO_PALETTE_RGB565:
  396. reg |= ZR36057_VFESPFR_RGB565 | ZR36057_VFESPFR_ErrDif;
  397. break;
  398. case VIDEO_PALETTE_RGB24:
  399. reg |= ZR36057_VFESPFR_RGB888 | ZR36057_VFESPFR_Pack24;
  400. break;
  401. case VIDEO_PALETTE_RGB32:
  402. reg |= ZR36057_VFESPFR_RGB888;
  403. break;
  404. default:
  405. dprintk(1,
  406. KERN_INFO "%s: set_vfe() - unknown color_fmt=%x\n",
  407. ZR_DEVNAME(zr), format->palette);
  408. return;
  409. }
  410. if (HorDcm >= 48) {
  411. reg |= 3 << ZR36057_VFESPFR_HFilter; /* 5 tap filter */
  412. } else if (HorDcm >= 32) {
  413. reg |= 2 << ZR36057_VFESPFR_HFilter; /* 4 tap filter */
  414. } else if (HorDcm >= 16) {
  415. reg |= 1 << ZR36057_VFESPFR_HFilter; /* 3 tap filter */
  416. }
  417. btwrite(reg, ZR36057_VFESPFR);
  418. /* display configuration */
  419. reg = (16 << ZR36057_VDCR_MinPix)
  420. | (VidWinHt << ZR36057_VDCR_VidWinHt)
  421. | (VidWinWid << ZR36057_VDCR_VidWinWid);
  422. if (pci_pci_problems & PCIPCI_TRITON)
  423. // || zr->revision < 1) // Revision 1 has also Triton support
  424. reg &= ~ZR36057_VDCR_Triton;
  425. else
  426. reg |= ZR36057_VDCR_Triton;
  427. btwrite(reg, ZR36057_VDCR);
  428. /* (Ronald) don't write this if overlay_mask = NULL */
  429. if (zr->overlay_mask) {
  430. /* Write overlay clipping mask data, but don't enable overlay clipping */
  431. /* RJ: since this makes only sense on the screen, we use
  432. * zr->overlay_settings.width instead of video_width */
  433. mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  434. reg = virt_to_bus(zr->overlay_mask);
  435. btwrite(reg, ZR36057_MMTR);
  436. reg = virt_to_bus(zr->overlay_mask + mask_line_size);
  437. btwrite(reg, ZR36057_MMBR);
  438. reg =
  439. mask_line_size - (zr->overlay_settings.width +
  440. 31) / 32;
  441. if (DispMode == 0)
  442. reg += mask_line_size;
  443. reg <<= ZR36057_OCR_MaskStride;
  444. btwrite(reg, ZR36057_OCR);
  445. }
  446. zr36057_adjust_vfe(zr, zr->codec_mode);
  447. }
  448. /*
  449. * Switch overlay on or off
  450. */
  451. void
  452. zr36057_overlay (struct zoran *zr,
  453. int on)
  454. {
  455. u32 reg;
  456. if (on) {
  457. /* do the necessary settings ... */
  458. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR); /* switch it off first */
  459. zr36057_set_vfe(zr,
  460. zr->overlay_settings.width,
  461. zr->overlay_settings.height,
  462. zr->overlay_settings.format);
  463. /* Start and length of each line MUST be 4-byte aligned.
  464. * This should be allready checked before the call to this routine.
  465. * All error messages are internal driver checking only! */
  466. /* video display top and bottom registers */
  467. reg = (u32) zr->buffer.base +
  468. zr->overlay_settings.x *
  469. ((zr->overlay_settings.format->depth + 7) / 8) +
  470. zr->overlay_settings.y *
  471. zr->buffer.bytesperline;
  472. btwrite(reg, ZR36057_VDTR);
  473. if (reg & 3)
  474. dprintk(1,
  475. KERN_ERR
  476. "%s: zr36057_overlay() - video_address not aligned\n",
  477. ZR_DEVNAME(zr));
  478. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  479. reg += zr->buffer.bytesperline;
  480. btwrite(reg, ZR36057_VDBR);
  481. /* video stride, status, and frame grab register */
  482. reg = zr->buffer.bytesperline -
  483. zr->overlay_settings.width *
  484. ((zr->overlay_settings.format->depth + 7) / 8);
  485. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  486. reg += zr->buffer.bytesperline;
  487. if (reg & 3)
  488. dprintk(1,
  489. KERN_ERR
  490. "%s: zr36057_overlay() - video_stride not aligned\n",
  491. ZR_DEVNAME(zr));
  492. reg = (reg << ZR36057_VSSFGR_DispStride);
  493. reg |= ZR36057_VSSFGR_VidOvf; /* clear overflow status */
  494. btwrite(reg, ZR36057_VSSFGR);
  495. /* Set overlay clipping */
  496. if (zr->overlay_settings.clipcount > 0)
  497. btor(ZR36057_OCR_OvlEnable, ZR36057_OCR);
  498. /* ... and switch it on */
  499. btor(ZR36057_VDCR_VidEn, ZR36057_VDCR);
  500. } else {
  501. /* Switch it off */
  502. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  503. }
  504. }
  505. /*
  506. * The overlay mask has one bit for each pixel on a scan line,
  507. * and the maximum window size is BUZ_MAX_WIDTH * BUZ_MAX_HEIGHT pixels.
  508. */
  509. void
  510. write_overlay_mask (struct file *file,
  511. struct video_clip *vp,
  512. int count)
  513. {
  514. struct zoran_fh *fh = file->private_data;
  515. struct zoran *zr = fh->zr;
  516. unsigned mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  517. u32 *mask;
  518. int x, y, width, height;
  519. unsigned i, j, k;
  520. u32 reg;
  521. /* fill mask with one bits */
  522. memset(fh->overlay_mask, ~0, mask_line_size * 4 * BUZ_MAX_HEIGHT);
  523. reg = 0;
  524. for (i = 0; i < count; ++i) {
  525. /* pick up local copy of clip */
  526. x = vp[i].x;
  527. y = vp[i].y;
  528. width = vp[i].width;
  529. height = vp[i].height;
  530. /* trim clips that extend beyond the window */
  531. if (x < 0) {
  532. width += x;
  533. x = 0;
  534. }
  535. if (y < 0) {
  536. height += y;
  537. y = 0;
  538. }
  539. if (x + width > fh->overlay_settings.width) {
  540. width = fh->overlay_settings.width - x;
  541. }
  542. if (y + height > fh->overlay_settings.height) {
  543. height = fh->overlay_settings.height - y;
  544. }
  545. /* ignore degenerate clips */
  546. if (height <= 0) {
  547. continue;
  548. }
  549. if (width <= 0) {
  550. continue;
  551. }
  552. /* apply clip for each scan line */
  553. for (j = 0; j < height; ++j) {
  554. /* reset bit for each pixel */
  555. /* this can be optimized later if need be */
  556. mask = fh->overlay_mask + (y + j) * mask_line_size;
  557. for (k = 0; k < width; ++k) {
  558. mask[(x + k) / 32] &=
  559. ~((u32) 1 << (x + k) % 32);
  560. }
  561. }
  562. }
  563. }
  564. /* Enable/Disable uncompressed memory grabbing of the 36057 */
  565. void
  566. zr36057_set_memgrab (struct zoran *zr,
  567. int mode)
  568. {
  569. if (mode) {
  570. if (btread(ZR36057_VSSFGR) &
  571. (ZR36057_VSSFGR_SnapShot | ZR36057_VSSFGR_FrameGrab))
  572. dprintk(1,
  573. KERN_WARNING
  574. "%s: zr36057_set_memgrab(1) with SnapShot or FrameGrab on!?\n",
  575. ZR_DEVNAME(zr));
  576. /* switch on VSync interrupts */
  577. btwrite(IRQ_MASK, ZR36057_ISR); // Clear Interrupts
  578. btor(zr->card.vsync_int, ZR36057_ICR); // SW
  579. /* enable SnapShot */
  580. btor(ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  581. /* Set zr36057 video front end and enable video */
  582. zr36057_set_vfe(zr, zr->v4l_settings.width,
  583. zr->v4l_settings.height,
  584. zr->v4l_settings.format);
  585. zr->v4l_memgrab_active = 1;
  586. } else {
  587. zr->v4l_memgrab_active = 0;
  588. /* switch off VSync interrupts */
  589. btand(~zr->card.vsync_int, ZR36057_ICR); // SW
  590. /* reenable grabbing to screen if it was running */
  591. if (zr->v4l_overlay_active) {
  592. zr36057_overlay(zr, 1);
  593. } else {
  594. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  595. btand(~ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  596. }
  597. }
  598. }
  599. int
  600. wait_grab_pending (struct zoran *zr)
  601. {
  602. unsigned long flags;
  603. /* wait until all pending grabs are finished */
  604. if (!zr->v4l_memgrab_active)
  605. return 0;
  606. wait_event_interruptible(zr->v4l_capq,
  607. (zr->v4l_pend_tail == zr->v4l_pend_head));
  608. if (signal_pending(current))
  609. return -ERESTARTSYS;
  610. spin_lock_irqsave(&zr->spinlock, flags);
  611. zr36057_set_memgrab(zr, 0);
  612. spin_unlock_irqrestore(&zr->spinlock, flags);
  613. return 0;
  614. }
  615. /*****************************************************************************
  616. * *
  617. * Set up the Buz-specific MJPEG part *
  618. * *
  619. *****************************************************************************/
  620. static inline void
  621. set_frame (struct zoran *zr,
  622. int val)
  623. {
  624. GPIO(zr, zr->card.gpio[GPIO_JPEG_FRAME], val);
  625. }
  626. static void
  627. set_videobus_dir (struct zoran *zr,
  628. int val)
  629. {
  630. switch (zr->card.type) {
  631. case LML33:
  632. case LML33R10:
  633. if (lml33dpath == 0)
  634. GPIO(zr, 5, val);
  635. else
  636. GPIO(zr, 5, 1);
  637. break;
  638. default:
  639. GPIO(zr, zr->card.gpio[GPIO_VID_DIR],
  640. zr->card.gpio_pol[GPIO_VID_DIR] ? !val : val);
  641. break;
  642. }
  643. }
  644. static void
  645. init_jpeg_queue (struct zoran *zr)
  646. {
  647. int i;
  648. /* re-initialize DMA ring stuff */
  649. zr->jpg_que_head = 0;
  650. zr->jpg_dma_head = 0;
  651. zr->jpg_dma_tail = 0;
  652. zr->jpg_que_tail = 0;
  653. zr->jpg_seq_num = 0;
  654. zr->JPEG_error = 0;
  655. zr->num_errors = 0;
  656. zr->jpg_err_seq = 0;
  657. zr->jpg_err_shift = 0;
  658. zr->jpg_queued_num = 0;
  659. for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
  660. zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
  661. }
  662. for (i = 0; i < BUZ_NUM_STAT_COM; i++) {
  663. zr->stat_com[i] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
  664. }
  665. }
  666. static void
  667. zr36057_set_jpg (struct zoran *zr,
  668. enum zoran_codec_mode mode)
  669. {
  670. struct tvnorm *tvn;
  671. u32 reg;
  672. tvn = zr->timing;
  673. /* assert P_Reset, disable code transfer, deassert Active */
  674. btwrite(0, ZR36057_JPC);
  675. /* MJPEG compression mode */
  676. switch (mode) {
  677. case BUZ_MODE_MOTION_COMPRESS:
  678. default:
  679. reg = ZR36057_JMC_MJPGCmpMode;
  680. break;
  681. case BUZ_MODE_MOTION_DECOMPRESS:
  682. reg = ZR36057_JMC_MJPGExpMode;
  683. reg |= ZR36057_JMC_SyncMstr;
  684. /* RJ: The following is experimental - improves the output to screen */
  685. //if(zr->jpg_settings.VFIFO_FB) reg |= ZR36057_JMC_VFIFO_FB; // No, it doesn't. SM
  686. break;
  687. case BUZ_MODE_STILL_COMPRESS:
  688. reg = ZR36057_JMC_JPGCmpMode;
  689. break;
  690. case BUZ_MODE_STILL_DECOMPRESS:
  691. reg = ZR36057_JMC_JPGExpMode;
  692. break;
  693. }
  694. reg |= ZR36057_JMC_JPG;
  695. if (zr->jpg_settings.field_per_buff == 1)
  696. reg |= ZR36057_JMC_Fld_per_buff;
  697. btwrite(reg, ZR36057_JMC);
  698. /* vertical */
  699. btor(ZR36057_VFEVCR_VSPol, ZR36057_VFEVCR);
  700. reg = (6 << ZR36057_VSP_VsyncSize) |
  701. (tvn->Ht << ZR36057_VSP_FrmTot);
  702. btwrite(reg, ZR36057_VSP);
  703. reg = ((zr->jpg_settings.img_y + tvn->VStart) << ZR36057_FVAP_NAY) |
  704. (zr->jpg_settings.img_height << ZR36057_FVAP_PAY);
  705. btwrite(reg, ZR36057_FVAP);
  706. /* horizontal */
  707. if (zr->card.vfe_pol.hsync_pol)
  708. btor(ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  709. else
  710. btand(~ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  711. reg = ((tvn->HSyncStart) << ZR36057_HSP_HsyncStart) |
  712. (tvn->Wt << ZR36057_HSP_LineTot);
  713. btwrite(reg, ZR36057_HSP);
  714. reg = ((zr->jpg_settings.img_x +
  715. tvn->HStart + 4) << ZR36057_FHAP_NAX) |
  716. (zr->jpg_settings.img_width << ZR36057_FHAP_PAX);
  717. btwrite(reg, ZR36057_FHAP);
  718. /* field process parameters */
  719. if (zr->jpg_settings.odd_even)
  720. reg = ZR36057_FPP_Odd_Even;
  721. else
  722. reg = 0;
  723. btwrite(reg, ZR36057_FPP);
  724. /* Set proper VCLK Polarity, else colors will be wrong during playback */
  725. //btor(ZR36057_VFESPFR_VCLKPol, ZR36057_VFESPFR);
  726. /* code base address */
  727. reg = virt_to_bus(zr->stat_com);
  728. btwrite(reg, ZR36057_JCBA);
  729. /* FIFO threshold (FIFO is 160. double words) */
  730. /* NOTE: decimal values here */
  731. switch (mode) {
  732. case BUZ_MODE_STILL_COMPRESS:
  733. case BUZ_MODE_MOTION_COMPRESS:
  734. if (zr->card.type != BUZ)
  735. reg = 140;
  736. else
  737. reg = 60;
  738. break;
  739. case BUZ_MODE_STILL_DECOMPRESS:
  740. case BUZ_MODE_MOTION_DECOMPRESS:
  741. reg = 20;
  742. break;
  743. default:
  744. reg = 80;
  745. break;
  746. }
  747. btwrite(reg, ZR36057_JCFT);
  748. zr36057_adjust_vfe(zr, mode);
  749. }
  750. void
  751. print_interrupts (struct zoran *zr)
  752. {
  753. int res, noerr = 0;
  754. printk(KERN_INFO "%s: interrupts received:", ZR_DEVNAME(zr));
  755. if ((res = zr->field_counter) < -1 || res > 1) {
  756. printk(" FD:%d", res);
  757. }
  758. if ((res = zr->intr_counter_GIRQ1) != 0) {
  759. printk(" GIRQ1:%d", res);
  760. noerr++;
  761. }
  762. if ((res = zr->intr_counter_GIRQ0) != 0) {
  763. printk(" GIRQ0:%d", res);
  764. noerr++;
  765. }
  766. if ((res = zr->intr_counter_CodRepIRQ) != 0) {
  767. printk(" CodRepIRQ:%d", res);
  768. noerr++;
  769. }
  770. if ((res = zr->intr_counter_JPEGRepIRQ) != 0) {
  771. printk(" JPEGRepIRQ:%d", res);
  772. noerr++;
  773. }
  774. if (zr->JPEG_max_missed) {
  775. printk(" JPEG delays: max=%d min=%d", zr->JPEG_max_missed,
  776. zr->JPEG_min_missed);
  777. }
  778. if (zr->END_event_missed) {
  779. printk(" ENDs missed: %d", zr->END_event_missed);
  780. }
  781. //if (zr->jpg_queued_num) {
  782. printk(" queue_state=%ld/%ld/%ld/%ld", zr->jpg_que_tail,
  783. zr->jpg_dma_tail, zr->jpg_dma_head, zr->jpg_que_head);
  784. //}
  785. if (!noerr) {
  786. printk(": no interrupts detected.");
  787. }
  788. printk("\n");
  789. }
  790. void
  791. clear_interrupt_counters (struct zoran *zr)
  792. {
  793. zr->intr_counter_GIRQ1 = 0;
  794. zr->intr_counter_GIRQ0 = 0;
  795. zr->intr_counter_CodRepIRQ = 0;
  796. zr->intr_counter_JPEGRepIRQ = 0;
  797. zr->field_counter = 0;
  798. zr->IRQ1_in = 0;
  799. zr->IRQ1_out = 0;
  800. zr->JPEG_in = 0;
  801. zr->JPEG_out = 0;
  802. zr->JPEG_0 = 0;
  803. zr->JPEG_1 = 0;
  804. zr->END_event_missed = 0;
  805. zr->JPEG_missed = 0;
  806. zr->JPEG_max_missed = 0;
  807. zr->JPEG_min_missed = 0x7fffffff;
  808. }
  809. static u32
  810. count_reset_interrupt (struct zoran *zr)
  811. {
  812. u32 isr;
  813. if ((isr = btread(ZR36057_ISR) & 0x78000000)) {
  814. if (isr & ZR36057_ISR_GIRQ1) {
  815. btwrite(ZR36057_ISR_GIRQ1, ZR36057_ISR);
  816. zr->intr_counter_GIRQ1++;
  817. }
  818. if (isr & ZR36057_ISR_GIRQ0) {
  819. btwrite(ZR36057_ISR_GIRQ0, ZR36057_ISR);
  820. zr->intr_counter_GIRQ0++;
  821. }
  822. if (isr & ZR36057_ISR_CodRepIRQ) {
  823. btwrite(ZR36057_ISR_CodRepIRQ, ZR36057_ISR);
  824. zr->intr_counter_CodRepIRQ++;
  825. }
  826. if (isr & ZR36057_ISR_JPEGRepIRQ) {
  827. btwrite(ZR36057_ISR_JPEGRepIRQ, ZR36057_ISR);
  828. zr->intr_counter_JPEGRepIRQ++;
  829. }
  830. }
  831. return isr;
  832. }
  833. /* hack */
  834. extern void zr36016_write (struct videocodec *codec,
  835. u16 reg,
  836. u32 val);
  837. void
  838. jpeg_start (struct zoran *zr)
  839. {
  840. int reg;
  841. zr->frame_num = 0;
  842. /* deassert P_reset, disable code transfer, deassert Active */
  843. btwrite(ZR36057_JPC_P_Reset, ZR36057_JPC);
  844. /* stop flushing the internal code buffer */
  845. btand(~ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  846. /* enable code transfer */
  847. btor(ZR36057_JPC_CodTrnsEn, ZR36057_JPC);
  848. /* clear IRQs */
  849. btwrite(IRQ_MASK, ZR36057_ISR);
  850. /* enable the JPEG IRQs */
  851. btwrite(zr->card.jpeg_int |
  852. ZR36057_ICR_JPEGRepIRQ |
  853. ZR36057_ICR_IntPinEn,
  854. ZR36057_ICR);
  855. set_frame(zr, 0); // \FRAME
  856. /* set the JPEG codec guest ID */
  857. reg = (zr->card.gpcs[1] << ZR36057_JCGI_JPEGuestID) |
  858. (0 << ZR36057_JCGI_JPEGuestReg);
  859. btwrite(reg, ZR36057_JCGI);
  860. if (zr->card.video_vfe == CODEC_TYPE_ZR36016 &&
  861. zr->card.video_codec == CODEC_TYPE_ZR36050) {
  862. /* Enable processing on the ZR36016 */
  863. if (zr->vfe)
  864. zr36016_write(zr->vfe, 0, 1);
  865. /* load the address of the GO register in the ZR36050 latch */
  866. post_office_write(zr, 0, 0, 0);
  867. }
  868. /* assert Active */
  869. btor(ZR36057_JPC_Active, ZR36057_JPC);
  870. /* enable the Go generation */
  871. btor(ZR36057_JMC_Go_en, ZR36057_JMC);
  872. udelay(30);
  873. set_frame(zr, 1); // /FRAME
  874. dprintk(3, KERN_DEBUG "%s: jpeg_start\n", ZR_DEVNAME(zr));
  875. }
  876. void
  877. zr36057_enable_jpg (struct zoran *zr,
  878. enum zoran_codec_mode mode)
  879. {
  880. static int zero = 0;
  881. static int one = 1;
  882. struct vfe_settings cap;
  883. int field_size =
  884. zr->jpg_buffers.buffer_size / zr->jpg_settings.field_per_buff;
  885. zr->codec_mode = mode;
  886. cap.x = zr->jpg_settings.img_x;
  887. cap.y = zr->jpg_settings.img_y;
  888. cap.width = zr->jpg_settings.img_width;
  889. cap.height = zr->jpg_settings.img_height;
  890. cap.decimation =
  891. zr->jpg_settings.HorDcm | (zr->jpg_settings.VerDcm << 8);
  892. cap.quality = zr->jpg_settings.jpg_comp.quality;
  893. switch (mode) {
  894. case BUZ_MODE_MOTION_COMPRESS: {
  895. struct jpeg_app_marker app;
  896. struct jpeg_com_marker com;
  897. /* In motion compress mode, the decoder output must be enabled, and
  898. * the video bus direction set to input.
  899. */
  900. set_videobus_dir(zr, 0);
  901. decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
  902. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  903. /* Take the JPEG codec and the VFE out of sleep */
  904. jpeg_codec_sleep(zr, 0);
  905. /* set JPEG app/com marker */
  906. app.appn = zr->jpg_settings.jpg_comp.APPn;
  907. app.len = zr->jpg_settings.jpg_comp.APP_len;
  908. memcpy(app.data, zr->jpg_settings.jpg_comp.APP_data, 60);
  909. zr->codec->control(zr->codec, CODEC_S_JPEG_APP_DATA,
  910. sizeof(struct jpeg_app_marker), &app);
  911. com.len = zr->jpg_settings.jpg_comp.COM_len;
  912. memcpy(com.data, zr->jpg_settings.jpg_comp.COM_data, 60);
  913. zr->codec->control(zr->codec, CODEC_S_JPEG_COM_DATA,
  914. sizeof(struct jpeg_com_marker), &com);
  915. /* Setup the JPEG codec */
  916. zr->codec->control(zr->codec, CODEC_S_JPEG_TDS_BYTE,
  917. sizeof(int), &field_size);
  918. zr->codec->set_video(zr->codec, zr->timing, &cap,
  919. &zr->card.vfe_pol);
  920. zr->codec->set_mode(zr->codec, CODEC_DO_COMPRESSION);
  921. /* Setup the VFE */
  922. if (zr->vfe) {
  923. zr->vfe->control(zr->vfe, CODEC_S_JPEG_TDS_BYTE,
  924. sizeof(int), &field_size);
  925. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  926. &zr->card.vfe_pol);
  927. zr->vfe->set_mode(zr->vfe, CODEC_DO_COMPRESSION);
  928. }
  929. init_jpeg_queue(zr);
  930. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  931. clear_interrupt_counters(zr);
  932. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_COMPRESS)\n",
  933. ZR_DEVNAME(zr));
  934. break;
  935. }
  936. case BUZ_MODE_MOTION_DECOMPRESS:
  937. /* In motion decompression mode, the decoder output must be disabled, and
  938. * the video bus direction set to output.
  939. */
  940. decoder_command(zr, DECODER_ENABLE_OUTPUT, &zero);
  941. set_videobus_dir(zr, 1);
  942. encoder_command(zr, ENCODER_SET_INPUT, &one);
  943. /* Take the JPEG codec and the VFE out of sleep */
  944. jpeg_codec_sleep(zr, 0);
  945. /* Setup the VFE */
  946. if (zr->vfe) {
  947. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  948. &zr->card.vfe_pol);
  949. zr->vfe->set_mode(zr->vfe, CODEC_DO_EXPANSION);
  950. }
  951. /* Setup the JPEG codec */
  952. zr->codec->set_video(zr->codec, zr->timing, &cap,
  953. &zr->card.vfe_pol);
  954. zr->codec->set_mode(zr->codec, CODEC_DO_EXPANSION);
  955. init_jpeg_queue(zr);
  956. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  957. clear_interrupt_counters(zr);
  958. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_DECOMPRESS)\n",
  959. ZR_DEVNAME(zr));
  960. break;
  961. case BUZ_MODE_IDLE:
  962. default:
  963. /* shut down processing */
  964. btand(~(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ),
  965. ZR36057_ICR);
  966. btwrite(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ,
  967. ZR36057_ISR);
  968. btand(~ZR36057_JMC_Go_en, ZR36057_JMC); // \Go_en
  969. msleep(50);
  970. set_videobus_dir(zr, 0);
  971. set_frame(zr, 1); // /FRAME
  972. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR); // /CFlush
  973. btwrite(0, ZR36057_JPC); // \P_Reset,\CodTrnsEn,\Active
  974. btand(~ZR36057_JMC_VFIFO_FB, ZR36057_JMC);
  975. btand(~ZR36057_JMC_SyncMstr, ZR36057_JMC);
  976. jpeg_codec_reset(zr);
  977. jpeg_codec_sleep(zr, 1);
  978. zr36057_adjust_vfe(zr, mode);
  979. decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
  980. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  981. dprintk(2, KERN_INFO "%s: enable_jpg(IDLE)\n", ZR_DEVNAME(zr));
  982. break;
  983. }
  984. }
  985. /* when this is called the spinlock must be held */
  986. void
  987. zoran_feed_stat_com (struct zoran *zr)
  988. {
  989. /* move frames from pending queue to DMA */
  990. int frame, i, max_stat_com;
  991. max_stat_com =
  992. (zr->jpg_settings.TmpDcm ==
  993. 1) ? BUZ_NUM_STAT_COM : (BUZ_NUM_STAT_COM >> 1);
  994. while ((zr->jpg_dma_head - zr->jpg_dma_tail) < max_stat_com &&
  995. zr->jpg_dma_head < zr->jpg_que_head) {
  996. frame = zr->jpg_pend[zr->jpg_dma_head & BUZ_MASK_FRAME];
  997. if (zr->jpg_settings.TmpDcm == 1) {
  998. /* fill 1 stat_com entry */
  999. i = (zr->jpg_dma_head -
  1000. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1001. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  1002. break;
  1003. zr->stat_com[i] =
  1004. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1005. } else {
  1006. /* fill 2 stat_com entries */
  1007. i = ((zr->jpg_dma_head -
  1008. zr->jpg_err_shift) & 1) * 2;
  1009. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  1010. break;
  1011. zr->stat_com[i] =
  1012. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1013. zr->stat_com[i + 1] =
  1014. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1015. }
  1016. zr->jpg_buffers.buffer[frame].state = BUZ_STATE_DMA;
  1017. zr->jpg_dma_head++;
  1018. }
  1019. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS)
  1020. zr->jpg_queued_num++;
  1021. }
  1022. /* when this is called the spinlock must be held */
  1023. static void
  1024. zoran_reap_stat_com (struct zoran *zr)
  1025. {
  1026. /* move frames from DMA queue to done queue */
  1027. int i;
  1028. u32 stat_com;
  1029. unsigned int seq;
  1030. unsigned int dif;
  1031. struct zoran_jpg_buffer *buffer;
  1032. int frame;
  1033. /* In motion decompress we don't have a hardware frame counter,
  1034. * we just count the interrupts here */
  1035. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  1036. zr->jpg_seq_num++;
  1037. }
  1038. while (zr->jpg_dma_tail < zr->jpg_dma_head) {
  1039. if (zr->jpg_settings.TmpDcm == 1)
  1040. i = (zr->jpg_dma_tail -
  1041. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1042. else
  1043. i = ((zr->jpg_dma_tail -
  1044. zr->jpg_err_shift) & 1) * 2 + 1;
  1045. stat_com = le32_to_cpu(zr->stat_com[i]);
  1046. if ((stat_com & 1) == 0) {
  1047. return;
  1048. }
  1049. frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1050. buffer = &zr->jpg_buffers.buffer[frame];
  1051. do_gettimeofday(&buffer->bs.timestamp);
  1052. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1053. buffer->bs.length = (stat_com & 0x7fffff) >> 1;
  1054. /* update sequence number with the help of the counter in stat_com */
  1055. seq = ((stat_com >> 24) + zr->jpg_err_seq) & 0xff;
  1056. dif = (seq - zr->jpg_seq_num) & 0xff;
  1057. zr->jpg_seq_num += dif;
  1058. } else {
  1059. buffer->bs.length = 0;
  1060. }
  1061. buffer->bs.seq =
  1062. zr->jpg_settings.TmpDcm ==
  1063. 2 ? (zr->jpg_seq_num >> 1) : zr->jpg_seq_num;
  1064. buffer->state = BUZ_STATE_DONE;
  1065. zr->jpg_dma_tail++;
  1066. }
  1067. }
  1068. static void
  1069. error_handler (struct zoran *zr,
  1070. u32 astat,
  1071. u32 stat)
  1072. {
  1073. /* This is JPEG error handling part */
  1074. if ((zr->codec_mode != BUZ_MODE_MOTION_COMPRESS) &&
  1075. (zr->codec_mode != BUZ_MODE_MOTION_DECOMPRESS)) {
  1076. //dprintk(1, KERN_ERR "%s: Internal error: error handling request in mode %d\n", ZR_DEVNAME(zr), zr->codec_mode);
  1077. return;
  1078. }
  1079. if ((stat & 1) == 0 &&
  1080. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS &&
  1081. zr->jpg_dma_tail - zr->jpg_que_tail >=
  1082. zr->jpg_buffers.num_buffers) {
  1083. /* No free buffers... */
  1084. zoran_reap_stat_com(zr);
  1085. zoran_feed_stat_com(zr);
  1086. wake_up_interruptible(&zr->jpg_capq);
  1087. zr->JPEG_missed = 0;
  1088. return;
  1089. }
  1090. if (zr->JPEG_error != 1) {
  1091. /*
  1092. * First entry: error just happened during normal operation
  1093. *
  1094. * In BUZ_MODE_MOTION_COMPRESS:
  1095. *
  1096. * Possible glitch in TV signal. In this case we should
  1097. * stop the codec and wait for good quality signal before
  1098. * restarting it to avoid further problems
  1099. *
  1100. * In BUZ_MODE_MOTION_DECOMPRESS:
  1101. *
  1102. * Bad JPEG frame: we have to mark it as processed (codec crashed
  1103. * and was not able to do it itself), and to remove it from queue.
  1104. */
  1105. btand(~ZR36057_JMC_Go_en, ZR36057_JMC);
  1106. udelay(1);
  1107. stat = stat | (post_office_read(zr, 7, 0) & 3) << 8;
  1108. btwrite(0, ZR36057_JPC);
  1109. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  1110. jpeg_codec_reset(zr);
  1111. jpeg_codec_sleep(zr, 1);
  1112. zr->JPEG_error = 1;
  1113. zr->num_errors++;
  1114. /* Report error */
  1115. if (*zr_debug > 1 && zr->num_errors <= 8) {
  1116. long frame;
  1117. frame =
  1118. zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1119. printk(KERN_ERR
  1120. "%s: JPEG error stat=0x%08x(0x%08x) queue_state=%ld/%ld/%ld/%ld seq=%ld frame=%ld. Codec stopped. ",
  1121. ZR_DEVNAME(zr), stat, zr->last_isr,
  1122. zr->jpg_que_tail, zr->jpg_dma_tail,
  1123. zr->jpg_dma_head, zr->jpg_que_head,
  1124. zr->jpg_seq_num, frame);
  1125. printk("stat_com frames:");
  1126. {
  1127. int i, j;
  1128. for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
  1129. for (i = 0;
  1130. i < zr->jpg_buffers.num_buffers;
  1131. i++) {
  1132. if (le32_to_cpu(zr->stat_com[j]) ==
  1133. zr->jpg_buffers.
  1134. buffer[i].
  1135. frag_tab_bus) {
  1136. printk("% d->%d",
  1137. j, i);
  1138. }
  1139. }
  1140. }
  1141. printk("\n");
  1142. }
  1143. }
  1144. /* Find an entry in stat_com and rotate contents */
  1145. {
  1146. int i;
  1147. if (zr->jpg_settings.TmpDcm == 1)
  1148. i = (zr->jpg_dma_tail -
  1149. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1150. else
  1151. i = ((zr->jpg_dma_tail -
  1152. zr->jpg_err_shift) & 1) * 2;
  1153. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  1154. /* Mimic zr36067 operation */
  1155. zr->stat_com[i] |= cpu_to_le32(1);
  1156. if (zr->jpg_settings.TmpDcm != 1)
  1157. zr->stat_com[i + 1] |= cpu_to_le32(1);
  1158. /* Refill */
  1159. zoran_reap_stat_com(zr);
  1160. zoran_feed_stat_com(zr);
  1161. wake_up_interruptible(&zr->jpg_capq);
  1162. /* Find an entry in stat_com again after refill */
  1163. if (zr->jpg_settings.TmpDcm == 1)
  1164. i = (zr->jpg_dma_tail -
  1165. zr->jpg_err_shift) &
  1166. BUZ_MASK_STAT_COM;
  1167. else
  1168. i = ((zr->jpg_dma_tail -
  1169. zr->jpg_err_shift) & 1) * 2;
  1170. }
  1171. if (i) {
  1172. /* Rotate stat_comm entries to make current entry first */
  1173. int j;
  1174. u32 bus_addr[BUZ_NUM_STAT_COM];
  1175. /* Here we are copying the stat_com array, which
  1176. * is already in little endian format, so
  1177. * no endian conversions here
  1178. */
  1179. memcpy(bus_addr, zr->stat_com,
  1180. sizeof(bus_addr));
  1181. for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
  1182. zr->stat_com[j] =
  1183. bus_addr[(i + j) &
  1184. BUZ_MASK_STAT_COM];
  1185. }
  1186. zr->jpg_err_shift += i;
  1187. zr->jpg_err_shift &= BUZ_MASK_STAT_COM;
  1188. }
  1189. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)
  1190. zr->jpg_err_seq = zr->jpg_seq_num; /* + 1; */
  1191. }
  1192. }
  1193. /* Now the stat_comm buffer is ready for restart */
  1194. do {
  1195. int status, mode;
  1196. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1197. decoder_command(zr, DECODER_GET_STATUS, &status);
  1198. mode = CODEC_DO_COMPRESSION;
  1199. } else {
  1200. status = 0;
  1201. mode = CODEC_DO_EXPANSION;
  1202. }
  1203. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1204. (status & DECODER_STATUS_GOOD)) {
  1205. /********** RESTART code *************/
  1206. jpeg_codec_reset(zr);
  1207. zr->codec->set_mode(zr->codec, mode);
  1208. zr36057_set_jpg(zr, zr->codec_mode);
  1209. jpeg_start(zr);
  1210. if (zr->num_errors <= 8)
  1211. dprintk(2, KERN_INFO "%s: Restart\n",
  1212. ZR_DEVNAME(zr));
  1213. zr->JPEG_missed = 0;
  1214. zr->JPEG_error = 2;
  1215. /********** End RESTART code ***********/
  1216. }
  1217. } while (0);
  1218. }
  1219. irqreturn_t
  1220. zoran_irq (int irq,
  1221. void *dev_id,
  1222. struct pt_regs *regs)
  1223. {
  1224. u32 stat, astat;
  1225. int count;
  1226. struct zoran *zr;
  1227. unsigned long flags;
  1228. zr = (struct zoran *) dev_id;
  1229. count = 0;
  1230. if (zr->testing) {
  1231. /* Testing interrupts */
  1232. spin_lock_irqsave(&zr->spinlock, flags);
  1233. while ((stat = count_reset_interrupt(zr))) {
  1234. if (count++ > 100) {
  1235. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1236. dprintk(1,
  1237. KERN_ERR
  1238. "%s: IRQ lockup while testing, isr=0x%08x, cleared int mask\n",
  1239. ZR_DEVNAME(zr), stat);
  1240. wake_up_interruptible(&zr->test_q);
  1241. }
  1242. }
  1243. zr->last_isr = stat;
  1244. spin_unlock_irqrestore(&zr->spinlock, flags);
  1245. return IRQ_HANDLED;
  1246. }
  1247. spin_lock_irqsave(&zr->spinlock, flags);
  1248. while (1) {
  1249. /* get/clear interrupt status bits */
  1250. stat = count_reset_interrupt(zr);
  1251. astat = stat & IRQ_MASK;
  1252. if (!astat) {
  1253. break;
  1254. }
  1255. dprintk(4,
  1256. KERN_DEBUG
  1257. "zoran_irq: astat: 0x%08x, mask: 0x%08x\n",
  1258. astat, btread(ZR36057_ICR));
  1259. if (astat & zr->card.vsync_int) { // SW
  1260. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1261. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1262. /* count missed interrupts */
  1263. zr->JPEG_missed++;
  1264. }
  1265. //post_office_read(zr,1,0);
  1266. /* Interrupts may still happen when
  1267. * zr->v4l_memgrab_active is switched off.
  1268. * We simply ignore them */
  1269. if (zr->v4l_memgrab_active) {
  1270. /* A lot more checks should be here ... */
  1271. if ((btread(ZR36057_VSSFGR) &
  1272. ZR36057_VSSFGR_SnapShot) == 0)
  1273. dprintk(1,
  1274. KERN_WARNING
  1275. "%s: BuzIRQ with SnapShot off ???\n",
  1276. ZR_DEVNAME(zr));
  1277. if (zr->v4l_grab_frame != NO_GRAB_ACTIVE) {
  1278. /* There is a grab on a frame going on, check if it has finished */
  1279. if ((btread(ZR36057_VSSFGR) &
  1280. ZR36057_VSSFGR_FrameGrab) ==
  1281. 0) {
  1282. /* it is finished, notify the user */
  1283. zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE;
  1284. zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq;
  1285. do_gettimeofday(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp);
  1286. zr->v4l_grab_frame = NO_GRAB_ACTIVE;
  1287. zr->v4l_pend_tail++;
  1288. }
  1289. }
  1290. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE)
  1291. wake_up_interruptible(&zr->v4l_capq);
  1292. /* Check if there is another grab queued */
  1293. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE &&
  1294. zr->v4l_pend_tail != zr->v4l_pend_head) {
  1295. int frame = zr->v4l_pend[zr->v4l_pend_tail &
  1296. V4L_MASK_FRAME];
  1297. u32 reg;
  1298. zr->v4l_grab_frame = frame;
  1299. /* Set zr36057 video front end and enable video */
  1300. /* Buffer address */
  1301. reg =
  1302. zr->v4l_buffers.buffer[frame].
  1303. fbuffer_bus;
  1304. btwrite(reg, ZR36057_VDTR);
  1305. if (zr->v4l_settings.height >
  1306. BUZ_MAX_HEIGHT / 2)
  1307. reg +=
  1308. zr->v4l_settings.
  1309. bytesperline;
  1310. btwrite(reg, ZR36057_VDBR);
  1311. /* video stride, status, and frame grab register */
  1312. reg = 0;
  1313. if (zr->v4l_settings.height >
  1314. BUZ_MAX_HEIGHT / 2)
  1315. reg +=
  1316. zr->v4l_settings.
  1317. bytesperline;
  1318. reg =
  1319. (reg <<
  1320. ZR36057_VSSFGR_DispStride);
  1321. reg |= ZR36057_VSSFGR_VidOvf;
  1322. reg |= ZR36057_VSSFGR_SnapShot;
  1323. reg |= ZR36057_VSSFGR_FrameGrab;
  1324. btwrite(reg, ZR36057_VSSFGR);
  1325. btor(ZR36057_VDCR_VidEn,
  1326. ZR36057_VDCR);
  1327. }
  1328. }
  1329. /* even if we don't grab, we do want to increment
  1330. * the sequence counter to see lost frames */
  1331. zr->v4l_grab_seq++;
  1332. }
  1333. #if (IRQ_MASK & ZR36057_ISR_CodRepIRQ)
  1334. if (astat & ZR36057_ISR_CodRepIRQ) {
  1335. zr->intr_counter_CodRepIRQ++;
  1336. IDEBUG(printk
  1337. (KERN_DEBUG "%s: ZR36057_ISR_CodRepIRQ\n",
  1338. ZR_DEVNAME(zr)));
  1339. btand(~ZR36057_ICR_CodRepIRQ, ZR36057_ICR);
  1340. }
  1341. #endif /* (IRQ_MASK & ZR36057_ISR_CodRepIRQ) */
  1342. #if (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ)
  1343. if (astat & ZR36057_ISR_JPEGRepIRQ) {
  1344. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1345. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1346. if (*zr_debug > 1 &&
  1347. (!zr->frame_num || zr->JPEG_error)) {
  1348. printk(KERN_INFO
  1349. "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n",
  1350. ZR_DEVNAME(zr), stat,
  1351. zr->jpg_settings.odd_even,
  1352. zr->jpg_settings.
  1353. field_per_buff,
  1354. zr->JPEG_missed);
  1355. {
  1356. char sc[] = "0000";
  1357. char sv[5];
  1358. int i;
  1359. strcpy(sv, sc);
  1360. for (i = 0; i < 4; i++) {
  1361. if (le32_to_cpu(zr->stat_com[i]) & 1)
  1362. sv[i] = '1';
  1363. }
  1364. sv[4] = 0;
  1365. printk(KERN_INFO
  1366. "%s: stat_com=%s queue_state=%ld/%ld/%ld/%ld\n",
  1367. ZR_DEVNAME(zr), sv,
  1368. zr->jpg_que_tail,
  1369. zr->jpg_dma_tail,
  1370. zr->jpg_dma_head,
  1371. zr->jpg_que_head);
  1372. }
  1373. } else {
  1374. if (zr->JPEG_missed > zr->JPEG_max_missed) // Get statistics
  1375. zr->JPEG_max_missed =
  1376. zr->JPEG_missed;
  1377. if (zr->JPEG_missed <
  1378. zr->JPEG_min_missed)
  1379. zr->JPEG_min_missed =
  1380. zr->JPEG_missed;
  1381. }
  1382. if (*zr_debug > 2 && zr->frame_num < 6) {
  1383. int i;
  1384. printk("%s: seq=%ld stat_com:",
  1385. ZR_DEVNAME(zr), zr->jpg_seq_num);
  1386. for (i = 0; i < 4; i++) {
  1387. printk(" %08x",
  1388. le32_to_cpu(zr->stat_com[i]));
  1389. }
  1390. printk("\n");
  1391. }
  1392. zr->frame_num++;
  1393. zr->JPEG_missed = 0;
  1394. zr->JPEG_error = 0;
  1395. zoran_reap_stat_com(zr);
  1396. zoran_feed_stat_com(zr);
  1397. wake_up_interruptible(&zr->jpg_capq);
  1398. } /*else {
  1399. dprintk(1,
  1400. KERN_ERR
  1401. "%s: JPEG interrupt while not in motion (de)compress mode!\n",
  1402. ZR_DEVNAME(zr));
  1403. }*/
  1404. }
  1405. #endif /* (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ) */
  1406. /* DATERR, too many fields missed, error processing */
  1407. if ((astat & zr->card.jpeg_int) ||
  1408. zr->JPEG_missed > 25 ||
  1409. zr->JPEG_error == 1 ||
  1410. ((zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) &&
  1411. (zr->frame_num & (zr->JPEG_missed >
  1412. zr->jpg_settings.field_per_buff)))) {
  1413. error_handler(zr, astat, stat);
  1414. }
  1415. count++;
  1416. if (count > 10) {
  1417. dprintk(2, KERN_WARNING "%s: irq loop %d\n",
  1418. ZR_DEVNAME(zr), count);
  1419. if (count > 20) {
  1420. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1421. dprintk(2,
  1422. KERN_ERR
  1423. "%s: IRQ lockup, cleared int mask\n",
  1424. ZR_DEVNAME(zr));
  1425. break;
  1426. }
  1427. }
  1428. zr->last_isr = stat;
  1429. }
  1430. spin_unlock_irqrestore(&zr->spinlock, flags);
  1431. return IRQ_HANDLED;
  1432. }
  1433. void
  1434. zoran_set_pci_master (struct zoran *zr,
  1435. int set_master)
  1436. {
  1437. if (set_master) {
  1438. pci_set_master(zr->pci_dev);
  1439. } else {
  1440. u16 command;
  1441. pci_read_config_word(zr->pci_dev, PCI_COMMAND, &command);
  1442. command &= ~PCI_COMMAND_MASTER;
  1443. pci_write_config_word(zr->pci_dev, PCI_COMMAND, command);
  1444. }
  1445. }
  1446. void
  1447. zoran_init_hardware (struct zoran *zr)
  1448. {
  1449. int j, zero = 0;
  1450. /* Enable bus-mastering */
  1451. zoran_set_pci_master(zr, 1);
  1452. /* Initialize the board */
  1453. if (zr->card.init) {
  1454. zr->card.init(zr);
  1455. }
  1456. j = zr->card.input[zr->input].muxsel;
  1457. decoder_command(zr, 0, NULL);
  1458. decoder_command(zr, DECODER_SET_NORM, &zr->norm);
  1459. decoder_command(zr, DECODER_SET_INPUT, &j);
  1460. encoder_command(zr, 0, NULL);
  1461. encoder_command(zr, ENCODER_SET_NORM, &zr->norm);
  1462. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  1463. /* toggle JPEG codec sleep to sync PLL */
  1464. jpeg_codec_sleep(zr, 1);
  1465. jpeg_codec_sleep(zr, 0);
  1466. /* set individual interrupt enables (without GIRQ1)
  1467. * but don't global enable until zoran_open() */
  1468. //btwrite(IRQ_MASK & ~ZR36057_ISR_GIRQ1, ZR36057_ICR); // SW
  1469. // It looks like using only JPEGRepIRQEn is not always reliable,
  1470. // may be when JPEG codec crashes it won't generate IRQ? So,
  1471. /*CP*/ // btwrite(IRQ_MASK, ZR36057_ICR); // Enable Vsync interrupts too. SM WHY ? LP
  1472. zr36057_init_vfe(zr);
  1473. zr36057_enable_jpg(zr, BUZ_MODE_IDLE);
  1474. btwrite(IRQ_MASK, ZR36057_ISR); // Clears interrupts
  1475. }
  1476. void
  1477. zr36057_restart (struct zoran *zr)
  1478. {
  1479. btwrite(0, ZR36057_SPGPPCR);
  1480. mdelay(1);
  1481. btor(ZR36057_SPGPPCR_SoftReset, ZR36057_SPGPPCR);
  1482. mdelay(1);
  1483. /* assert P_Reset */
  1484. btwrite(0, ZR36057_JPC);
  1485. /* set up GPIO direction - all output */
  1486. btwrite(ZR36057_SPGPPCR_SoftReset | 0, ZR36057_SPGPPCR);
  1487. /* set up GPIO pins and guest bus timing */
  1488. btwrite((0x81 << 24) | 0x8888, ZR36057_GPPGCR1);
  1489. }
  1490. /*
  1491. * initialize video front end
  1492. */
  1493. static void
  1494. zr36057_init_vfe (struct zoran *zr)
  1495. {
  1496. u32 reg;
  1497. reg = btread(ZR36057_VFESPFR);
  1498. reg |= ZR36057_VFESPFR_LittleEndian;
  1499. reg &= ~ZR36057_VFESPFR_VCLKPol;
  1500. reg |= ZR36057_VFESPFR_ExtFl;
  1501. reg |= ZR36057_VFESPFR_TopField;
  1502. btwrite(reg, ZR36057_VFESPFR);
  1503. reg = btread(ZR36057_VDCR);
  1504. if (pci_pci_problems & PCIPCI_TRITON)
  1505. // || zr->revision < 1) // Revision 1 has also Triton support
  1506. reg &= ~ZR36057_VDCR_Triton;
  1507. else
  1508. reg |= ZR36057_VDCR_Triton;
  1509. btwrite(reg, ZR36057_VDCR);
  1510. }
  1511. /*
  1512. * Interface to decoder and encoder chips using i2c bus
  1513. */
  1514. int
  1515. decoder_command (struct zoran *zr,
  1516. int cmd,
  1517. void *data)
  1518. {
  1519. if (zr->decoder == NULL)
  1520. return -EIO;
  1521. if (zr->card.type == LML33 &&
  1522. (cmd == DECODER_SET_NORM || DECODER_SET_INPUT)) {
  1523. int res;
  1524. // Bt819 needs to reset its FIFO buffer using #FRST pin and
  1525. // LML33 card uses GPIO(7) for that.
  1526. GPIO(zr, 7, 0);
  1527. res = zr->decoder->driver->command(zr->decoder, cmd, data);
  1528. // Pull #FRST high.
  1529. GPIO(zr, 7, 1);
  1530. return res;
  1531. } else
  1532. return zr->decoder->driver->command(zr->decoder, cmd,
  1533. data);
  1534. }
  1535. int
  1536. encoder_command (struct zoran *zr,
  1537. int cmd,
  1538. void *data)
  1539. {
  1540. if (zr->encoder == NULL)
  1541. return -1;
  1542. return zr->encoder->driver->command(zr->encoder, cmd, data);
  1543. }