stradis.c 66 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258
  1. /*
  2. * stradis.c - stradis 4:2:2 mpeg decoder driver
  3. *
  4. * Stradis 4:2:2 MPEG-2 Decoder Driver
  5. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/fs.h>
  25. #include <linux/kernel.h>
  26. #include <linux/major.h>
  27. #include <linux/slab.h>
  28. #include <linux/mm.h>
  29. #include <linux/init.h>
  30. #include <linux/poll.h>
  31. #include <linux/pci.h>
  32. #include <linux/signal.h>
  33. #include <asm/io.h>
  34. #include <linux/ioport.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <linux/sched.h>
  38. #include <asm/types.h>
  39. #include <linux/types.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include <linux/vmalloc.h>
  43. #include <linux/videodev.h>
  44. #include "saa7146.h"
  45. #include "saa7146reg.h"
  46. #include "ibmmpeg2.h"
  47. #include "saa7121.h"
  48. #include "cs8420.h"
  49. #define DEBUG(x) /* debug driver */
  50. #undef IDEBUG /* debug irq handler */
  51. #undef MDEBUG /* debug memory management */
  52. #define SAA7146_MAX 6
  53. static struct saa7146 saa7146s[SAA7146_MAX];
  54. static int saa_num = 0; /* number of SAA7146s in use */
  55. static int video_nr = -1;
  56. module_param(video_nr, int, 0);
  57. MODULE_LICENSE("GPL");
  58. #define nDebNormal 0x00480000
  59. #define nDebNoInc 0x00480000
  60. #define nDebVideo 0xd0480000
  61. #define nDebAudio 0xd0400000
  62. #define nDebDMA 0x02c80000
  63. #define oDebNormal 0x13c80000
  64. #define oDebNoInc 0x13c80000
  65. #define oDebVideo 0xd1080000
  66. #define oDebAudio 0xd1080000
  67. #define oDebDMA 0x03080000
  68. #define NewCard (saa->boardcfg[3])
  69. #define ChipControl (saa->boardcfg[1])
  70. #define NTSCFirstActive (saa->boardcfg[4])
  71. #define PALFirstActive (saa->boardcfg[5])
  72. #define NTSCLastActive (saa->boardcfg[54])
  73. #define PALLastActive (saa->boardcfg[55])
  74. #define Have2MB (saa->boardcfg[18] & 0x40)
  75. #define HaveCS8420 (saa->boardcfg[18] & 0x04)
  76. #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
  77. #define HaveCS3310 (saa->boardcfg[18] & 0x01)
  78. #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
  79. #define HaveCS4341 (saa->boardcfg[40] == 2)
  80. #define SDIType (saa->boardcfg[27])
  81. #define CurrentMode (saa->boardcfg[2])
  82. #define debNormal (NewCard ? nDebNormal : oDebNormal)
  83. #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
  84. #define debVideo (NewCard ? nDebVideo : oDebVideo)
  85. #define debAudio (NewCard ? nDebAudio : oDebAudio)
  86. #define debDMA (NewCard ? nDebDMA : oDebDMA)
  87. #ifdef USE_RESCUE_EEPROM_SDM275
  88. static unsigned char rescue_eeprom[64] = {
  89. 0x00,0x01,0x04,0x13,0x26,0x0f,0x10,0x00,0x00,0x00,0x43,0x63,0x22,0x01,0x29,0x15,0x73,0x00,0x1f, 'd', 'e', 'c', 'x', 'l', 'd', 'v', 'a',0x02,0x00,0x01,0x00,0xcc,0xa4,0x63,0x09,0xe2,0x10,0x00,0x0a,0x00,0x02,0x02, 'd', 'e', 'c', 'x', 'l', 'a',0x00,0x00,0x42,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
  90. };
  91. #endif
  92. /* ----------------------------------------------------------------------- */
  93. /* Hardware I2C functions */
  94. static void I2CWipe(struct saa7146 *saa)
  95. {
  96. int i;
  97. /* set i2c to ~=100kHz, abort transfer, clear busy */
  98. saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
  99. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  100. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  101. /* wait for i2c registers to be programmed */
  102. for (i = 0; i < 1000 &&
  103. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  104. schedule();
  105. saawrite(0x600, SAA7146_I2C_STATUS);
  106. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  107. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  108. /* wait for i2c registers to be programmed */
  109. for (i = 0; i < 1000 &&
  110. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  111. schedule();
  112. saawrite(0x600, SAA7146_I2C_STATUS);
  113. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  114. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  115. /* wait for i2c registers to be programmed */
  116. for (i = 0; i < 1000 &&
  117. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  118. schedule();
  119. }
  120. /* read I2C */
  121. static int I2CRead(struct saa7146 *saa, unsigned char addr,
  122. unsigned char subaddr, int dosub)
  123. {
  124. int i;
  125. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  126. I2CWipe(saa);
  127. for (i = 0; i < 1000 &&
  128. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  129. schedule();
  130. if (i == 1000)
  131. I2CWipe(saa);
  132. if (dosub)
  133. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
  134. ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
  135. else
  136. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
  137. 0xf1, SAA7146_I2C_TRANSFER);
  138. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  139. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  140. /* wait for i2c registers to be programmed */
  141. for (i = 0; i < 1000 &&
  142. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  143. schedule();
  144. /* wait for valid data */
  145. for (i = 0; i < 1000 &&
  146. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  147. schedule();
  148. if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
  149. return -1;
  150. if (i == 1000)
  151. printk("i2c setup read timeout\n");
  152. saawrite(0x41, SAA7146_I2C_TRANSFER);
  153. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  154. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  155. /* wait for i2c registers to be programmed */
  156. for (i = 0; i < 1000 &&
  157. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  158. schedule();
  159. /* wait for valid data */
  160. for (i = 0; i < 1000 &&
  161. (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
  162. schedule();
  163. if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
  164. return -1;
  165. if (i == 1000)
  166. printk("i2c read timeout\n");
  167. return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
  168. }
  169. /* set both to write both bytes, reset it to write only b1 */
  170. static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
  171. unsigned char b2, int both)
  172. {
  173. int i;
  174. u32 data;
  175. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  176. I2CWipe(saa);
  177. for (i = 0; i < 1000 &&
  178. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  179. schedule();
  180. if (i == 1000)
  181. I2CWipe(saa);
  182. data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
  183. if (both)
  184. data |= ((b2 & 0xff) << 8) | 0xe5;
  185. else
  186. data |= 0xd1;
  187. saawrite(data, SAA7146_I2C_TRANSFER);
  188. saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
  189. SAA7146_MC2);
  190. return 0;
  191. }
  192. static void attach_inform(struct saa7146 *saa, int id)
  193. {
  194. int i;
  195. DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, id));
  196. if (id == 0xa0) { /* we have rev2 or later board, fill in info */
  197. for (i = 0; i < 64; i++)
  198. saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
  199. #ifdef USE_RESCUE_EEPROM_SDM275
  200. if (saa->boardcfg[0] != 0) {
  201. printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE BEEN IGNORED\n", saa->nr);
  202. for (i = 0; i < 64; i++)
  203. saa->boardcfg[i] = rescue_eeprom[i];
  204. }
  205. #endif
  206. printk("stradis%d: config =", saa->nr);
  207. for (i = 0; i < 51; i++) {
  208. printk(" %02x",saa->boardcfg[i]);
  209. }
  210. printk("\n");
  211. }
  212. }
  213. static void I2CBusScan(struct saa7146 *saa)
  214. {
  215. int i;
  216. for (i = 0; i < 0xff; i += 2)
  217. if ((I2CRead(saa, i, 0, 0)) >= 0)
  218. attach_inform(saa, i);
  219. }
  220. static int debiwait_maxwait = 0;
  221. static int wait_for_debi_done(struct saa7146 *saa)
  222. {
  223. int i;
  224. /* wait for registers to be programmed */
  225. for (i = 0; i < 100000 &&
  226. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
  227. saaread(SAA7146_MC2);
  228. /* wait for transfer to complete */
  229. for (i = 0; i < 500000 &&
  230. (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
  231. saaread(SAA7146_MC2);
  232. if (i > debiwait_maxwait)
  233. printk("wait-for-debi-done maxwait: %d\n",
  234. debiwait_maxwait = i);
  235. if (i == 500000)
  236. return -1;
  237. return 0;
  238. }
  239. static int debiwrite(struct saa7146 *saa, u32 config, int addr,
  240. u32 val, int count)
  241. {
  242. u32 cmd;
  243. if (count <= 0 || count > 32764)
  244. return -1;
  245. if (wait_for_debi_done(saa) < 0)
  246. return -1;
  247. saawrite(config, SAA7146_DEBI_CONFIG);
  248. if (count <= 4) /* immediate transfer */
  249. saawrite(val, SAA7146_DEBI_AD);
  250. else /* block transfer */
  251. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  252. saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
  253. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  254. SAA7146_MC2);
  255. return 0;
  256. }
  257. static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
  258. {
  259. u32 result = 0;
  260. if (count > 32764 || count <= 0)
  261. return 0;
  262. if (wait_for_debi_done(saa) < 0)
  263. return 0;
  264. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  265. saawrite((count << 17) | 0x10000 | (addr & 0xffff),
  266. SAA7146_DEBI_COMMAND);
  267. saawrite(config, SAA7146_DEBI_CONFIG);
  268. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  269. SAA7146_MC2);
  270. if (count > 4) /* not an immediate transfer */
  271. return count;
  272. wait_for_debi_done(saa);
  273. result = saaread(SAA7146_DEBI_AD);
  274. if (count == 1)
  275. result &= 0xff;
  276. if (count == 2)
  277. result &= 0xffff;
  278. if (count == 3)
  279. result &= 0xffffff;
  280. return result;
  281. }
  282. #if 0 /* unused */
  283. /* MUST be a multiple of 8 bytes and 8-byte aligned and < 32768 bytes */
  284. /* data copied into saa->dmadebi buffer, caller must re-enable interrupts */
  285. static void ibm_block_dram_read(struct saa7146 *saa, int address, int bytes)
  286. {
  287. int i, j;
  288. u32 *buf;
  289. buf = (u32 *) saa->dmadebi;
  290. if (bytes > 0x7000)
  291. bytes = 0x7000;
  292. saawrite(0, SAA7146_IER); /* disable interrupts */
  293. for (i=0; i < 10000 &&
  294. (debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
  295. & 0x8000); i++)
  296. saaread(SAA7146_MC2);
  297. if (i == 10000)
  298. printk(KERN_ERR "stradis%d: dram_busy never cleared\n",
  299. saa->nr);
  300. debiwrite(saa, debNormal, IBM_MP2_SRC_ADDR, (address<<16) |
  301. (address>>16), 4);
  302. debiwrite(saa, debNormal, IBM_MP2_BLOCK_SIZE, bytes, 2);
  303. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 0x8a10, 2);
  304. for (j = 0; j < bytes/4; j++) {
  305. for (i = 0; i < 10000 &&
  306. (!(debiread(saa, debNormal, IBM_MP2_DRAM_CMD_STAT, 2)
  307. & 0x4000)); i++)
  308. saaread(SAA7146_MC2);
  309. if (i == 10000)
  310. printk(KERN_ERR "stradis%d: dram_ready never set\n",
  311. saa->nr);
  312. buf[j] = debiread(saa, debNormal, IBM_MP2_DRAM_DATA, 4);
  313. }
  314. }
  315. #endif /* unused */
  316. static void do_irq_send_data(struct saa7146 *saa)
  317. {
  318. int split, audbytes, vidbytes;
  319. saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
  320. /* if special feature mode in effect, disable audio sending */
  321. if (saa->playmode != VID_PLAY_NORMAL)
  322. saa->audtail = saa->audhead = 0;
  323. if (saa->audhead <= saa->audtail)
  324. audbytes = saa->audtail - saa->audhead;
  325. else
  326. audbytes = 65536 - (saa->audhead - saa->audtail);
  327. if (saa->vidhead <= saa->vidtail)
  328. vidbytes = saa->vidtail - saa->vidhead;
  329. else
  330. vidbytes = 524288 - (saa->vidhead - saa->vidtail);
  331. if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
  332. saawrite(0, SAA7146_IER);
  333. return;
  334. }
  335. /* if at least 1 block audio waiting and audio fifo isn't full */
  336. if (audbytes >= 2048 && (debiread(saa, debNormal,
  337. IBM_MP2_AUD_FIFO, 2) & 0xff) < 60) {
  338. if (saa->audhead > saa->audtail)
  339. split = 65536 - saa->audhead;
  340. else
  341. split = 0;
  342. audbytes = 2048;
  343. if (split > 0 && split < 2048) {
  344. memcpy(saa->dmadebi, saa->audbuf + saa->audhead,
  345. split);
  346. saa->audhead = 0;
  347. audbytes -= split;
  348. } else
  349. split = 0;
  350. memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
  351. audbytes);
  352. saa->audhead += audbytes;
  353. saa->audhead &= 0xffff;
  354. debiwrite(saa, debAudio, (NewCard? IBM_MP2_AUD_FIFO :
  355. IBM_MP2_AUD_FIFOW), 0, 2048);
  356. wake_up_interruptible(&saa->audq);
  357. /* if at least 1 block video waiting and video fifo isn't full */
  358. } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
  359. IBM_MP2_FIFO, 2)) < 16384) {
  360. if (saa->vidhead > saa->vidtail)
  361. split = 524288 - saa->vidhead;
  362. else
  363. split = 0;
  364. vidbytes = 30720;
  365. if (split > 0 && split < 30720) {
  366. memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead,
  367. split);
  368. saa->vidhead = 0;
  369. vidbytes -= split;
  370. } else
  371. split = 0;
  372. memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
  373. vidbytes);
  374. saa->vidhead += vidbytes;
  375. saa->vidhead &= 0x7ffff;
  376. debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
  377. IBM_MP2_FIFOW), 0, 30720);
  378. wake_up_interruptible(&saa->vidq);
  379. }
  380. saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
  381. }
  382. static void send_osd_data(struct saa7146 *saa)
  383. {
  384. int size = saa->osdtail - saa->osdhead;
  385. if (size > 30720)
  386. size = 30720;
  387. /* ensure some multiple of 8 bytes is transferred */
  388. size = 8 * ((size + 8)>>3);
  389. if (size) {
  390. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
  391. (saa->osdhead>>3), 2);
  392. memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
  393. saa->osdhead += size;
  394. /* block transfer of next 8 bytes to ~32k bytes */
  395. debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
  396. }
  397. if (saa->osdhead >= saa->osdtail) {
  398. saa->osdhead = saa->osdtail = 0;
  399. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  400. }
  401. }
  402. static irqreturn_t saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
  403. {
  404. struct saa7146 *saa = (struct saa7146 *) dev_id;
  405. u32 stat, astat;
  406. int count;
  407. int handled = 0;
  408. count = 0;
  409. while (1) {
  410. /* get/clear interrupt status bits */
  411. stat = saaread(SAA7146_ISR);
  412. astat = stat & saaread(SAA7146_IER);
  413. if (!astat)
  414. break;
  415. handled = 1;
  416. saawrite(astat, SAA7146_ISR);
  417. if (astat & SAA7146_PSR_DEBI_S) {
  418. do_irq_send_data(saa);
  419. }
  420. if (astat & SAA7146_PSR_PIN1) {
  421. int istat;
  422. /* the following read will trigger DEBI_S */
  423. istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  424. if (istat & 1) {
  425. saawrite(0, SAA7146_IER);
  426. send_osd_data(saa);
  427. saawrite(SAA7146_PSR_DEBI_S |
  428. SAA7146_PSR_PIN1, SAA7146_IER);
  429. }
  430. if (istat & 0x20) { /* Video Start */
  431. saa->vidinfo.frame_count++;
  432. }
  433. if (istat & 0x400) { /* Picture Start */
  434. /* update temporal reference */
  435. }
  436. if (istat & 0x200) { /* Picture Resolution Change */
  437. /* read new resolution */
  438. }
  439. if (istat & 0x100) { /* New User Data found */
  440. /* read new user data */
  441. }
  442. if (istat & 0x1000) { /* new GOP/SMPTE */
  443. /* read new SMPTE */
  444. }
  445. if (istat & 0x8000) { /* Sequence Start Code */
  446. /* reset frame counter, load sizes */
  447. saa->vidinfo.frame_count = 0;
  448. saa->vidinfo.h_size = 704;
  449. saa->vidinfo.v_size = 480;
  450. #if 0
  451. if (saa->endmarkhead != saa->endmarktail) {
  452. saa->audhead =
  453. saa->endmark[saa->endmarkhead];
  454. saa->endmarkhead++;
  455. if (saa->endmarkhead >= MAX_MARKS)
  456. saa->endmarkhead = 0;
  457. }
  458. #endif
  459. }
  460. if (istat & 0x4000) { /* Sequence Error Code */
  461. if (saa->endmarkhead != saa->endmarktail) {
  462. saa->audhead =
  463. saa->endmark[saa->endmarkhead];
  464. saa->endmarkhead++;
  465. if (saa->endmarkhead >= MAX_MARKS)
  466. saa->endmarkhead = 0;
  467. }
  468. }
  469. }
  470. #ifdef IDEBUG
  471. if (astat & SAA7146_PSR_PPEF) {
  472. IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
  473. }
  474. if (astat & SAA7146_PSR_PABO) {
  475. IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
  476. }
  477. if (astat & SAA7146_PSR_PPED) {
  478. IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
  479. }
  480. if (astat & SAA7146_PSR_RPS_I1) {
  481. IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
  482. }
  483. if (astat & SAA7146_PSR_RPS_I0) {
  484. IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
  485. }
  486. if (astat & SAA7146_PSR_RPS_LATE1) {
  487. IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
  488. }
  489. if (astat & SAA7146_PSR_RPS_LATE0) {
  490. IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
  491. }
  492. if (astat & SAA7146_PSR_RPS_E1) {
  493. IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
  494. }
  495. if (astat & SAA7146_PSR_RPS_E0) {
  496. IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
  497. }
  498. if (astat & SAA7146_PSR_RPS_TO1) {
  499. IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
  500. }
  501. if (astat & SAA7146_PSR_RPS_TO0) {
  502. IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
  503. }
  504. if (astat & SAA7146_PSR_UPLD) {
  505. IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
  506. }
  507. if (astat & SAA7146_PSR_DEBI_E) {
  508. IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
  509. }
  510. if (astat & SAA7146_PSR_I2C_S) {
  511. IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
  512. }
  513. if (astat & SAA7146_PSR_I2C_E) {
  514. IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
  515. }
  516. if (astat & SAA7146_PSR_A2_IN) {
  517. IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
  518. }
  519. if (astat & SAA7146_PSR_A2_OUT) {
  520. IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
  521. }
  522. if (astat & SAA7146_PSR_A1_IN) {
  523. IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
  524. }
  525. if (astat & SAA7146_PSR_A1_OUT) {
  526. IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
  527. }
  528. if (astat & SAA7146_PSR_AFOU) {
  529. IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
  530. }
  531. if (astat & SAA7146_PSR_V_PE) {
  532. IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
  533. }
  534. if (astat & SAA7146_PSR_VFOU) {
  535. IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
  536. }
  537. if (astat & SAA7146_PSR_FIDA) {
  538. IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
  539. }
  540. if (astat & SAA7146_PSR_FIDB) {
  541. IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
  542. }
  543. if (astat & SAA7146_PSR_PIN3) {
  544. IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
  545. }
  546. if (astat & SAA7146_PSR_PIN2) {
  547. IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
  548. }
  549. if (astat & SAA7146_PSR_PIN0) {
  550. IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
  551. }
  552. if (astat & SAA7146_PSR_ECS) {
  553. IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
  554. }
  555. if (astat & SAA7146_PSR_EC3S) {
  556. IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
  557. }
  558. if (astat & SAA7146_PSR_EC0S) {
  559. IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
  560. }
  561. #endif
  562. count++;
  563. if (count > 15)
  564. printk(KERN_WARNING "stradis%d: irq loop %d\n",
  565. saa->nr, count);
  566. if (count > 20) {
  567. saawrite(0, SAA7146_IER);
  568. printk(KERN_ERR
  569. "stradis%d: IRQ loop cleared\n", saa->nr);
  570. }
  571. }
  572. return IRQ_RETVAL(handled);
  573. }
  574. static int ibm_send_command(struct saa7146 *saa,
  575. int command, int data, int chain)
  576. {
  577. int i;
  578. if (chain)
  579. debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1) | 1, 2);
  580. else
  581. debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
  582. debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
  583. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
  584. for (i = 0; i < 100 &&
  585. (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
  586. schedule();
  587. if (i == 100)
  588. return -1;
  589. return 0;
  590. }
  591. static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
  592. {
  593. I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
  594. I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
  595. }
  596. static void initialize_cs4341(struct saa7146 *saa)
  597. {
  598. int i;
  599. for (i = 0; i < 200; i++) {
  600. /* auto mute off, power on, no de-emphasis */
  601. /* I2S data up to 24-bit 64xFs internal SCLK */
  602. I2CWrite(saa, 0x22, 0x01, 0x11, 2);
  603. /* ATAPI mixer settings */
  604. I2CWrite(saa, 0x22, 0x02, 0x49, 2);
  605. /* attenuation left 3db */
  606. I2CWrite(saa, 0x22, 0x03, 0x00, 2);
  607. /* attenuation right 3db */
  608. I2CWrite(saa, 0x22, 0x04, 0x00, 2);
  609. I2CWrite(saa, 0x22, 0x01, 0x10, 2);
  610. if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
  611. break;
  612. schedule();
  613. }
  614. printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
  615. return;
  616. }
  617. static void initialize_cs8420(struct saa7146 *saa, int pro)
  618. {
  619. int i;
  620. u8 *sequence;
  621. if (pro)
  622. sequence = mode8420pro;
  623. else
  624. sequence = mode8420con;
  625. for (i = 0; i < INIT8420LEN; i++)
  626. I2CWrite(saa, 0x20, init8420[i * 2],
  627. init8420[i * 2 + 1], 2);
  628. for (i = 0; i < MODE8420LEN; i++)
  629. I2CWrite(saa, 0x20, sequence[i * 2],
  630. sequence[i * 2 + 1], 2);
  631. printk("stradis%d: CS8420 initialized\n", saa->nr);
  632. }
  633. static void initialize_saa7121(struct saa7146 *saa, int dopal)
  634. {
  635. int i, mod;
  636. u8 *sequence;
  637. if (dopal)
  638. sequence = init7121pal;
  639. else
  640. sequence = init7121ntsc;
  641. mod = saaread(SAA7146_PSR) & 0x08;
  642. /* initialize PAL/NTSC video encoder */
  643. for (i = 0; i < INIT7121LEN; i++) {
  644. if (NewCard) { /* handle new card encoder differences */
  645. if (sequence[i*2] == 0x3a)
  646. I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
  647. else if (sequence[i*2] == 0x6b)
  648. I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
  649. else if (sequence[i*2] == 0x6c)
  650. I2CWrite(saa, 0x88, 0x6c,
  651. dopal ? 0x09 : 0xf5, 2);
  652. else if (sequence[i*2] == 0x6d)
  653. I2CWrite(saa, 0x88, 0x6d,
  654. dopal ? 0x20 : 0x00, 2);
  655. else if (sequence[i*2] == 0x7a)
  656. I2CWrite(saa, 0x88, 0x7a,
  657. dopal ? (PALFirstActive - 1) :
  658. (NTSCFirstActive - 4), 2);
  659. else if (sequence[i*2] == 0x7b)
  660. I2CWrite(saa, 0x88, 0x7b,
  661. dopal ? PALLastActive :
  662. NTSCLastActive, 2);
  663. else I2CWrite(saa, 0x88, sequence[i * 2],
  664. sequence[i * 2 + 1], 2);
  665. } else {
  666. if (sequence[i*2] == 0x6b && mod)
  667. I2CWrite(saa, 0x88, 0x6b,
  668. (sequence[i * 2 + 1] ^ 0x09), 2);
  669. else if (sequence[i*2] == 0x7a)
  670. I2CWrite(saa, 0x88, 0x7a,
  671. dopal ? (PALFirstActive - 1) :
  672. (NTSCFirstActive - 4), 2);
  673. else if (sequence[i*2] == 0x7b)
  674. I2CWrite(saa, 0x88, 0x7b,
  675. dopal ? PALLastActive :
  676. NTSCLastActive, 2);
  677. else
  678. I2CWrite(saa, 0x88, sequence[i * 2],
  679. sequence[i * 2 + 1], 2);
  680. }
  681. }
  682. }
  683. static void set_genlock_offset(struct saa7146 *saa, int noffset)
  684. {
  685. int nCode;
  686. int PixelsPerLine = 858;
  687. if (CurrentMode == VIDEO_MODE_PAL)
  688. PixelsPerLine = 864;
  689. if (noffset > 500)
  690. noffset = 500;
  691. else if (noffset < -500)
  692. noffset = -500;
  693. nCode = noffset + 0x100;
  694. if (nCode == 1)
  695. nCode = 0x401;
  696. else if (nCode < 1) nCode = 0x400 + PixelsPerLine + nCode;
  697. debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
  698. }
  699. static void set_out_format(struct saa7146 *saa, int mode)
  700. {
  701. initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
  702. saa->boardcfg[2] = mode;
  703. /* do not adjust analog video parameters here, use saa7121 init */
  704. /* you will affect the SDI output on the new card */
  705. if (mode == VIDEO_MODE_PAL) { /* PAL */
  706. debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
  707. mdelay(50);
  708. saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
  709. if (NewCard) {
  710. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  711. 0xe100, 2);
  712. mdelay(50);
  713. }
  714. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  715. NewCard ? 0xe500: 0x6500, 2);
  716. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  717. (1 << 8) |
  718. (NewCard ? PALFirstActive : PALFirstActive-6), 2);
  719. } else { /* NTSC */
  720. debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
  721. mdelay(50);
  722. saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
  723. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  724. NewCard ? 0xe100: 0x6100, 2);
  725. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  726. (1 << 8) |
  727. (NewCard ? NTSCFirstActive : NTSCFirstActive-6), 2);
  728. }
  729. }
  730. /* Intialize bitmangler to map from a byte value to the mangled word that
  731. * must be output to program the Xilinx part through the DEBI port.
  732. * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
  733. * transfer FPGA code, init IBM chip, transfer IBM microcode
  734. * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
  735. */
  736. static u16 bitmangler[256];
  737. static int initialize_fpga(struct video_code *bitdata)
  738. {
  739. int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
  740. u16 *dmabuf;
  741. u8 *newdma;
  742. struct saa7146 *saa;
  743. /* verify fpga code */
  744. for (startindex = 0; startindex < bitdata->datasize; startindex++)
  745. if (bitdata->data[startindex] == 255)
  746. break;
  747. if (startindex == bitdata->datasize) {
  748. printk(KERN_INFO "stradis: bad fpga code\n");
  749. return -1;
  750. }
  751. /* initialize all detected cards */
  752. for (num = 0; num < saa_num; num++) {
  753. saa = &saa7146s[num];
  754. if (saa->boardcfg[0] > 20)
  755. continue; /* card was programmed */
  756. loadtwo = (saa->boardcfg[18] & 0x10);
  757. if (!NewCard) /* we have an old board */
  758. for (i = 0; i < 256; i++)
  759. bitmangler[i] = ((i & 0x01) << 15) |
  760. ((i & 0x02) << 6) | ((i & 0x04) << 4) |
  761. ((i & 0x08) << 9) | ((i & 0x10) << 7) |
  762. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  763. ((i & 0x80) >> 7);
  764. else /* else we have a new board */
  765. for (i = 0; i < 256; i++)
  766. bitmangler[i] = ((i & 0x01) << 7) |
  767. ((i & 0x02) << 5) | ((i & 0x04) << 3) |
  768. ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
  769. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  770. ((i & 0x80) >> 7);
  771. dmabuf = (u16 *) saa->dmadebi;
  772. newdma = (u8 *) saa->dmadebi;
  773. if (NewCard) { /* SDM2xxx */
  774. if (!strncmp(bitdata->loadwhat, "decoder2", 8))
  775. continue; /* fpga not for this card */
  776. if (!strncmp(&saa->boardcfg[42],
  777. bitdata->loadwhat, 8)) {
  778. loadfile = 1;
  779. } else if (loadtwo && !strncmp(&saa->boardcfg[19],
  780. bitdata->loadwhat, 8)) {
  781. loadfile = 2;
  782. } else if (!saa->boardcfg[42] && /* special */
  783. !strncmp("decxl", bitdata->loadwhat, 8)) {
  784. loadfile = 1;
  785. } else
  786. continue; /* fpga not for this card */
  787. if (loadfile != 1 && loadfile != 2) {
  788. continue; /* skip to next card */
  789. }
  790. if (saa->boardcfg[0] && loadfile == 1 )
  791. continue; /* skip to next card */
  792. if (saa->boardcfg[0] != 1 && loadfile == 2)
  793. continue; /* skip to next card */
  794. saa->boardcfg[0]++; /* mark fpga handled */
  795. printk("stradis%d: loading %s\n", saa->nr,
  796. bitdata->loadwhat);
  797. if (loadtwo && loadfile == 2)
  798. goto send_fpga_stuff;
  799. /* turn on the Audio interface to set PROG low */
  800. saawrite(0x00400040, SAA7146_GPIO_CTRL);
  801. saaread(SAA7146_PSR); /* ensure posted write */
  802. /* wait for everyone to reset */
  803. mdelay(10);
  804. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  805. } else { /* original card */
  806. if (strncmp(bitdata->loadwhat, "decoder2", 8))
  807. continue; /* fpga not for this card */
  808. /* Pull the Xilinx PROG signal WS3 low */
  809. saawrite(0x02000200, SAA7146_MC1);
  810. /* Turn on the Audio interface so can set PROG low */
  811. saawrite(0x000000c0, SAA7146_ACON1);
  812. /* Pull the Xilinx INIT signal (GPIO2) low */
  813. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  814. /* Make sure everybody resets */
  815. saaread(SAA7146_PSR); /* ensure posted write */
  816. mdelay(10);
  817. /* Release the Xilinx PROG signal */
  818. saawrite(0x00000000, SAA7146_ACON1);
  819. /* Turn off the Audio interface */
  820. saawrite(0x02000000, SAA7146_MC1);
  821. }
  822. /* Release Xilinx INIT signal (WS2) */
  823. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  824. /* Wait for the INIT to go High */
  825. for (i = 0; i < 10000 &&
  826. !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
  827. schedule();
  828. if (i == 1000) {
  829. printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
  830. return -1;
  831. }
  832. send_fpga_stuff:
  833. if (NewCard) {
  834. for (i = startindex; i < bitdata->datasize; i++)
  835. newdma[i - startindex] =
  836. bitmangler[bitdata->data[i]];
  837. debiwrite(saa, 0x01420000, 0, 0,
  838. ((bitdata->datasize - startindex) + 5));
  839. if (loadtwo) {
  840. if (loadfile == 1) {
  841. printk("stradis%d: "
  842. "awaiting 2nd FPGA bitfile\n",
  843. saa->nr);
  844. continue; /* skip to next card */
  845. }
  846. }
  847. } else {
  848. for (i = startindex; i < bitdata->datasize; i++)
  849. dmabuf[i - startindex] =
  850. bitmangler[bitdata->data[i]];
  851. debiwrite(saa, 0x014a0000, 0, 0,
  852. ((bitdata->datasize - startindex) + 5) * 2);
  853. }
  854. for (i = 0; i < 1000 &&
  855. !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); i++)
  856. schedule();
  857. if (i == 1000) {
  858. printk(KERN_INFO "stradis%d: FPGA load failed\n",
  859. saa->nr);
  860. failure++;
  861. continue;
  862. }
  863. if (!NewCard) {
  864. /* Pull the Xilinx INIT signal (GPIO2) low */
  865. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  866. saaread(SAA7146_PSR); /* ensure posted write */
  867. mdelay(2);
  868. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  869. mdelay(2);
  870. }
  871. printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
  872. saa->boardcfg[0] = 26; /* mark fpga programmed */
  873. /* set VXCO to its lowest frequency */
  874. debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
  875. if (NewCard) {
  876. /* mute CS3310 */
  877. if (HaveCS3310)
  878. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  879. 0, 2);
  880. /* set VXCO to PWM mode, release reset, blank on */
  881. debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
  882. mdelay(10);
  883. /* unmute CS3310 */
  884. if (HaveCS3310)
  885. debiwrite(saa, debNormal, XILINX_CTL0,
  886. 0x2020, 2);
  887. }
  888. /* set source Black */
  889. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  890. saa->boardcfg[4] = 22; /* set NTSC First Active Line */
  891. saa->boardcfg[5] = 23; /* set PAL First Active Line */
  892. saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
  893. saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
  894. set_out_format(saa, VIDEO_MODE_NTSC);
  895. mdelay(50);
  896. /* begin IBM chip init */
  897. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  898. saaread(SAA7146_PSR); /* wait for reset */
  899. mdelay(5);
  900. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  901. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  902. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
  903. debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
  904. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  905. if (NewCard) {
  906. mdelay(5);
  907. /* set i2s rate converter to 48KHz */
  908. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  909. /* we must init CS8420 first since rev b pulls i2s */
  910. /* master clock low and CS4341 needs i2s master to */
  911. /* run the i2c port. */
  912. if (HaveCS8420) {
  913. /* 0=consumer, 1=pro */
  914. initialize_cs8420(saa, 0);
  915. }
  916. mdelay(5);
  917. if (HaveCS4341)
  918. initialize_cs4341(saa);
  919. }
  920. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  921. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  922. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  923. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  924. if (NewCard)
  925. set_genlock_offset(saa, 0);
  926. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  927. #if 0
  928. /* enable genlock */
  929. debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
  930. #else
  931. /* disable genlock */
  932. debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
  933. #endif
  934. }
  935. return failure;
  936. }
  937. static int do_ibm_reset(struct saa7146 *saa)
  938. {
  939. /* failure if decoder not previously programmed */
  940. if (saa->boardcfg[0] < 37)
  941. return -EIO;
  942. /* mute CS3310 */
  943. if (HaveCS3310)
  944. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
  945. /* disable interrupts */
  946. saawrite(0, SAA7146_IER);
  947. saa->audhead = saa->audtail = 0;
  948. saa->vidhead = saa->vidtail = 0;
  949. /* tristate debi bus, disable debi transfers */
  950. saawrite(0x00880000, SAA7146_MC1);
  951. /* ensure posted write */
  952. saaread(SAA7146_MC1);
  953. mdelay(50);
  954. /* re-enable debi transfers */
  955. saawrite(0x00880088, SAA7146_MC1);
  956. /* set source Black */
  957. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  958. /* begin IBM chip init */
  959. set_out_format(saa, CurrentMode);
  960. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  961. saaread(SAA7146_PSR); /* wait for reset */
  962. mdelay(5);
  963. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  964. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  965. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  966. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  967. if (NewCard) {
  968. mdelay(5);
  969. /* set i2s rate converter to 48KHz */
  970. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  971. /* we must init CS8420 first since rev b pulls i2s */
  972. /* master clock low and CS4341 needs i2s master to */
  973. /* run the i2c port. */
  974. if (HaveCS8420) {
  975. /* 0=consumer, 1=pro */
  976. initialize_cs8420(saa, 1);
  977. }
  978. mdelay(5);
  979. if (HaveCS4341)
  980. initialize_cs4341(saa);
  981. }
  982. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  983. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  984. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  985. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  986. if (NewCard)
  987. set_genlock_offset(saa, 0);
  988. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  989. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  990. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  991. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  992. (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
  993. printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
  994. }
  995. if (HaveCS3310) {
  996. int i = CS3310MaxLvl;
  997. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
  998. }
  999. /* start video decoder */
  1000. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1001. /* 256k vid, 3520 bytes aud */
  1002. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
  1003. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1004. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1005. /* enable buffer threshold irq */
  1006. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1007. /* clear pending interrupts */
  1008. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1009. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1010. return 0;
  1011. }
  1012. /* load the decoder microcode */
  1013. static int initialize_ibmmpeg2(struct video_code *microcode)
  1014. {
  1015. int i, num;
  1016. struct saa7146 *saa;
  1017. for (num = 0; num < saa_num; num++) {
  1018. saa = &saa7146s[num];
  1019. /* check that FPGA is loaded */
  1020. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
  1021. if ((i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2)) !=
  1022. 0xa55a) {
  1023. printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
  1024. saa->nr, i);
  1025. #if 0
  1026. return -1;
  1027. #endif
  1028. }
  1029. if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
  1030. if (saa->boardcfg[0] > 27)
  1031. continue; /* skip to next card */
  1032. /* load video control store */
  1033. saa->boardcfg[1] = 0x13; /* no-sync default */
  1034. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1035. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1036. for (i = 0; i < microcode->datasize / 2; i++)
  1037. debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
  1038. (microcode->data[i * 2] << 8) |
  1039. microcode->data[i * 2 + 1], 2);
  1040. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1041. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1042. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1043. ChipControl, 2);
  1044. saa->boardcfg[0] = 28;
  1045. }
  1046. if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
  1047. if (saa->boardcfg[0] > 35)
  1048. continue; /* skip to next card */
  1049. /* load audio control store */
  1050. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1051. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1052. for (i = 0; i < microcode->datasize; i++)
  1053. debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
  1054. microcode->data[i], 1);
  1055. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1056. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1057. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  1058. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  1059. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  1060. 0xe000, 1)) {
  1061. printk(KERN_ERR
  1062. "stradis%d: IBM config failed\n",
  1063. saa->nr);
  1064. return -1;
  1065. }
  1066. /* set PWM to center value */
  1067. if (NewCard) {
  1068. debiwrite(saa, debNormal, XILINX_PWM,
  1069. saa->boardcfg[14] +
  1070. (saa->boardcfg[13]<<8), 2);
  1071. } else
  1072. debiwrite(saa, debNormal, XILINX_PWM,
  1073. 0x46, 2);
  1074. if (HaveCS3310) {
  1075. i = CS3310MaxLvl;
  1076. debiwrite(saa, debNormal,
  1077. XILINX_CS3310_CMPLT, ((i<<8)|i), 2);
  1078. }
  1079. printk(KERN_INFO
  1080. "stradis%d: IBM MPEGCD%d Initialized\n",
  1081. saa->nr, 18 + (debiread(saa, debNormal,
  1082. IBM_MP2_CHIP_CONTROL, 2) >> 12));
  1083. /* start video decoder */
  1084. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1085. ChipControl, 2);
  1086. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD,
  1087. 0x4037, 2); /* 256k vid, 3520 bytes aud */
  1088. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1089. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1090. /* enable buffer threshold irq */
  1091. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1092. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1093. /* enable gpio irq */
  1094. saawrite(0x00002000, SAA7146_GPIO_CTRL);
  1095. /* enable decoder output to HPS */
  1096. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1097. saa->boardcfg[0] = 37;
  1098. }
  1099. }
  1100. return 0;
  1101. }
  1102. static u32 palette2fmt[] =
  1103. { /* some of these YUV translations are wrong */
  1104. 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
  1105. 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
  1106. 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
  1107. };
  1108. static int bpp2fmt[4] =
  1109. {
  1110. VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
  1111. VIDEO_PALETTE_RGB32
  1112. };
  1113. /* I wish I could find a formula to calculate these... */
  1114. static u32 h_prescale[64] =
  1115. {
  1116. 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
  1117. 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
  1118. 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
  1119. 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
  1120. 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
  1121. 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
  1122. 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
  1123. 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
  1124. 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
  1125. 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
  1126. 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
  1127. };
  1128. static u32 v_gain[64] =
  1129. {
  1130. 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
  1131. 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
  1132. 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1133. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1134. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1135. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1136. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1137. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1138. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1139. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1140. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1141. };
  1142. static void saa7146_set_winsize(struct saa7146 *saa)
  1143. {
  1144. u32 format;
  1145. int offset, yacl, ysci;
  1146. saa->win.color_fmt = format =
  1147. (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
  1148. palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
  1149. offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
  1150. saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
  1151. saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
  1152. saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
  1153. saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
  1154. SAA7146_PROT_ADDR1);
  1155. saawrite(0, SAA7146_PAGE1);
  1156. saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
  1157. offset = (704 / (saa->win.width - 1)) & 0x3f;
  1158. saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
  1159. offset = (720896 / saa->win.width) / (offset + 1);
  1160. saawrite((offset<<12)|0x0c, SAA7146_HPS_H_SCALE);
  1161. if (CurrentMode == VIDEO_MODE_NTSC) {
  1162. yacl = /*(480 / saa->win.height - 1) & 0x3f*/ 0;
  1163. ysci = 1024 - (saa->win.height * 1024 / 480);
  1164. } else {
  1165. yacl = /*(576 / saa->win.height - 1) & 0x3f*/ 0;
  1166. ysci = 1024 - (saa->win.height * 1024 / 576);
  1167. }
  1168. saawrite((1<<31)|(ysci<<21)|(yacl<<15), SAA7146_HPS_V_SCALE);
  1169. saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
  1170. saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
  1171. SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
  1172. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H),
  1173. SAA7146_MC2);
  1174. }
  1175. /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
  1176. * bitmap is fixed width, 128 bytes (1024 pixels represented)
  1177. * arranged most-sigificant-bit-left in 32-bit words
  1178. * based on saa7146 clipping hardware, it swaps bytes if LE
  1179. * much of this makes up for egcs brain damage -- so if you
  1180. * are wondering "why did he do this?" it is because the C
  1181. * was adjusted to generate the optimal asm output without
  1182. * writing non-portable __asm__ directives.
  1183. */
  1184. static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
  1185. {
  1186. register int startword, endword;
  1187. register u32 bitsleft, bitsright;
  1188. u32 *temp;
  1189. if (x < 0) {
  1190. w += x;
  1191. x = 0;
  1192. }
  1193. if (y < 0) {
  1194. h += y;
  1195. y = 0;
  1196. }
  1197. if (w <= 0 || h <= 0 || x > 1023 || y > 639)
  1198. return; /* throw away bad clips */
  1199. if (x + w > 1024)
  1200. w = 1024 - x;
  1201. if (y + h > 640)
  1202. h = 640 - y;
  1203. startword = (x >> 5);
  1204. endword = ((x + w) >> 5);
  1205. bitsleft = (0xffffffff >> (x & 31));
  1206. bitsright = (0xffffffff << (~((x + w) - (endword<<5))));
  1207. temp = &clipmap[(y<<5) + startword];
  1208. w = endword - startword;
  1209. if (!w) {
  1210. bitsleft |= bitsright;
  1211. for (y = 0; y < h; y++) {
  1212. *temp |= bitsleft;
  1213. temp += 32;
  1214. }
  1215. } else {
  1216. for (y = 0; y < h; y++) {
  1217. *temp++ |= bitsleft;
  1218. for (x = 1; x < w; x++)
  1219. *temp++ = 0xffffffff;
  1220. *temp |= bitsright;
  1221. temp += (32 - w);
  1222. }
  1223. }
  1224. }
  1225. static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
  1226. {
  1227. int i, width, height;
  1228. u32 *clipmap;
  1229. clipmap = saa->dmavid2;
  1230. if((width=saa->win.width)>1023)
  1231. width = 1023; /* sanity check */
  1232. if((height=saa->win.height)>640)
  1233. height = 639; /* sanity check */
  1234. if (ncr > 0) { /* rectangles pased */
  1235. /* convert rectangular clips to a bitmap */
  1236. memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
  1237. for (i = 0; i < ncr; i++)
  1238. clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
  1239. cr[i].width, cr[i].height);
  1240. }
  1241. /* clip against viewing window AND screen
  1242. so we do not have to rely on the user program
  1243. */
  1244. clip_draw_rectangle(clipmap,(saa->win.x+width>saa->win.swidth) ?
  1245. (saa->win.swidth-saa->win.x) : width, 0, 1024, 768);
  1246. clip_draw_rectangle(clipmap,0,(saa->win.y+height>saa->win.sheight) ?
  1247. (saa->win.sheight-saa->win.y) : height,1024,768);
  1248. if (saa->win.x<0)
  1249. clip_draw_rectangle(clipmap, 0, 0, -(saa->win.x), 768);
  1250. if (saa->win.y<0)
  1251. clip_draw_rectangle(clipmap, 0, 0, 1024, -(saa->win.y));
  1252. }
  1253. static int saa_ioctl(struct inode *inode, struct file *file,
  1254. unsigned int cmd, unsigned long argl)
  1255. {
  1256. struct saa7146 *saa = file->private_data;
  1257. void __user *arg = (void __user *)argl;
  1258. switch (cmd) {
  1259. case VIDIOCGCAP:
  1260. {
  1261. struct video_capability b;
  1262. strcpy(b.name, saa->video_dev.name);
  1263. b.type = VID_TYPE_CAPTURE |
  1264. VID_TYPE_OVERLAY |
  1265. VID_TYPE_CLIPPING |
  1266. VID_TYPE_FRAMERAM |
  1267. VID_TYPE_SCALES;
  1268. b.channels = 1;
  1269. b.audios = 1;
  1270. b.maxwidth = 768;
  1271. b.maxheight = 576;
  1272. b.minwidth = 32;
  1273. b.minheight = 32;
  1274. if (copy_to_user(arg, &b, sizeof(b)))
  1275. return -EFAULT;
  1276. return 0;
  1277. }
  1278. case VIDIOCGPICT:
  1279. {
  1280. struct video_picture p = saa->picture;
  1281. if (saa->win.depth == 8)
  1282. p.palette = VIDEO_PALETTE_HI240;
  1283. if (saa->win.depth == 15)
  1284. p.palette = VIDEO_PALETTE_RGB555;
  1285. if (saa->win.depth == 16)
  1286. p.palette = VIDEO_PALETTE_RGB565;
  1287. if (saa->win.depth == 24)
  1288. p.palette = VIDEO_PALETTE_RGB24;
  1289. if (saa->win.depth == 32)
  1290. p.palette = VIDEO_PALETTE_RGB32;
  1291. if (copy_to_user(arg, &p, sizeof(p)))
  1292. return -EFAULT;
  1293. return 0;
  1294. }
  1295. case VIDIOCSPICT:
  1296. {
  1297. struct video_picture p;
  1298. u32 format;
  1299. if (copy_from_user(&p, arg, sizeof(p)))
  1300. return -EFAULT;
  1301. if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
  1302. format = palette2fmt[p.palette];
  1303. saa->win.color_fmt = format;
  1304. saawrite(format|0x60, SAA7146_CLIP_FORMAT_CTRL);
  1305. }
  1306. saawrite(((p.brightness & 0xff00) << 16) |
  1307. ((p.contrast & 0xfe00) << 7) |
  1308. ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
  1309. saa->picture = p;
  1310. /* upload changed registers */
  1311. saawrite(((SAA7146_MC2_UPLD_HPS_H |
  1312. SAA7146_MC2_UPLD_HPS_V) << 16) |
  1313. SAA7146_MC2_UPLD_HPS_H | SAA7146_MC2_UPLD_HPS_V,
  1314. SAA7146_MC2);
  1315. return 0;
  1316. }
  1317. case VIDIOCSWIN:
  1318. {
  1319. struct video_window vw;
  1320. struct video_clip *vcp = NULL;
  1321. if (copy_from_user(&vw, arg, sizeof(vw)))
  1322. return -EFAULT;
  1323. if (vw.flags || vw.width < 16 || vw.height < 16) { /* stop capture */
  1324. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1325. return -EINVAL;
  1326. }
  1327. if (saa->win.bpp < 4) { /* 32-bit align start and adjust width */
  1328. int i = vw.x;
  1329. vw.x = (vw.x + 3) & ~3;
  1330. i = vw.x - i;
  1331. vw.width -= i;
  1332. }
  1333. saa->win.x = vw.x;
  1334. saa->win.y = vw.y;
  1335. saa->win.width = vw.width;
  1336. if (saa->win.width > 768)
  1337. saa->win.width = 768;
  1338. saa->win.height = vw.height;
  1339. if (CurrentMode == VIDEO_MODE_NTSC) {
  1340. if (saa->win.height > 480)
  1341. saa->win.height = 480;
  1342. } else {
  1343. if (saa->win.height > 576)
  1344. saa->win.height = 576;
  1345. }
  1346. /* stop capture */
  1347. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1348. saa7146_set_winsize(saa);
  1349. /*
  1350. * Do any clips.
  1351. */
  1352. if (vw.clipcount < 0) {
  1353. if (copy_from_user(saa->dmavid2, vw.clips,
  1354. VIDEO_CLIPMAP_SIZE))
  1355. return -EFAULT;
  1356. }
  1357. else if (vw.clipcount > 16384) {
  1358. return -EINVAL;
  1359. } else if (vw.clipcount > 0) {
  1360. if ((vcp = vmalloc(sizeof(struct video_clip) *
  1361. (vw.clipcount))) == NULL)
  1362. return -ENOMEM;
  1363. if (copy_from_user(vcp, vw.clips,
  1364. sizeof(struct video_clip) *
  1365. vw.clipcount)) {
  1366. vfree(vcp);
  1367. return -EFAULT;
  1368. }
  1369. } else /* nothing clipped */
  1370. memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
  1371. make_clip_tab(saa, vcp, vw.clipcount);
  1372. if (vw.clipcount > 0)
  1373. vfree(vcp);
  1374. /* start capture & clip dma if we have an address */
  1375. if ((saa->cap & 3) && saa->win.vidadr != 0)
  1376. saawrite(((SAA7146_MC1_TR_E_1 |
  1377. SAA7146_MC1_TR_E_2) << 16) | 0xffff,
  1378. SAA7146_MC1);
  1379. return 0;
  1380. }
  1381. case VIDIOCGWIN:
  1382. {
  1383. struct video_window vw;
  1384. vw.x = saa->win.x;
  1385. vw.y = saa->win.y;
  1386. vw.width = saa->win.width;
  1387. vw.height = saa->win.height;
  1388. vw.chromakey = 0;
  1389. vw.flags = 0;
  1390. if (copy_to_user(arg, &vw, sizeof(vw)))
  1391. return -EFAULT;
  1392. return 0;
  1393. }
  1394. case VIDIOCCAPTURE:
  1395. {
  1396. int v;
  1397. if (copy_from_user(&v, arg, sizeof(v)))
  1398. return -EFAULT;
  1399. if (v == 0) {
  1400. saa->cap &= ~1;
  1401. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1402. SAA7146_MC1);
  1403. } else {
  1404. if (saa->win.vidadr == 0 || saa->win.width == 0
  1405. || saa->win.height == 0)
  1406. return -EINVAL;
  1407. saa->cap |= 1;
  1408. saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
  1409. SAA7146_MC1);
  1410. }
  1411. return 0;
  1412. }
  1413. case VIDIOCGFBUF:
  1414. {
  1415. struct video_buffer v;
  1416. v.base = (void *) saa->win.vidadr;
  1417. v.height = saa->win.sheight;
  1418. v.width = saa->win.swidth;
  1419. v.depth = saa->win.depth;
  1420. v.bytesperline = saa->win.bpl;
  1421. if (copy_to_user(arg, &v, sizeof(v)))
  1422. return -EFAULT;
  1423. return 0;
  1424. }
  1425. case VIDIOCSFBUF:
  1426. {
  1427. struct video_buffer v;
  1428. if (!capable(CAP_SYS_ADMIN))
  1429. return -EPERM;
  1430. if (copy_from_user(&v, arg, sizeof(v)))
  1431. return -EFAULT;
  1432. if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
  1433. v.depth != 24 && v.depth != 32 && v.width > 16 &&
  1434. v.height > 16 && v.bytesperline > 16)
  1435. return -EINVAL;
  1436. if (v.base)
  1437. saa->win.vidadr = (unsigned long) v.base;
  1438. saa->win.sheight = v.height;
  1439. saa->win.swidth = v.width;
  1440. saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
  1441. saa->win.depth = v.depth;
  1442. saa->win.bpl = v.bytesperline;
  1443. DEBUG(printk("Display at %p is %d by %d, bytedepth %d, bpl %d\n",
  1444. v.base, v.width, v.height, saa->win.bpp, saa->win.bpl));
  1445. saa7146_set_winsize(saa);
  1446. return 0;
  1447. }
  1448. case VIDIOCKEY:
  1449. {
  1450. /* Will be handled higher up .. */
  1451. return 0;
  1452. }
  1453. case VIDIOCGAUDIO:
  1454. {
  1455. struct video_audio v;
  1456. v = saa->audio_dev;
  1457. v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
  1458. v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
  1459. strcpy(v.name, "MPEG");
  1460. v.mode = VIDEO_SOUND_STEREO;
  1461. if (copy_to_user(arg, &v, sizeof(v)))
  1462. return -EFAULT;
  1463. return 0;
  1464. }
  1465. case VIDIOCSAUDIO:
  1466. {
  1467. struct video_audio v;
  1468. int i;
  1469. if (copy_from_user(&v, arg, sizeof(v)))
  1470. return -EFAULT;
  1471. i = (~(v.volume>>8))&0xff;
  1472. if (!HaveCS4341) {
  1473. if (v.flags & VIDEO_AUDIO_MUTE) {
  1474. debiwrite(saa, debNormal,
  1475. IBM_MP2_FRNT_ATTEN,
  1476. 0xffff, 2);
  1477. }
  1478. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1479. debiwrite(saa, debNormal,
  1480. IBM_MP2_FRNT_ATTEN,
  1481. 0x0000, 2);
  1482. if (v.flags & VIDEO_AUDIO_VOLUME)
  1483. debiwrite(saa, debNormal,
  1484. IBM_MP2_FRNT_ATTEN,
  1485. (i<<8)|i, 2);
  1486. } else {
  1487. if (v.flags & VIDEO_AUDIO_MUTE)
  1488. cs4341_setlevel(saa, 0xff, 0xff);
  1489. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1490. cs4341_setlevel(saa, 0, 0);
  1491. if (v.flags & VIDEO_AUDIO_VOLUME)
  1492. cs4341_setlevel(saa, i, i);
  1493. }
  1494. saa->audio_dev = v;
  1495. return 0;
  1496. }
  1497. case VIDIOCGUNIT:
  1498. {
  1499. struct video_unit vu;
  1500. vu.video = saa->video_dev.minor;
  1501. vu.vbi = VIDEO_NO_UNIT;
  1502. vu.radio = VIDEO_NO_UNIT;
  1503. vu.audio = VIDEO_NO_UNIT;
  1504. vu.teletext = VIDEO_NO_UNIT;
  1505. if (copy_to_user(arg, &vu, sizeof(vu)))
  1506. return -EFAULT;
  1507. return 0;
  1508. }
  1509. case VIDIOCSPLAYMODE:
  1510. {
  1511. struct video_play_mode pmode;
  1512. if (copy_from_user((void *) &pmode, arg,
  1513. sizeof(struct video_play_mode)))
  1514. return -EFAULT;
  1515. switch (pmode.mode) {
  1516. case VID_PLAY_VID_OUT_MODE:
  1517. if (pmode.p1 != VIDEO_MODE_NTSC &&
  1518. pmode.p1 != VIDEO_MODE_PAL)
  1519. return -EINVAL;
  1520. set_out_format(saa, pmode.p1);
  1521. return 0;
  1522. case VID_PLAY_GENLOCK:
  1523. debiwrite(saa, debNormal,
  1524. XILINX_CTL0,
  1525. (pmode.p1 ? 0x8000 : 0x8080),
  1526. 2);
  1527. if (NewCard)
  1528. set_genlock_offset(saa,
  1529. pmode.p2);
  1530. return 0;
  1531. case VID_PLAY_NORMAL:
  1532. debiwrite(saa, debNormal,
  1533. IBM_MP2_CHIP_CONTROL,
  1534. ChipControl, 2);
  1535. ibm_send_command(saa,
  1536. IBM_MP2_PLAY, 0, 0);
  1537. saa->playmode = pmode.mode;
  1538. return 0;
  1539. case VID_PLAY_PAUSE:
  1540. /* IBM removed the PAUSE command */
  1541. /* they say use SINGLE_FRAME now */
  1542. case VID_PLAY_SINGLE_FRAME:
  1543. ibm_send_command(saa,
  1544. IBM_MP2_SINGLE_FRAME,
  1545. 0, 0);
  1546. if (saa->playmode == pmode.mode) {
  1547. debiwrite(saa, debNormal,
  1548. IBM_MP2_CHIP_CONTROL,
  1549. ChipControl, 2);
  1550. }
  1551. saa->playmode = pmode.mode;
  1552. return 0;
  1553. case VID_PLAY_FAST_FORWARD:
  1554. ibm_send_command(saa,
  1555. IBM_MP2_FAST_FORWARD, 0, 0);
  1556. saa->playmode = pmode.mode;
  1557. return 0;
  1558. case VID_PLAY_SLOW_MOTION:
  1559. ibm_send_command(saa,
  1560. IBM_MP2_SLOW_MOTION,
  1561. pmode.p1, 0);
  1562. saa->playmode = pmode.mode;
  1563. return 0;
  1564. case VID_PLAY_IMMEDIATE_NORMAL:
  1565. /* ensure transfers resume */
  1566. debiwrite(saa, debNormal,
  1567. IBM_MP2_CHIP_CONTROL,
  1568. ChipControl, 2);
  1569. ibm_send_command(saa,
  1570. IBM_MP2_IMED_NORM_PLAY, 0, 0);
  1571. saa->playmode = VID_PLAY_NORMAL;
  1572. return 0;
  1573. case VID_PLAY_SWITCH_CHANNELS:
  1574. saa->audhead = saa->audtail = 0;
  1575. saa->vidhead = saa->vidtail = 0;
  1576. ibm_send_command(saa,
  1577. IBM_MP2_FREEZE_FRAME, 0, 1);
  1578. ibm_send_command(saa,
  1579. IBM_MP2_RESET_AUD_RATE, 0, 1);
  1580. debiwrite(saa, debNormal,
  1581. IBM_MP2_CHIP_CONTROL, 0, 2);
  1582. ibm_send_command(saa,
  1583. IBM_MP2_CHANNEL_SWITCH, 0, 1);
  1584. debiwrite(saa, debNormal,
  1585. IBM_MP2_CHIP_CONTROL,
  1586. ChipControl, 2);
  1587. ibm_send_command(saa,
  1588. IBM_MP2_PLAY, 0, 0);
  1589. saa->playmode = VID_PLAY_NORMAL;
  1590. return 0;
  1591. case VID_PLAY_FREEZE_FRAME:
  1592. ibm_send_command(saa,
  1593. IBM_MP2_FREEZE_FRAME, 0, 0);
  1594. saa->playmode = pmode.mode;
  1595. return 0;
  1596. case VID_PLAY_STILL_MODE:
  1597. ibm_send_command(saa,
  1598. IBM_MP2_SET_STILL_MODE, 0, 0);
  1599. saa->playmode = pmode.mode;
  1600. return 0;
  1601. case VID_PLAY_MASTER_MODE:
  1602. if (pmode.p1 == VID_PLAY_MASTER_NONE)
  1603. saa->boardcfg[1] = 0x13;
  1604. else if (pmode.p1 ==
  1605. VID_PLAY_MASTER_VIDEO)
  1606. saa->boardcfg[1] = 0x23;
  1607. else if (pmode.p1 ==
  1608. VID_PLAY_MASTER_AUDIO)
  1609. saa->boardcfg[1] = 0x43;
  1610. else
  1611. return -EINVAL;
  1612. debiwrite(saa, debNormal,
  1613. IBM_MP2_CHIP_CONTROL,
  1614. ChipControl, 2);
  1615. return 0;
  1616. case VID_PLAY_ACTIVE_SCANLINES:
  1617. if (CurrentMode == VIDEO_MODE_PAL) {
  1618. if (pmode.p1 < 1 ||
  1619. pmode.p2 > 625)
  1620. return -EINVAL;
  1621. saa->boardcfg[5] = pmode.p1;
  1622. saa->boardcfg[55] = (pmode.p1 +
  1623. (pmode.p2/2) - 1) &
  1624. 0xff;
  1625. } else {
  1626. if (pmode.p1 < 4 ||
  1627. pmode.p2 > 525)
  1628. return -EINVAL;
  1629. saa->boardcfg[4] = pmode.p1;
  1630. saa->boardcfg[54] = (pmode.p1 +
  1631. (pmode.p2/2) - 4) &
  1632. 0xff;
  1633. }
  1634. set_out_format(saa, CurrentMode);
  1635. case VID_PLAY_RESET:
  1636. return do_ibm_reset(saa);
  1637. case VID_PLAY_END_MARK:
  1638. if (saa->endmarktail <
  1639. saa->endmarkhead) {
  1640. if (saa->endmarkhead -
  1641. saa->endmarktail < 2)
  1642. return -ENOSPC;
  1643. } else if (saa->endmarkhead <=
  1644. saa->endmarktail) {
  1645. if (saa->endmarktail -
  1646. saa->endmarkhead >
  1647. (MAX_MARKS - 2))
  1648. return -ENOSPC;
  1649. } else
  1650. return -ENOSPC;
  1651. saa->endmark[saa->endmarktail] =
  1652. saa->audtail;
  1653. saa->endmarktail++;
  1654. if (saa->endmarktail >= MAX_MARKS)
  1655. saa->endmarktail = 0;
  1656. }
  1657. return -EINVAL;
  1658. }
  1659. case VIDIOCSWRITEMODE:
  1660. {
  1661. int mode;
  1662. if (copy_from_user((void *) &mode, arg, sizeof(int)))
  1663. return -EFAULT;
  1664. if (mode == VID_WRITE_MPEG_AUD ||
  1665. mode == VID_WRITE_MPEG_VID ||
  1666. mode == VID_WRITE_CC ||
  1667. mode == VID_WRITE_TTX ||
  1668. mode == VID_WRITE_OSD) {
  1669. saa->writemode = mode;
  1670. return 0;
  1671. }
  1672. return -EINVAL;
  1673. }
  1674. case VIDIOCSMICROCODE:
  1675. {
  1676. struct video_code ucode;
  1677. __u8 *udata;
  1678. int i;
  1679. if (copy_from_user(&ucode, arg, sizeof(ucode)))
  1680. return -EFAULT;
  1681. if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
  1682. strncmp(ucode.loadwhat, "dec", 3))
  1683. return -EINVAL;
  1684. if ((udata = vmalloc(ucode.datasize)) == NULL)
  1685. return -ENOMEM;
  1686. if (copy_from_user(udata, ucode.data, ucode.datasize)) {
  1687. vfree(udata);
  1688. return -EFAULT;
  1689. }
  1690. ucode.data = udata;
  1691. if (!strncmp(ucode.loadwhat, "decoder.aud", 11)
  1692. || !strncmp(ucode.loadwhat, "decoder.vid", 11))
  1693. i = initialize_ibmmpeg2(&ucode);
  1694. else
  1695. i = initialize_fpga(&ucode);
  1696. vfree(udata);
  1697. if (i)
  1698. return -EINVAL;
  1699. return 0;
  1700. }
  1701. case VIDIOCGCHAN: /* this makes xawtv happy */
  1702. {
  1703. struct video_channel v;
  1704. if (copy_from_user(&v, arg, sizeof(v)))
  1705. return -EFAULT;
  1706. v.flags = VIDEO_VC_AUDIO;
  1707. v.tuners = 0;
  1708. v.type = VID_TYPE_MPEG_DECODER;
  1709. v.norm = CurrentMode;
  1710. strcpy(v.name, "MPEG2");
  1711. if (copy_to_user(arg, &v, sizeof(v)))
  1712. return -EFAULT;
  1713. return 0;
  1714. }
  1715. case VIDIOCSCHAN: /* this makes xawtv happy */
  1716. {
  1717. struct video_channel v;
  1718. if (copy_from_user(&v, arg, sizeof(v)))
  1719. return -EFAULT;
  1720. /* do nothing */
  1721. return 0;
  1722. }
  1723. default:
  1724. return -ENOIOCTLCMD;
  1725. }
  1726. return 0;
  1727. }
  1728. static int saa_mmap(struct file *file, struct vm_area_struct *vma)
  1729. {
  1730. struct saa7146 *saa = file->private_data;
  1731. printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
  1732. return -EINVAL;
  1733. }
  1734. static ssize_t saa_read(struct file *file, char __user *buf,
  1735. size_t count, loff_t *ppos)
  1736. {
  1737. return -EINVAL;
  1738. }
  1739. static ssize_t saa_write(struct file *file, const char __user *buf,
  1740. size_t count, loff_t *ppos)
  1741. {
  1742. struct saa7146 *saa = file->private_data;
  1743. unsigned long todo = count;
  1744. int blocksize, split;
  1745. unsigned long flags;
  1746. while (todo > 0) {
  1747. if (saa->writemode == VID_WRITE_MPEG_AUD) {
  1748. spin_lock_irqsave(&saa->lock, flags);
  1749. if (saa->audhead <= saa->audtail)
  1750. blocksize = 65536-(saa->audtail - saa->audhead);
  1751. else
  1752. blocksize = saa->audhead - saa->audtail;
  1753. spin_unlock_irqrestore(&saa->lock, flags);
  1754. if (blocksize < 16384) {
  1755. saawrite(SAA7146_PSR_DEBI_S |
  1756. SAA7146_PSR_PIN1, SAA7146_IER);
  1757. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1758. /* wait for buffer space to open */
  1759. interruptible_sleep_on(&saa->audq);
  1760. }
  1761. spin_lock_irqsave(&saa->lock, flags);
  1762. if (saa->audhead <= saa->audtail) {
  1763. blocksize = 65536-(saa->audtail - saa->audhead);
  1764. split = 65536 - saa->audtail;
  1765. } else {
  1766. blocksize = saa->audhead - saa->audtail;
  1767. split = 65536;
  1768. }
  1769. spin_unlock_irqrestore(&saa->lock, flags);
  1770. blocksize--;
  1771. if (blocksize > todo)
  1772. blocksize = todo;
  1773. /* double check that we really have space */
  1774. if (!blocksize)
  1775. return -ENOSPC;
  1776. if (split < blocksize) {
  1777. if (copy_from_user(saa->audbuf +
  1778. saa->audtail, buf, split))
  1779. return -EFAULT;
  1780. buf += split;
  1781. todo -= split;
  1782. blocksize -= split;
  1783. saa->audtail = 0;
  1784. }
  1785. if (copy_from_user(saa->audbuf + saa->audtail, buf,
  1786. blocksize))
  1787. return -EFAULT;
  1788. saa->audtail += blocksize;
  1789. todo -= blocksize;
  1790. buf += blocksize;
  1791. saa->audtail &= 0xffff;
  1792. } else if (saa->writemode == VID_WRITE_MPEG_VID) {
  1793. spin_lock_irqsave(&saa->lock, flags);
  1794. if (saa->vidhead <= saa->vidtail)
  1795. blocksize=524288-(saa->vidtail - saa->vidhead);
  1796. else
  1797. blocksize = saa->vidhead - saa->vidtail;
  1798. spin_unlock_irqrestore(&saa->lock, flags);
  1799. if (blocksize < 65536) {
  1800. saawrite(SAA7146_PSR_DEBI_S |
  1801. SAA7146_PSR_PIN1, SAA7146_IER);
  1802. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1803. /* wait for buffer space to open */
  1804. interruptible_sleep_on(&saa->vidq);
  1805. }
  1806. spin_lock_irqsave(&saa->lock, flags);
  1807. if (saa->vidhead <= saa->vidtail) {
  1808. blocksize=524288-(saa->vidtail - saa->vidhead);
  1809. split = 524288 - saa->vidtail;
  1810. } else {
  1811. blocksize = saa->vidhead - saa->vidtail;
  1812. split = 524288;
  1813. }
  1814. spin_unlock_irqrestore(&saa->lock, flags);
  1815. blocksize--;
  1816. if (blocksize > todo)
  1817. blocksize = todo;
  1818. /* double check that we really have space */
  1819. if (!blocksize)
  1820. return -ENOSPC;
  1821. if (split < blocksize) {
  1822. if (copy_from_user(saa->vidbuf +
  1823. saa->vidtail, buf, split))
  1824. return -EFAULT;
  1825. buf += split;
  1826. todo -= split;
  1827. blocksize -= split;
  1828. saa->vidtail = 0;
  1829. }
  1830. if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
  1831. blocksize))
  1832. return -EFAULT;
  1833. saa->vidtail += blocksize;
  1834. todo -= blocksize;
  1835. buf += blocksize;
  1836. saa->vidtail &= 0x7ffff;
  1837. } else if (saa->writemode == VID_WRITE_OSD) {
  1838. if (count > 131072)
  1839. return -ENOSPC;
  1840. if (copy_from_user(saa->osdbuf, buf, count))
  1841. return -EFAULT;
  1842. buf += count;
  1843. saa->osdhead = 0;
  1844. saa->osdtail = count;
  1845. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
  1846. debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
  1847. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
  1848. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  1849. debiread(saa, debNormal,
  1850. IBM_MP2_DISP_MODE, 2) | 1, 2);
  1851. /* trigger osd data transfer */
  1852. saawrite(SAA7146_PSR_DEBI_S |
  1853. SAA7146_PSR_PIN1, SAA7146_IER);
  1854. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1855. }
  1856. }
  1857. return count;
  1858. }
  1859. static int saa_open(struct inode *inode, struct file *file)
  1860. {
  1861. struct saa7146 *saa = NULL;
  1862. unsigned int minor = iminor(inode);
  1863. int i;
  1864. for (i = 0; i < SAA7146_MAX; i++) {
  1865. if (saa7146s[i].video_dev.minor == minor) {
  1866. saa = &saa7146s[i];
  1867. }
  1868. }
  1869. if (saa == NULL) {
  1870. return -ENODEV;
  1871. }
  1872. file->private_data = saa;
  1873. //saa->video_dev.busy = 0; /* old hack to support multiple open */
  1874. saa->user++;
  1875. if (saa->user > 1)
  1876. return 0; /* device open already, don't reset */
  1877. saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
  1878. return 0;
  1879. }
  1880. static int saa_release(struct inode *inode, struct file *file)
  1881. {
  1882. struct saa7146 *saa = file->private_data;
  1883. saa->user--;
  1884. //saa->video_dev.busy = 0; /* old hack to support multiple open */
  1885. if (saa->user > 0) /* still someone using device */
  1886. return 0;
  1887. saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
  1888. return 0;
  1889. }
  1890. static struct file_operations saa_fops =
  1891. {
  1892. .owner = THIS_MODULE,
  1893. .open = saa_open,
  1894. .release = saa_release,
  1895. .ioctl = saa_ioctl,
  1896. .read = saa_read,
  1897. .llseek = no_llseek,
  1898. .write = saa_write,
  1899. .mmap = saa_mmap,
  1900. };
  1901. /* template for video_device-structure */
  1902. static struct video_device saa_template =
  1903. {
  1904. .name = "SAA7146A",
  1905. .type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
  1906. .hardware = VID_HARDWARE_SAA7146,
  1907. .fops = &saa_fops,
  1908. .minor = -1,
  1909. };
  1910. static int configure_saa7146(struct pci_dev *dev, int num)
  1911. {
  1912. int result;
  1913. struct saa7146 *saa;
  1914. saa = &saa7146s[num];
  1915. saa->endmarkhead = saa->endmarktail = 0;
  1916. saa->win.x = saa->win.y = 0;
  1917. saa->win.width = saa->win.cropwidth = 720;
  1918. saa->win.height = saa->win.cropheight = 480;
  1919. saa->win.cropx = saa->win.cropy = 0;
  1920. saa->win.bpp = 2;
  1921. saa->win.depth = 16;
  1922. saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
  1923. saa->win.bpl = 1024 * saa->win.bpp;
  1924. saa->win.swidth = 1024;
  1925. saa->win.sheight = 768;
  1926. saa->picture.brightness = 32768;
  1927. saa->picture.contrast = 38768;
  1928. saa->picture.colour = 32768;
  1929. saa->cap = 0;
  1930. saa->dev = dev;
  1931. saa->nr = num;
  1932. saa->playmode = VID_PLAY_NORMAL;
  1933. memset(saa->boardcfg, 0, 64); /* clear board config area */
  1934. saa->saa7146_mem = NULL;
  1935. saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
  1936. saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
  1937. saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
  1938. saa->pagea1out = saa->pagea2in = saa->pagea2out =
  1939. saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
  1940. saa->pageRPS2 = NULL;
  1941. saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
  1942. saa->audhead = saa->vidtail = 0;
  1943. init_waitqueue_head(&saa->i2cq);
  1944. init_waitqueue_head(&saa->audq);
  1945. init_waitqueue_head(&saa->debiq);
  1946. init_waitqueue_head(&saa->vidq);
  1947. spin_lock_init(&saa->lock);
  1948. if (pci_enable_device(dev))
  1949. return -EIO;
  1950. saa->id = dev->device;
  1951. saa->irq = dev->irq;
  1952. saa->video_dev.minor = -1;
  1953. saa->saa7146_adr = pci_resource_start(dev, 0);
  1954. pci_read_config_byte(dev, PCI_CLASS_REVISION, &saa->revision);
  1955. saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
  1956. if (!saa->saa7146_mem)
  1957. return -EIO;
  1958. memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
  1959. saawrite(0, SAA7146_IER); /* turn off all interrupts */
  1960. result = request_irq(saa->irq, saa7146_irq,
  1961. SA_SHIRQ | SA_INTERRUPT, "stradis", (void *) saa);
  1962. if (result == -EINVAL)
  1963. printk(KERN_ERR "stradis%d: Bad irq number or handler\n",
  1964. num);
  1965. if (result == -EBUSY)
  1966. printk(KERN_ERR "stradis%d: IRQ %ld busy, change your PnP"
  1967. " config in BIOS\n", num, saa->irq);
  1968. if (result < 0) {
  1969. iounmap(saa->saa7146_mem);
  1970. return result;
  1971. }
  1972. pci_set_master(dev);
  1973. if (video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, video_nr) < 0) {
  1974. iounmap(saa->saa7146_mem);
  1975. return -1;
  1976. }
  1977. return 0;
  1978. }
  1979. static int init_saa7146(int i)
  1980. {
  1981. struct saa7146 *saa = &saa7146s[i];
  1982. saa->user = 0;
  1983. /* reset the saa7146 */
  1984. saawrite(0xffff0000, SAA7146_MC1);
  1985. mdelay(5);
  1986. /* enable debi and i2c transfers and pins */
  1987. saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
  1988. SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
  1989. /* ensure proper state of chip */
  1990. saawrite(0x00000000, SAA7146_PAGE1);
  1991. saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
  1992. saawrite(0x00000000, SAA7146_PAGE2);
  1993. saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
  1994. saawrite(0x00000000, SAA7146_DD1_INIT);
  1995. saawrite(0x00000000, SAA7146_DD1_STREAM_B);
  1996. saawrite(0x00000000, SAA7146_DD1_STREAM_A);
  1997. saawrite(0x00000000, SAA7146_BRS_CTRL);
  1998. saawrite(0x80400040, SAA7146_BCS_CTRL);
  1999. saawrite(0x0000e000 /*| (1<<29)*/, SAA7146_HPS_CTRL);
  2000. saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
  2001. saawrite(0x00000000, SAA7146_ACON1);
  2002. saawrite(0x00000000, SAA7146_ACON2);
  2003. saawrite(0x00000600, SAA7146_I2C_STATUS);
  2004. saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
  2005. SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
  2006. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
  2007. SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
  2008. SAA7146_MC2);
  2009. /* setup arbitration control registers */
  2010. saawrite(0x1412121a, SAA7146_PCI_BT_V1);
  2011. /* allocate 32k dma buffer + 4k for page table */
  2012. if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
  2013. printk(KERN_ERR "stradis%d: debi kmalloc failed\n", i);
  2014. return -1;
  2015. }
  2016. #if 0
  2017. saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
  2018. saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
  2019. for (i = 0; i < 12; i++) /* setup mmu page table */
  2020. saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
  2021. #endif
  2022. saa->audhead = saa->vidhead = saa->osdhead = 0;
  2023. saa->audtail = saa->vidtail = saa->osdtail = 0;
  2024. if (saa->vidbuf == NULL)
  2025. if ((saa->vidbuf = vmalloc(524288)) == NULL) {
  2026. printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
  2027. return -ENOMEM;
  2028. }
  2029. if (saa->audbuf == NULL)
  2030. if ((saa->audbuf = vmalloc(65536)) == NULL) {
  2031. printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
  2032. vfree(saa->vidbuf);
  2033. saa->vidbuf = NULL;
  2034. return -ENOMEM;
  2035. }
  2036. if (saa->osdbuf == NULL)
  2037. if ((saa->osdbuf = vmalloc(131072)) == NULL) {
  2038. printk(KERN_ERR "stradis%d: malloc failed\n", saa->nr);
  2039. vfree(saa->vidbuf);
  2040. vfree(saa->audbuf);
  2041. saa->vidbuf = saa->audbuf = NULL;
  2042. return -ENOMEM;
  2043. }
  2044. /* allocate 81920 byte buffer for clipping */
  2045. if ((saa->dmavid2 = kmalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
  2046. printk(KERN_ERR "stradis%d: clip kmalloc failed\n", saa->nr);
  2047. vfree(saa->vidbuf);
  2048. vfree(saa->audbuf);
  2049. vfree(saa->osdbuf);
  2050. saa->vidbuf = saa->audbuf = saa->osdbuf = NULL;
  2051. saa->dmavid2 = NULL;
  2052. return -1;
  2053. }
  2054. memset(saa->dmavid2, 0x00, VIDEO_CLIPMAP_SIZE); /* clip everything */
  2055. /* setup clipping registers */
  2056. saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
  2057. saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
  2058. saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
  2059. SAA7146_PROT_ADDR2);
  2060. saawrite(256, SAA7146_PITCH2);
  2061. saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
  2062. saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
  2063. SAA7146_MC2);
  2064. I2CBusScan(saa);
  2065. return 0;
  2066. }
  2067. static void release_saa(void)
  2068. {
  2069. u8 command;
  2070. int i;
  2071. struct saa7146 *saa;
  2072. for (i = 0; i < saa_num; i++) {
  2073. saa = &saa7146s[i];
  2074. /* turn off all capturing, DMA and IRQs */
  2075. saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
  2076. saawrite(0, SAA7146_MC2);
  2077. saawrite(0, SAA7146_IER);
  2078. saawrite(0xffffffffUL, SAA7146_ISR);
  2079. /* disable PCI bus-mastering */
  2080. pci_read_config_byte(saa->dev, PCI_COMMAND, &command);
  2081. command &= ~PCI_COMMAND_MASTER;
  2082. pci_write_config_byte(saa->dev, PCI_COMMAND, command);
  2083. /* unmap and free memory */
  2084. saa->audhead = saa->audtail = saa->osdhead = 0;
  2085. saa->vidhead = saa->vidtail = saa->osdtail = 0;
  2086. vfree(saa->vidbuf);
  2087. vfree(saa->audbuf);
  2088. vfree(saa->osdbuf);
  2089. if (saa->dmavid2)
  2090. kfree((void *) saa->dmavid2);
  2091. saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
  2092. saa->dmavid2 = NULL;
  2093. if (saa->dmadebi)
  2094. kfree((void *) saa->dmadebi);
  2095. if (saa->dmavid1)
  2096. kfree((void *) saa->dmavid1);
  2097. if (saa->dmavid2)
  2098. kfree((void *) saa->dmavid2);
  2099. if (saa->dmavid3)
  2100. kfree((void *) saa->dmavid3);
  2101. if (saa->dmaa1in)
  2102. kfree((void *) saa->dmaa1in);
  2103. if (saa->dmaa1out)
  2104. kfree((void *) saa->dmaa1out);
  2105. if (saa->dmaa2in)
  2106. kfree((void *) saa->dmaa2in);
  2107. if (saa->dmaa2out)
  2108. kfree((void *) saa->dmaa2out);
  2109. if (saa->dmaRPS1)
  2110. kfree((void *) saa->dmaRPS1);
  2111. if (saa->dmaRPS2)
  2112. kfree((void *) saa->dmaRPS2);
  2113. free_irq(saa->irq, saa);
  2114. if (saa->saa7146_mem)
  2115. iounmap(saa->saa7146_mem);
  2116. if (saa->video_dev.minor != -1)
  2117. video_unregister_device(&saa->video_dev);
  2118. }
  2119. }
  2120. static int __init stradis_init (void)
  2121. {
  2122. struct pci_dev *dev = NULL;
  2123. int result = 0, i;
  2124. saa_num = 0;
  2125. while ((dev = pci_find_device(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146, dev))) {
  2126. if (!dev->subsystem_vendor)
  2127. printk(KERN_INFO "stradis%d: rev1 decoder\n", saa_num);
  2128. else
  2129. printk(KERN_INFO "stradis%d: SDM2xx found\n", saa_num);
  2130. result = configure_saa7146(dev, saa_num++);
  2131. if (result)
  2132. return result;
  2133. }
  2134. if (saa_num)
  2135. printk(KERN_INFO "stradis: %d card(s) found.\n", saa_num);
  2136. else
  2137. return -EINVAL;
  2138. for (i = 0; i < saa_num; i++)
  2139. if (init_saa7146(i) < 0) {
  2140. release_saa();
  2141. return -EIO;
  2142. }
  2143. return 0;
  2144. }
  2145. static void __exit stradis_exit (void)
  2146. {
  2147. release_saa();
  2148. printk(KERN_INFO "stradis: module cleanup complete\n");
  2149. }
  2150. module_init(stradis_init);
  2151. module_exit(stradis_exit);