s3c2410_wdt.c 12 KB

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  1. /* linux/drivers/char/watchdog/s3c2410_wdt.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 Watchdog Timer Support
  7. *
  8. * Based on, softdog.c by Alan Cox,
  9. * (c) Copyright 1996 Alan Cox <alan@redhat.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Changelog:
  26. * 05-Oct-2004 BJD Added semaphore init to stop crashes on open
  27. * Fixed tmr_count / wdt_count confusion
  28. * Added configurable debug
  29. *
  30. * 11-Jan-2005 BJD Fixed divide-by-2 in timeout code
  31. *
  32. * 25-Jan-2005 DA Added suspend/resume support
  33. * Replaced reboot notifier with .shutdown method
  34. *
  35. * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
  36. */
  37. #include <linux/module.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/config.h>
  40. #include <linux/types.h>
  41. #include <linux/timer.h>
  42. #include <linux/miscdevice.h>
  43. #include <linux/watchdog.h>
  44. #include <linux/fs.h>
  45. #include <linux/init.h>
  46. #include <linux/device.h>
  47. #include <linux/interrupt.h>
  48. #include <asm/uaccess.h>
  49. #include <asm/io.h>
  50. #include <asm/arch/map.h>
  51. #include <asm/hardware/clock.h>
  52. #undef S3C24XX_VA_WATCHDOG
  53. #define S3C24XX_VA_WATCHDOG (0)
  54. #include <asm/arch/regs-watchdog.h>
  55. #define PFX "s3c2410-wdt: "
  56. #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
  57. #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
  58. static int nowayout = WATCHDOG_NOWAYOUT;
  59. static int tmr_margin = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
  60. static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
  61. static int soft_noboot = 0;
  62. static int debug = 0;
  63. module_param(tmr_margin, int, 0);
  64. module_param(tmr_atboot, int, 0);
  65. module_param(nowayout, int, 0);
  66. module_param(soft_noboot, int, 0);
  67. module_param(debug, int, 0);
  68. MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
  69. MODULE_PARM_DESC(tmr_atboot, "Watchdog is started at boot time if set to 1, default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
  70. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  71. MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)");
  72. MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug, (default 0)");
  73. typedef enum close_state {
  74. CLOSE_STATE_NOT,
  75. CLOSE_STATE_ALLOW=0x4021
  76. } close_state_t;
  77. static DECLARE_MUTEX(open_lock);
  78. static struct resource *wdt_mem;
  79. static struct resource *wdt_irq;
  80. static struct clk *wdt_clock;
  81. static void __iomem *wdt_base;
  82. static unsigned int wdt_count;
  83. static close_state_t allow_close;
  84. /* watchdog control routines */
  85. #define DBG(msg...) do { \
  86. if (debug) \
  87. printk(KERN_INFO msg); \
  88. } while(0)
  89. /* functions */
  90. static int s3c2410wdt_keepalive(void)
  91. {
  92. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  93. return 0;
  94. }
  95. static int s3c2410wdt_stop(void)
  96. {
  97. unsigned long wtcon;
  98. wtcon = readl(wdt_base + S3C2410_WTCON);
  99. wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
  100. writel(wtcon, wdt_base + S3C2410_WTCON);
  101. return 0;
  102. }
  103. static int s3c2410wdt_start(void)
  104. {
  105. unsigned long wtcon;
  106. s3c2410wdt_stop();
  107. wtcon = readl(wdt_base + S3C2410_WTCON);
  108. wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
  109. if (soft_noboot) {
  110. wtcon |= S3C2410_WTCON_INTEN;
  111. wtcon &= ~S3C2410_WTCON_RSTEN;
  112. } else {
  113. wtcon &= ~S3C2410_WTCON_INTEN;
  114. wtcon |= S3C2410_WTCON_RSTEN;
  115. }
  116. DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
  117. __FUNCTION__, wdt_count, wtcon);
  118. writel(wdt_count, wdt_base + S3C2410_WTDAT);
  119. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  120. writel(wtcon, wdt_base + S3C2410_WTCON);
  121. return 0;
  122. }
  123. static int s3c2410wdt_set_heartbeat(int timeout)
  124. {
  125. unsigned int freq = clk_get_rate(wdt_clock);
  126. unsigned int count;
  127. unsigned int divisor = 1;
  128. unsigned long wtcon;
  129. if (timeout < 1)
  130. return -EINVAL;
  131. freq /= 128;
  132. count = timeout * freq;
  133. DBG("%s: count=%d, timeout=%d, freq=%d\n",
  134. __FUNCTION__, count, timeout, freq);
  135. /* if the count is bigger than the watchdog register,
  136. then work out what we need to do (and if) we can
  137. actually make this value
  138. */
  139. if (count >= 0x10000) {
  140. for (divisor = 1; divisor <= 0x100; divisor++) {
  141. if ((count / divisor) < 0x10000)
  142. break;
  143. }
  144. if ((count / divisor) >= 0x10000) {
  145. printk(KERN_ERR PFX "timeout %d too big\n", timeout);
  146. return -EINVAL;
  147. }
  148. }
  149. tmr_margin = timeout;
  150. DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
  151. __FUNCTION__, timeout, divisor, count, count/divisor);
  152. count /= divisor;
  153. wdt_count = count;
  154. /* update the pre-scaler */
  155. wtcon = readl(wdt_base + S3C2410_WTCON);
  156. wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
  157. wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
  158. writel(count, wdt_base + S3C2410_WTDAT);
  159. writel(wtcon, wdt_base + S3C2410_WTCON);
  160. return 0;
  161. }
  162. /*
  163. * /dev/watchdog handling
  164. */
  165. static int s3c2410wdt_open(struct inode *inode, struct file *file)
  166. {
  167. if(down_trylock(&open_lock))
  168. return -EBUSY;
  169. if (nowayout) {
  170. __module_get(THIS_MODULE);
  171. } else {
  172. allow_close = CLOSE_STATE_ALLOW;
  173. }
  174. /* start the timer */
  175. s3c2410wdt_start();
  176. return nonseekable_open(inode, file);
  177. }
  178. static int s3c2410wdt_release(struct inode *inode, struct file *file)
  179. {
  180. /*
  181. * Shut off the timer.
  182. * Lock it in if it's a module and we set nowayout
  183. */
  184. if (allow_close == CLOSE_STATE_ALLOW) {
  185. s3c2410wdt_stop();
  186. } else {
  187. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  188. s3c2410wdt_keepalive();
  189. }
  190. allow_close = CLOSE_STATE_NOT;
  191. up(&open_lock);
  192. return 0;
  193. }
  194. static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
  195. size_t len, loff_t *ppos)
  196. {
  197. /*
  198. * Refresh the timer.
  199. */
  200. if(len) {
  201. if (!nowayout) {
  202. size_t i;
  203. /* In case it was set long ago */
  204. allow_close = CLOSE_STATE_NOT;
  205. for (i = 0; i != len; i++) {
  206. char c;
  207. if (get_user(c, data + i))
  208. return -EFAULT;
  209. if (c == 'V')
  210. allow_close = CLOSE_STATE_ALLOW;
  211. }
  212. }
  213. s3c2410wdt_keepalive();
  214. }
  215. return len;
  216. }
  217. #define OPTIONS WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE
  218. static struct watchdog_info s3c2410_wdt_ident = {
  219. .options = OPTIONS,
  220. .firmware_version = 0,
  221. .identity = "S3C2410 Watchdog",
  222. };
  223. static int s3c2410wdt_ioctl(struct inode *inode, struct file *file,
  224. unsigned int cmd, unsigned long arg)
  225. {
  226. void __user *argp = (void __user *)arg;
  227. int __user *p = argp;
  228. int new_margin;
  229. switch (cmd) {
  230. default:
  231. return -ENOIOCTLCMD;
  232. case WDIOC_GETSUPPORT:
  233. return copy_to_user(argp, &s3c2410_wdt_ident,
  234. sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
  235. case WDIOC_GETSTATUS:
  236. case WDIOC_GETBOOTSTATUS:
  237. return put_user(0, p);
  238. case WDIOC_KEEPALIVE:
  239. s3c2410wdt_keepalive();
  240. return 0;
  241. case WDIOC_SETTIMEOUT:
  242. if (get_user(new_margin, p))
  243. return -EFAULT;
  244. if (s3c2410wdt_set_heartbeat(new_margin))
  245. return -EINVAL;
  246. s3c2410wdt_keepalive();
  247. return put_user(tmr_margin, p);
  248. case WDIOC_GETTIMEOUT:
  249. return put_user(tmr_margin, p);
  250. }
  251. }
  252. /* kernel interface */
  253. static struct file_operations s3c2410wdt_fops = {
  254. .owner = THIS_MODULE,
  255. .llseek = no_llseek,
  256. .write = s3c2410wdt_write,
  257. .ioctl = s3c2410wdt_ioctl,
  258. .open = s3c2410wdt_open,
  259. .release = s3c2410wdt_release,
  260. };
  261. static struct miscdevice s3c2410wdt_miscdev = {
  262. .minor = WATCHDOG_MINOR,
  263. .name = "watchdog",
  264. .fops = &s3c2410wdt_fops,
  265. };
  266. /* interrupt handler code */
  267. static irqreturn_t s3c2410wdt_irq(int irqno, void *param,
  268. struct pt_regs *regs)
  269. {
  270. printk(KERN_INFO PFX "Watchdog timer expired!\n");
  271. s3c2410wdt_keepalive();
  272. return IRQ_HANDLED;
  273. }
  274. /* device interface */
  275. static int s3c2410wdt_probe(struct device *dev)
  276. {
  277. struct platform_device *pdev = to_platform_device(dev);
  278. struct resource *res;
  279. int started = 0;
  280. int ret;
  281. int size;
  282. DBG("%s: probe=%p, device=%p\n", __FUNCTION__, pdev, dev);
  283. /* get the memory region for the watchdog timer */
  284. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  285. if (res == NULL) {
  286. printk(KERN_INFO PFX "failed to get memory region resouce\n");
  287. return -ENOENT;
  288. }
  289. size = (res->end-res->start)+1;
  290. wdt_mem = request_mem_region(res->start, size, pdev->name);
  291. if (wdt_mem == NULL) {
  292. printk(KERN_INFO PFX "failed to get memory region\n");
  293. return -ENOENT;
  294. }
  295. wdt_base = ioremap(res->start, size);
  296. if (wdt_base == 0) {
  297. printk(KERN_INFO PFX "failed to ioremap() region\n");
  298. return -EINVAL;
  299. }
  300. DBG("probe: mapped wdt_base=%p\n", wdt_base);
  301. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  302. if (res == NULL) {
  303. printk(KERN_INFO PFX "failed to get irq resource\n");
  304. return -ENOENT;
  305. }
  306. ret = request_irq(res->start, s3c2410wdt_irq, 0, pdev->name, dev);
  307. if (ret != 0) {
  308. printk(KERN_INFO PFX "failed to install irq (%d)\n", ret);
  309. return ret;
  310. }
  311. wdt_clock = clk_get(dev, "watchdog");
  312. if (wdt_clock == NULL) {
  313. printk(KERN_INFO PFX "failed to find watchdog clock source\n");
  314. return -ENOENT;
  315. }
  316. clk_use(wdt_clock);
  317. clk_enable(wdt_clock);
  318. /* see if we can actually set the requested timer margin, and if
  319. * not, try the default value */
  320. if (s3c2410wdt_set_heartbeat(tmr_margin)) {
  321. started = s3c2410wdt_set_heartbeat(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  322. if (started == 0) {
  323. printk(KERN_INFO PFX "tmr_margin value out of range, default %d used\n",
  324. CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  325. } else {
  326. printk(KERN_INFO PFX "default timer value is out of range, cannot start\n");
  327. }
  328. }
  329. ret = misc_register(&s3c2410wdt_miscdev);
  330. if (ret) {
  331. printk (KERN_ERR PFX "cannot register miscdev on minor=%d (%d)\n",
  332. WATCHDOG_MINOR, ret);
  333. return ret;
  334. }
  335. if (tmr_atboot && started == 0) {
  336. printk(KERN_INFO PFX "Starting Watchdog Timer\n");
  337. s3c2410wdt_start();
  338. }
  339. return 0;
  340. }
  341. static int s3c2410wdt_remove(struct device *dev)
  342. {
  343. if (wdt_mem != NULL) {
  344. release_resource(wdt_mem);
  345. kfree(wdt_mem);
  346. wdt_mem = NULL;
  347. }
  348. if (wdt_irq != NULL) {
  349. free_irq(wdt_irq->start, dev);
  350. wdt_irq = NULL;
  351. }
  352. if (wdt_clock != NULL) {
  353. clk_disable(wdt_clock);
  354. clk_unuse(wdt_clock);
  355. clk_put(wdt_clock);
  356. wdt_clock = NULL;
  357. }
  358. misc_deregister(&s3c2410wdt_miscdev);
  359. return 0;
  360. }
  361. static void s3c2410wdt_shutdown(struct device *dev)
  362. {
  363. s3c2410wdt_stop();
  364. }
  365. #ifdef CONFIG_PM
  366. static unsigned long wtcon_save;
  367. static unsigned long wtdat_save;
  368. static int s3c2410wdt_suspend(struct device *dev, u32 state, u32 level)
  369. {
  370. if (level == SUSPEND_POWER_DOWN) {
  371. /* Save watchdog state, and turn it off. */
  372. wtcon_save = readl(wdt_base + S3C2410_WTCON);
  373. wtdat_save = readl(wdt_base + S3C2410_WTDAT);
  374. /* Note that WTCNT doesn't need to be saved. */
  375. s3c2410wdt_stop();
  376. }
  377. return 0;
  378. }
  379. static int s3c2410wdt_resume(struct device *dev, u32 level)
  380. {
  381. if (level == RESUME_POWER_ON) {
  382. /* Restore watchdog state. */
  383. writel(wtdat_save, wdt_base + S3C2410_WTDAT);
  384. writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
  385. writel(wtcon_save, wdt_base + S3C2410_WTCON);
  386. printk(KERN_INFO PFX "watchdog %sabled\n",
  387. (wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
  388. }
  389. return 0;
  390. }
  391. #else
  392. #define s3c2410wdt_suspend NULL
  393. #define s3c2410wdt_resume NULL
  394. #endif /* CONFIG_PM */
  395. static struct device_driver s3c2410wdt_driver = {
  396. .name = "s3c2410-wdt",
  397. .bus = &platform_bus_type,
  398. .probe = s3c2410wdt_probe,
  399. .remove = s3c2410wdt_remove,
  400. .shutdown = s3c2410wdt_shutdown,
  401. .suspend = s3c2410wdt_suspend,
  402. .resume = s3c2410wdt_resume,
  403. };
  404. static char banner[] __initdata = KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
  405. static int __init watchdog_init(void)
  406. {
  407. printk(banner);
  408. return driver_register(&s3c2410wdt_driver);
  409. }
  410. static void __exit watchdog_exit(void)
  411. {
  412. driver_unregister(&s3c2410wdt_driver);
  413. }
  414. module_init(watchdog_init);
  415. module_exit(watchdog_exit);
  416. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
  417. "Dimitry Andric <dimitry.andric@tomtom.com>");
  418. MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
  419. MODULE_LICENSE("GPL");
  420. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);