DAC960.c 260 KB

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  1. /*
  2. Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
  3. Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
  4. Portions Copyright 2002 by Mylex (An IBM Business Unit)
  5. This program is free software; you may redistribute and/or modify it under
  6. the terms of the GNU General Public License Version 2 as published by the
  7. Free Software Foundation.
  8. This program is distributed in the hope that it will be useful, but
  9. WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
  10. or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  11. for complete details.
  12. */
  13. #define DAC960_DriverVersion "2.5.47"
  14. #define DAC960_DriverDate "14 November 2002"
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/bio.h>
  20. #include <linux/completion.h>
  21. #include <linux/delay.h>
  22. #include <linux/genhd.h>
  23. #include <linux/hdreg.h>
  24. #include <linux/blkpg.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/ioport.h>
  27. #include <linux/mm.h>
  28. #include <linux/slab.h>
  29. #include <linux/proc_fs.h>
  30. #include <linux/reboot.h>
  31. #include <linux/spinlock.h>
  32. #include <linux/timer.h>
  33. #include <linux/pci.h>
  34. #include <linux/init.h>
  35. #include <asm/io.h>
  36. #include <asm/uaccess.h>
  37. #include "DAC960.h"
  38. #define DAC960_GAM_MINOR 252
  39. static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
  40. static int DAC960_ControllerCount;
  41. static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
  42. static long disk_size(DAC960_Controller_T *p, int drive_nr)
  43. {
  44. if (p->FirmwareType == DAC960_V1_Controller) {
  45. if (drive_nr >= p->LogicalDriveCount)
  46. return 0;
  47. return p->V1.LogicalDriveInformation[drive_nr].
  48. LogicalDriveSize;
  49. } else {
  50. DAC960_V2_LogicalDeviceInfo_T *i =
  51. p->V2.LogicalDeviceInformation[drive_nr];
  52. if (i == NULL)
  53. return 0;
  54. return i->ConfigurableDeviceSize;
  55. }
  56. }
  57. static int DAC960_open(struct inode *inode, struct file *file)
  58. {
  59. struct gendisk *disk = inode->i_bdev->bd_disk;
  60. DAC960_Controller_T *p = disk->queue->queuedata;
  61. int drive_nr = (long)disk->private_data;
  62. if (p->FirmwareType == DAC960_V1_Controller) {
  63. if (p->V1.LogicalDriveInformation[drive_nr].
  64. LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
  65. return -ENXIO;
  66. } else {
  67. DAC960_V2_LogicalDeviceInfo_T *i =
  68. p->V2.LogicalDeviceInformation[drive_nr];
  69. if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
  70. return -ENXIO;
  71. }
  72. check_disk_change(inode->i_bdev);
  73. if (!get_capacity(p->disks[drive_nr]))
  74. return -ENXIO;
  75. return 0;
  76. }
  77. static int DAC960_ioctl(struct inode *inode, struct file *file,
  78. unsigned int cmd, unsigned long arg)
  79. {
  80. struct gendisk *disk = inode->i_bdev->bd_disk;
  81. DAC960_Controller_T *p = disk->queue->queuedata;
  82. int drive_nr = (long)disk->private_data;
  83. struct hd_geometry g;
  84. struct hd_geometry __user *loc = (struct hd_geometry __user *)arg;
  85. if (cmd != HDIO_GETGEO || !loc)
  86. return -EINVAL;
  87. if (p->FirmwareType == DAC960_V1_Controller) {
  88. g.heads = p->V1.GeometryTranslationHeads;
  89. g.sectors = p->V1.GeometryTranslationSectors;
  90. g.cylinders = p->V1.LogicalDriveInformation[drive_nr].
  91. LogicalDriveSize / (g.heads * g.sectors);
  92. } else {
  93. DAC960_V2_LogicalDeviceInfo_T *i =
  94. p->V2.LogicalDeviceInformation[drive_nr];
  95. switch (i->DriveGeometry) {
  96. case DAC960_V2_Geometry_128_32:
  97. g.heads = 128;
  98. g.sectors = 32;
  99. break;
  100. case DAC960_V2_Geometry_255_63:
  101. g.heads = 255;
  102. g.sectors = 63;
  103. break;
  104. default:
  105. DAC960_Error("Illegal Logical Device Geometry %d\n",
  106. p, i->DriveGeometry);
  107. return -EINVAL;
  108. }
  109. g.cylinders = i->ConfigurableDeviceSize / (g.heads * g.sectors);
  110. }
  111. g.start = get_start_sect(inode->i_bdev);
  112. return copy_to_user(loc, &g, sizeof g) ? -EFAULT : 0;
  113. }
  114. static int DAC960_media_changed(struct gendisk *disk)
  115. {
  116. DAC960_Controller_T *p = disk->queue->queuedata;
  117. int drive_nr = (long)disk->private_data;
  118. if (!p->LogicalDriveInitiallyAccessible[drive_nr])
  119. return 1;
  120. return 0;
  121. }
  122. static int DAC960_revalidate_disk(struct gendisk *disk)
  123. {
  124. DAC960_Controller_T *p = disk->queue->queuedata;
  125. int unit = (long)disk->private_data;
  126. set_capacity(disk, disk_size(p, unit));
  127. return 0;
  128. }
  129. static struct block_device_operations DAC960_BlockDeviceOperations = {
  130. .owner = THIS_MODULE,
  131. .open = DAC960_open,
  132. .ioctl = DAC960_ioctl,
  133. .media_changed = DAC960_media_changed,
  134. .revalidate_disk = DAC960_revalidate_disk,
  135. };
  136. /*
  137. DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
  138. Copyright Notice, and Electronic Mail Address.
  139. */
  140. static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
  141. {
  142. DAC960_Announce("***** DAC960 RAID Driver Version "
  143. DAC960_DriverVersion " of "
  144. DAC960_DriverDate " *****\n", Controller);
  145. DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
  146. "<lnz@dandelion.com>\n", Controller);
  147. }
  148. /*
  149. DAC960_Failure prints a standardized error message, and then returns false.
  150. */
  151. static boolean DAC960_Failure(DAC960_Controller_T *Controller,
  152. unsigned char *ErrorMessage)
  153. {
  154. DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
  155. Controller);
  156. if (Controller->IO_Address == 0)
  157. DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
  158. "PCI Address 0x%X\n", Controller,
  159. Controller->Bus, Controller->Device,
  160. Controller->Function, Controller->PCI_Address);
  161. else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
  162. "0x%X PCI Address 0x%X\n", Controller,
  163. Controller->Bus, Controller->Device,
  164. Controller->Function, Controller->IO_Address,
  165. Controller->PCI_Address);
  166. DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
  167. return false;
  168. }
  169. /*
  170. init_dma_loaf() and slice_dma_loaf() are helper functions for
  171. aggregating the dma-mapped memory for a well-known collection of
  172. data structures that are of different lengths.
  173. These routines don't guarantee any alignment. The caller must
  174. include any space needed for alignment in the sizes of the structures
  175. that are passed in.
  176. */
  177. static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
  178. size_t len)
  179. {
  180. void *cpu_addr;
  181. dma_addr_t dma_handle;
  182. cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
  183. if (cpu_addr == NULL)
  184. return false;
  185. loaf->cpu_free = loaf->cpu_base = cpu_addr;
  186. loaf->dma_free =loaf->dma_base = dma_handle;
  187. loaf->length = len;
  188. memset(cpu_addr, 0, len);
  189. return true;
  190. }
  191. static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
  192. dma_addr_t *dma_handle)
  193. {
  194. void *cpu_end = loaf->cpu_free + len;
  195. void *cpu_addr = loaf->cpu_free;
  196. if (cpu_end > loaf->cpu_base + loaf->length)
  197. BUG();
  198. *dma_handle = loaf->dma_free;
  199. loaf->cpu_free = cpu_end;
  200. loaf->dma_free += len;
  201. return cpu_addr;
  202. }
  203. static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
  204. {
  205. if (loaf_handle->cpu_base != NULL)
  206. pci_free_consistent(dev, loaf_handle->length,
  207. loaf_handle->cpu_base, loaf_handle->dma_base);
  208. }
  209. /*
  210. DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
  211. data structures for Controller. It returns true on success and false on
  212. failure.
  213. */
  214. static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
  215. {
  216. int CommandAllocationLength, CommandAllocationGroupSize;
  217. int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
  218. void *AllocationPointer = NULL;
  219. void *ScatterGatherCPU = NULL;
  220. dma_addr_t ScatterGatherDMA;
  221. struct pci_pool *ScatterGatherPool;
  222. void *RequestSenseCPU = NULL;
  223. dma_addr_t RequestSenseDMA;
  224. struct pci_pool *RequestSensePool = NULL;
  225. if (Controller->FirmwareType == DAC960_V1_Controller)
  226. {
  227. CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
  228. CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
  229. ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
  230. Controller->PCIDevice,
  231. DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
  232. sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
  233. if (ScatterGatherPool == NULL)
  234. return DAC960_Failure(Controller,
  235. "AUXILIARY STRUCTURE CREATION (SG)");
  236. Controller->ScatterGatherPool = ScatterGatherPool;
  237. }
  238. else
  239. {
  240. CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
  241. CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
  242. ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
  243. Controller->PCIDevice,
  244. DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
  245. sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
  246. if (ScatterGatherPool == NULL)
  247. return DAC960_Failure(Controller,
  248. "AUXILIARY STRUCTURE CREATION (SG)");
  249. RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
  250. Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
  251. sizeof(int), 0);
  252. if (RequestSensePool == NULL) {
  253. pci_pool_destroy(ScatterGatherPool);
  254. return DAC960_Failure(Controller,
  255. "AUXILIARY STRUCTURE CREATION (SG)");
  256. }
  257. Controller->ScatterGatherPool = ScatterGatherPool;
  258. Controller->V2.RequestSensePool = RequestSensePool;
  259. }
  260. Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
  261. Controller->FreeCommands = NULL;
  262. for (CommandIdentifier = 1;
  263. CommandIdentifier <= Controller->DriverQueueDepth;
  264. CommandIdentifier++)
  265. {
  266. DAC960_Command_T *Command;
  267. if (--CommandsRemaining <= 0)
  268. {
  269. CommandsRemaining =
  270. Controller->DriverQueueDepth - CommandIdentifier + 1;
  271. if (CommandsRemaining > CommandAllocationGroupSize)
  272. CommandsRemaining = CommandAllocationGroupSize;
  273. CommandGroupByteCount =
  274. CommandsRemaining * CommandAllocationLength;
  275. AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC);
  276. if (AllocationPointer == NULL)
  277. return DAC960_Failure(Controller,
  278. "AUXILIARY STRUCTURE CREATION");
  279. memset(AllocationPointer, 0, CommandGroupByteCount);
  280. }
  281. Command = (DAC960_Command_T *) AllocationPointer;
  282. AllocationPointer += CommandAllocationLength;
  283. Command->CommandIdentifier = CommandIdentifier;
  284. Command->Controller = Controller;
  285. Command->Next = Controller->FreeCommands;
  286. Controller->FreeCommands = Command;
  287. Controller->Commands[CommandIdentifier-1] = Command;
  288. ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC,
  289. &ScatterGatherDMA);
  290. if (ScatterGatherCPU == NULL)
  291. return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
  292. if (RequestSensePool != NULL) {
  293. RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC,
  294. &RequestSenseDMA);
  295. if (RequestSenseCPU == NULL) {
  296. pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
  297. ScatterGatherDMA);
  298. return DAC960_Failure(Controller,
  299. "AUXILIARY STRUCTURE CREATION");
  300. }
  301. }
  302. if (Controller->FirmwareType == DAC960_V1_Controller) {
  303. Command->cmd_sglist = Command->V1.ScatterList;
  304. Command->V1.ScatterGatherList =
  305. (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
  306. Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
  307. } else {
  308. Command->cmd_sglist = Command->V2.ScatterList;
  309. Command->V2.ScatterGatherList =
  310. (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
  311. Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
  312. Command->V2.RequestSense =
  313. (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
  314. Command->V2.RequestSenseDMA = RequestSenseDMA;
  315. }
  316. }
  317. return true;
  318. }
  319. /*
  320. DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
  321. structures for Controller.
  322. */
  323. static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
  324. {
  325. int i;
  326. struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
  327. struct pci_pool *RequestSensePool = NULL;
  328. void *ScatterGatherCPU;
  329. dma_addr_t ScatterGatherDMA;
  330. void *RequestSenseCPU;
  331. dma_addr_t RequestSenseDMA;
  332. DAC960_Command_T *CommandGroup = NULL;
  333. if (Controller->FirmwareType == DAC960_V2_Controller)
  334. RequestSensePool = Controller->V2.RequestSensePool;
  335. Controller->FreeCommands = NULL;
  336. for (i = 0; i < Controller->DriverQueueDepth; i++)
  337. {
  338. DAC960_Command_T *Command = Controller->Commands[i];
  339. if (Command == NULL)
  340. continue;
  341. if (Controller->FirmwareType == DAC960_V1_Controller) {
  342. ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
  343. ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
  344. RequestSenseCPU = NULL;
  345. RequestSenseDMA = (dma_addr_t)0;
  346. } else {
  347. ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
  348. ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
  349. RequestSenseCPU = (void *)Command->V2.RequestSense;
  350. RequestSenseDMA = Command->V2.RequestSenseDMA;
  351. }
  352. if (ScatterGatherCPU != NULL)
  353. pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
  354. if (RequestSenseCPU != NULL)
  355. pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
  356. if ((Command->CommandIdentifier
  357. % Controller->CommandAllocationGroupSize) == 1) {
  358. /*
  359. * We can't free the group of commands until all of the
  360. * request sense and scatter gather dma structures are free.
  361. * Remember the beginning of the group, but don't free it
  362. * until we've reached the beginning of the next group.
  363. */
  364. if (CommandGroup != NULL)
  365. kfree(CommandGroup);
  366. CommandGroup = Command;
  367. }
  368. Controller->Commands[i] = NULL;
  369. }
  370. if (CommandGroup != NULL)
  371. kfree(CommandGroup);
  372. if (Controller->CombinedStatusBuffer != NULL)
  373. {
  374. kfree(Controller->CombinedStatusBuffer);
  375. Controller->CombinedStatusBuffer = NULL;
  376. Controller->CurrentStatusBuffer = NULL;
  377. }
  378. if (ScatterGatherPool != NULL)
  379. pci_pool_destroy(ScatterGatherPool);
  380. if (Controller->FirmwareType == DAC960_V1_Controller) return;
  381. if (RequestSensePool != NULL)
  382. pci_pool_destroy(RequestSensePool);
  383. for (i = 0; i < DAC960_MaxLogicalDrives; i++)
  384. if (Controller->V2.LogicalDeviceInformation[i] != NULL)
  385. {
  386. kfree(Controller->V2.LogicalDeviceInformation[i]);
  387. Controller->V2.LogicalDeviceInformation[i] = NULL;
  388. }
  389. for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
  390. {
  391. if (Controller->V2.PhysicalDeviceInformation[i] != NULL)
  392. {
  393. kfree(Controller->V2.PhysicalDeviceInformation[i]);
  394. Controller->V2.PhysicalDeviceInformation[i] = NULL;
  395. }
  396. if (Controller->V2.InquiryUnitSerialNumber[i] != NULL)
  397. {
  398. kfree(Controller->V2.InquiryUnitSerialNumber[i]);
  399. Controller->V2.InquiryUnitSerialNumber[i] = NULL;
  400. }
  401. }
  402. }
  403. /*
  404. DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
  405. Firmware Controllers.
  406. */
  407. static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
  408. {
  409. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  410. memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
  411. Command->V1.CommandStatus = 0;
  412. }
  413. /*
  414. DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
  415. Firmware Controllers.
  416. */
  417. static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
  418. {
  419. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  420. memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
  421. Command->V2.CommandStatus = 0;
  422. }
  423. /*
  424. DAC960_AllocateCommand allocates a Command structure from Controller's
  425. free list. During driver initialization, a special initialization command
  426. has been placed on the free list to guarantee that command allocation can
  427. never fail.
  428. */
  429. static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
  430. *Controller)
  431. {
  432. DAC960_Command_T *Command = Controller->FreeCommands;
  433. if (Command == NULL) return NULL;
  434. Controller->FreeCommands = Command->Next;
  435. Command->Next = NULL;
  436. return Command;
  437. }
  438. /*
  439. DAC960_DeallocateCommand deallocates Command, returning it to Controller's
  440. free list.
  441. */
  442. static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
  443. {
  444. DAC960_Controller_T *Controller = Command->Controller;
  445. Command->Request = NULL;
  446. Command->Next = Controller->FreeCommands;
  447. Controller->FreeCommands = Command;
  448. }
  449. /*
  450. DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
  451. */
  452. static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
  453. {
  454. spin_unlock_irq(&Controller->queue_lock);
  455. __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
  456. spin_lock_irq(&Controller->queue_lock);
  457. }
  458. /*
  459. DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
  460. */
  461. static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
  462. {
  463. DAC960_Controller_T *Controller = Command->Controller;
  464. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  465. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  466. DAC960_V2_CommandMailbox_T *NextCommandMailbox =
  467. Controller->V2.NextCommandMailbox;
  468. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  469. DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  470. if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
  471. Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
  472. DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
  473. Controller->V2.PreviousCommandMailbox2 =
  474. Controller->V2.PreviousCommandMailbox1;
  475. Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
  476. if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
  477. NextCommandMailbox = Controller->V2.FirstCommandMailbox;
  478. Controller->V2.NextCommandMailbox = NextCommandMailbox;
  479. }
  480. /*
  481. DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
  482. */
  483. static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
  484. {
  485. DAC960_Controller_T *Controller = Command->Controller;
  486. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  487. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  488. DAC960_V2_CommandMailbox_T *NextCommandMailbox =
  489. Controller->V2.NextCommandMailbox;
  490. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  491. DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  492. if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
  493. Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
  494. DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
  495. Controller->V2.PreviousCommandMailbox2 =
  496. Controller->V2.PreviousCommandMailbox1;
  497. Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
  498. if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
  499. NextCommandMailbox = Controller->V2.FirstCommandMailbox;
  500. Controller->V2.NextCommandMailbox = NextCommandMailbox;
  501. }
  502. /*
  503. DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
  504. */
  505. static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
  506. {
  507. DAC960_Controller_T *Controller = Command->Controller;
  508. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  509. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  510. DAC960_V2_CommandMailbox_T *NextCommandMailbox =
  511. Controller->V2.NextCommandMailbox;
  512. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  513. DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  514. if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
  515. Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
  516. DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
  517. Controller->V2.PreviousCommandMailbox2 =
  518. Controller->V2.PreviousCommandMailbox1;
  519. Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
  520. if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
  521. NextCommandMailbox = Controller->V2.FirstCommandMailbox;
  522. Controller->V2.NextCommandMailbox = NextCommandMailbox;
  523. }
  524. /*
  525. DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
  526. Controllers with Dual Mode Firmware.
  527. */
  528. static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
  529. {
  530. DAC960_Controller_T *Controller = Command->Controller;
  531. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  532. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  533. DAC960_V1_CommandMailbox_T *NextCommandMailbox =
  534. Controller->V1.NextCommandMailbox;
  535. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  536. DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  537. if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
  538. Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
  539. DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
  540. Controller->V1.PreviousCommandMailbox2 =
  541. Controller->V1.PreviousCommandMailbox1;
  542. Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
  543. if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
  544. NextCommandMailbox = Controller->V1.FirstCommandMailbox;
  545. Controller->V1.NextCommandMailbox = NextCommandMailbox;
  546. }
  547. /*
  548. DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
  549. Controllers with Single Mode Firmware.
  550. */
  551. static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
  552. {
  553. DAC960_Controller_T *Controller = Command->Controller;
  554. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  555. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  556. DAC960_V1_CommandMailbox_T *NextCommandMailbox =
  557. Controller->V1.NextCommandMailbox;
  558. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  559. DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  560. if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
  561. Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
  562. DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
  563. Controller->V1.PreviousCommandMailbox2 =
  564. Controller->V1.PreviousCommandMailbox1;
  565. Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
  566. if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
  567. NextCommandMailbox = Controller->V1.FirstCommandMailbox;
  568. Controller->V1.NextCommandMailbox = NextCommandMailbox;
  569. }
  570. /*
  571. DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
  572. Controllers with Dual Mode Firmware.
  573. */
  574. static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
  575. {
  576. DAC960_Controller_T *Controller = Command->Controller;
  577. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  578. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  579. DAC960_V1_CommandMailbox_T *NextCommandMailbox =
  580. Controller->V1.NextCommandMailbox;
  581. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  582. DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  583. if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
  584. Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
  585. DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
  586. Controller->V1.PreviousCommandMailbox2 =
  587. Controller->V1.PreviousCommandMailbox1;
  588. Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
  589. if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
  590. NextCommandMailbox = Controller->V1.FirstCommandMailbox;
  591. Controller->V1.NextCommandMailbox = NextCommandMailbox;
  592. }
  593. /*
  594. DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
  595. Controllers with Single Mode Firmware.
  596. */
  597. static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
  598. {
  599. DAC960_Controller_T *Controller = Command->Controller;
  600. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  601. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  602. DAC960_V1_CommandMailbox_T *NextCommandMailbox =
  603. Controller->V1.NextCommandMailbox;
  604. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  605. DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
  606. if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
  607. Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
  608. DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
  609. Controller->V1.PreviousCommandMailbox2 =
  610. Controller->V1.PreviousCommandMailbox1;
  611. Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
  612. if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
  613. NextCommandMailbox = Controller->V1.FirstCommandMailbox;
  614. Controller->V1.NextCommandMailbox = NextCommandMailbox;
  615. }
  616. /*
  617. DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
  618. */
  619. static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
  620. {
  621. DAC960_Controller_T *Controller = Command->Controller;
  622. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  623. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  624. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  625. while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
  626. udelay(1);
  627. DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
  628. DAC960_PD_NewCommand(ControllerBaseAddress);
  629. }
  630. /*
  631. DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
  632. */
  633. static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
  634. {
  635. DAC960_Controller_T *Controller = Command->Controller;
  636. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  637. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  638. CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
  639. switch (CommandMailbox->Common.CommandOpcode)
  640. {
  641. case DAC960_V1_Enquiry:
  642. CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
  643. break;
  644. case DAC960_V1_GetDeviceState:
  645. CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
  646. break;
  647. case DAC960_V1_Read:
  648. CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
  649. DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
  650. break;
  651. case DAC960_V1_Write:
  652. CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
  653. DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
  654. break;
  655. case DAC960_V1_ReadWithScatterGather:
  656. CommandMailbox->Common.CommandOpcode =
  657. DAC960_V1_ReadWithScatterGather_Old;
  658. DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
  659. break;
  660. case DAC960_V1_WriteWithScatterGather:
  661. CommandMailbox->Common.CommandOpcode =
  662. DAC960_V1_WriteWithScatterGather_Old;
  663. DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
  664. break;
  665. default:
  666. break;
  667. }
  668. while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
  669. udelay(1);
  670. DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
  671. DAC960_PD_NewCommand(ControllerBaseAddress);
  672. }
  673. /*
  674. DAC960_ExecuteCommand executes Command and waits for completion.
  675. */
  676. static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
  677. {
  678. DAC960_Controller_T *Controller = Command->Controller;
  679. DECLARE_COMPLETION(Completion);
  680. unsigned long flags;
  681. Command->Completion = &Completion;
  682. spin_lock_irqsave(&Controller->queue_lock, flags);
  683. DAC960_QueueCommand(Command);
  684. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  685. if (in_interrupt())
  686. return;
  687. wait_for_completion(&Completion);
  688. }
  689. /*
  690. DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
  691. Command and waits for completion. It returns true on success and false
  692. on failure.
  693. */
  694. static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
  695. DAC960_V1_CommandOpcode_T CommandOpcode,
  696. dma_addr_t DataDMA)
  697. {
  698. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  699. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  700. DAC960_V1_CommandStatus_T CommandStatus;
  701. DAC960_V1_ClearCommand(Command);
  702. Command->CommandType = DAC960_ImmediateCommand;
  703. CommandMailbox->Type3.CommandOpcode = CommandOpcode;
  704. CommandMailbox->Type3.BusAddress = DataDMA;
  705. DAC960_ExecuteCommand(Command);
  706. CommandStatus = Command->V1.CommandStatus;
  707. DAC960_DeallocateCommand(Command);
  708. return (CommandStatus == DAC960_V1_NormalCompletion);
  709. }
  710. /*
  711. DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
  712. Command and waits for completion. It returns true on success and false
  713. on failure.
  714. */
  715. static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
  716. DAC960_V1_CommandOpcode_T CommandOpcode,
  717. unsigned char CommandOpcode2,
  718. dma_addr_t DataDMA)
  719. {
  720. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  721. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  722. DAC960_V1_CommandStatus_T CommandStatus;
  723. DAC960_V1_ClearCommand(Command);
  724. Command->CommandType = DAC960_ImmediateCommand;
  725. CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
  726. CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
  727. CommandMailbox->Type3B.BusAddress = DataDMA;
  728. DAC960_ExecuteCommand(Command);
  729. CommandStatus = Command->V1.CommandStatus;
  730. DAC960_DeallocateCommand(Command);
  731. return (CommandStatus == DAC960_V1_NormalCompletion);
  732. }
  733. /*
  734. DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
  735. Command and waits for completion. It returns true on success and false
  736. on failure.
  737. */
  738. static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
  739. DAC960_V1_CommandOpcode_T CommandOpcode,
  740. unsigned char Channel,
  741. unsigned char TargetID,
  742. dma_addr_t DataDMA)
  743. {
  744. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  745. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  746. DAC960_V1_CommandStatus_T CommandStatus;
  747. DAC960_V1_ClearCommand(Command);
  748. Command->CommandType = DAC960_ImmediateCommand;
  749. CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
  750. CommandMailbox->Type3D.Channel = Channel;
  751. CommandMailbox->Type3D.TargetID = TargetID;
  752. CommandMailbox->Type3D.BusAddress = DataDMA;
  753. DAC960_ExecuteCommand(Command);
  754. CommandStatus = Command->V1.CommandStatus;
  755. DAC960_DeallocateCommand(Command);
  756. return (CommandStatus == DAC960_V1_NormalCompletion);
  757. }
  758. /*
  759. DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
  760. Reading IOCTL Command and waits for completion. It returns true on success
  761. and false on failure.
  762. Return data in The controller's HealthStatusBuffer, which is dma-able memory
  763. */
  764. static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
  765. {
  766. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  767. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  768. DAC960_V2_CommandStatus_T CommandStatus;
  769. DAC960_V2_ClearCommand(Command);
  770. Command->CommandType = DAC960_ImmediateCommand;
  771. CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
  772. CommandMailbox->Common.CommandControlBits
  773. .DataTransferControllerToHost = true;
  774. CommandMailbox->Common.CommandControlBits
  775. .NoAutoRequestSense = true;
  776. CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
  777. CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
  778. CommandMailbox->Common.DataTransferMemoryAddress
  779. .ScatterGatherSegments[0]
  780. .SegmentDataPointer =
  781. Controller->V2.HealthStatusBufferDMA;
  782. CommandMailbox->Common.DataTransferMemoryAddress
  783. .ScatterGatherSegments[0]
  784. .SegmentByteCount =
  785. CommandMailbox->Common.DataTransferSize;
  786. DAC960_ExecuteCommand(Command);
  787. CommandStatus = Command->V2.CommandStatus;
  788. DAC960_DeallocateCommand(Command);
  789. return (CommandStatus == DAC960_V2_NormalCompletion);
  790. }
  791. /*
  792. DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
  793. Information Reading IOCTL Command and waits for completion. It returns
  794. true on success and false on failure.
  795. Data is returned in the controller's V2.NewControllerInformation dma-able
  796. memory buffer.
  797. */
  798. static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
  799. {
  800. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  801. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  802. DAC960_V2_CommandStatus_T CommandStatus;
  803. DAC960_V2_ClearCommand(Command);
  804. Command->CommandType = DAC960_ImmediateCommand;
  805. CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
  806. CommandMailbox->ControllerInfo.CommandControlBits
  807. .DataTransferControllerToHost = true;
  808. CommandMailbox->ControllerInfo.CommandControlBits
  809. .NoAutoRequestSense = true;
  810. CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
  811. CommandMailbox->ControllerInfo.ControllerNumber = 0;
  812. CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
  813. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  814. .ScatterGatherSegments[0]
  815. .SegmentDataPointer =
  816. Controller->V2.NewControllerInformationDMA;
  817. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  818. .ScatterGatherSegments[0]
  819. .SegmentByteCount =
  820. CommandMailbox->ControllerInfo.DataTransferSize;
  821. DAC960_ExecuteCommand(Command);
  822. CommandStatus = Command->V2.CommandStatus;
  823. DAC960_DeallocateCommand(Command);
  824. return (CommandStatus == DAC960_V2_NormalCompletion);
  825. }
  826. /*
  827. DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
  828. Device Information Reading IOCTL Command and waits for completion. It
  829. returns true on success and false on failure.
  830. Data is returned in the controller's V2.NewLogicalDeviceInformation
  831. */
  832. static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
  833. unsigned short LogicalDeviceNumber)
  834. {
  835. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  836. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  837. DAC960_V2_CommandStatus_T CommandStatus;
  838. DAC960_V2_ClearCommand(Command);
  839. Command->CommandType = DAC960_ImmediateCommand;
  840. CommandMailbox->LogicalDeviceInfo.CommandOpcode =
  841. DAC960_V2_IOCTL;
  842. CommandMailbox->LogicalDeviceInfo.CommandControlBits
  843. .DataTransferControllerToHost = true;
  844. CommandMailbox->LogicalDeviceInfo.CommandControlBits
  845. .NoAutoRequestSense = true;
  846. CommandMailbox->LogicalDeviceInfo.DataTransferSize =
  847. sizeof(DAC960_V2_LogicalDeviceInfo_T);
  848. CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
  849. LogicalDeviceNumber;
  850. CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
  851. CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
  852. .ScatterGatherSegments[0]
  853. .SegmentDataPointer =
  854. Controller->V2.NewLogicalDeviceInformationDMA;
  855. CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
  856. .ScatterGatherSegments[0]
  857. .SegmentByteCount =
  858. CommandMailbox->LogicalDeviceInfo.DataTransferSize;
  859. DAC960_ExecuteCommand(Command);
  860. CommandStatus = Command->V2.CommandStatus;
  861. DAC960_DeallocateCommand(Command);
  862. return (CommandStatus == DAC960_V2_NormalCompletion);
  863. }
  864. /*
  865. DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
  866. Physical Device Information" IOCTL Command and waits for completion. It
  867. returns true on success and false on failure.
  868. The Channel, TargetID, LogicalUnit arguments should be 0 the first time
  869. this function is called for a given controller. This will return data
  870. for the "first" device on that controller. The returned data includes a
  871. Channel, TargetID, LogicalUnit that can be passed in to this routine to
  872. get data for the NEXT device on that controller.
  873. Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
  874. memory buffer.
  875. */
  876. static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
  877. unsigned char Channel,
  878. unsigned char TargetID,
  879. unsigned char LogicalUnit)
  880. {
  881. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  882. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  883. DAC960_V2_CommandStatus_T CommandStatus;
  884. DAC960_V2_ClearCommand(Command);
  885. Command->CommandType = DAC960_ImmediateCommand;
  886. CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
  887. CommandMailbox->PhysicalDeviceInfo.CommandControlBits
  888. .DataTransferControllerToHost = true;
  889. CommandMailbox->PhysicalDeviceInfo.CommandControlBits
  890. .NoAutoRequestSense = true;
  891. CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
  892. sizeof(DAC960_V2_PhysicalDeviceInfo_T);
  893. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
  894. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
  895. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
  896. CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
  897. DAC960_V2_GetPhysicalDeviceInfoValid;
  898. CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
  899. .ScatterGatherSegments[0]
  900. .SegmentDataPointer =
  901. Controller->V2.NewPhysicalDeviceInformationDMA;
  902. CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
  903. .ScatterGatherSegments[0]
  904. .SegmentByteCount =
  905. CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
  906. DAC960_ExecuteCommand(Command);
  907. CommandStatus = Command->V2.CommandStatus;
  908. DAC960_DeallocateCommand(Command);
  909. return (CommandStatus == DAC960_V2_NormalCompletion);
  910. }
  911. static void DAC960_V2_ConstructNewUnitSerialNumber(
  912. DAC960_Controller_T *Controller,
  913. DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
  914. int LogicalUnit)
  915. {
  916. CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
  917. CommandMailbox->SCSI_10.CommandControlBits
  918. .DataTransferControllerToHost = true;
  919. CommandMailbox->SCSI_10.CommandControlBits
  920. .NoAutoRequestSense = true;
  921. CommandMailbox->SCSI_10.DataTransferSize =
  922. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  923. CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
  924. CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
  925. CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
  926. CommandMailbox->SCSI_10.CDBLength = 6;
  927. CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
  928. CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
  929. CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
  930. CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
  931. CommandMailbox->SCSI_10.SCSI_CDB[4] =
  932. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  933. CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
  934. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  935. .ScatterGatherSegments[0]
  936. .SegmentDataPointer =
  937. Controller->V2.NewInquiryUnitSerialNumberDMA;
  938. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  939. .ScatterGatherSegments[0]
  940. .SegmentByteCount =
  941. CommandMailbox->SCSI_10.DataTransferSize;
  942. }
  943. /*
  944. DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
  945. Inquiry command to a SCSI device identified by Channel number,
  946. Target id, Logical Unit Number. This function Waits for completion
  947. of the command.
  948. The return data includes Unit Serial Number information for the
  949. specified device.
  950. Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
  951. memory buffer.
  952. */
  953. static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
  954. int Channel, int TargetID, int LogicalUnit)
  955. {
  956. DAC960_Command_T *Command;
  957. DAC960_V2_CommandMailbox_T *CommandMailbox;
  958. DAC960_V2_CommandStatus_T CommandStatus;
  959. Command = DAC960_AllocateCommand(Controller);
  960. CommandMailbox = &Command->V2.CommandMailbox;
  961. DAC960_V2_ClearCommand(Command);
  962. Command->CommandType = DAC960_ImmediateCommand;
  963. DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
  964. Channel, TargetID, LogicalUnit);
  965. DAC960_ExecuteCommand(Command);
  966. CommandStatus = Command->V2.CommandStatus;
  967. DAC960_DeallocateCommand(Command);
  968. return (CommandStatus == DAC960_V2_NormalCompletion);
  969. }
  970. /*
  971. DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
  972. Operation IOCTL Command and waits for completion. It returns true on
  973. success and false on failure.
  974. */
  975. static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
  976. DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
  977. DAC960_V2_OperationDevice_T
  978. OperationDevice)
  979. {
  980. DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
  981. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  982. DAC960_V2_CommandStatus_T CommandStatus;
  983. DAC960_V2_ClearCommand(Command);
  984. Command->CommandType = DAC960_ImmediateCommand;
  985. CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
  986. CommandMailbox->DeviceOperation.CommandControlBits
  987. .DataTransferControllerToHost = true;
  988. CommandMailbox->DeviceOperation.CommandControlBits
  989. .NoAutoRequestSense = true;
  990. CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
  991. CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
  992. DAC960_ExecuteCommand(Command);
  993. CommandStatus = Command->V2.CommandStatus;
  994. DAC960_DeallocateCommand(Command);
  995. return (CommandStatus == DAC960_V2_NormalCompletion);
  996. }
  997. /*
  998. DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
  999. for DAC960 V1 Firmware Controllers.
  1000. PD and P controller types have no memory mailbox, but still need the
  1001. other dma mapped memory.
  1002. */
  1003. static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
  1004. *Controller)
  1005. {
  1006. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  1007. DAC960_HardwareType_T hw_type = Controller->HardwareType;
  1008. struct pci_dev *PCI_Device = Controller->PCIDevice;
  1009. struct dma_loaf *DmaPages = &Controller->DmaPages;
  1010. size_t DmaPagesSize;
  1011. size_t CommandMailboxesSize;
  1012. size_t StatusMailboxesSize;
  1013. DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
  1014. dma_addr_t CommandMailboxesMemoryDMA;
  1015. DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
  1016. dma_addr_t StatusMailboxesMemoryDMA;
  1017. DAC960_V1_CommandMailbox_T CommandMailbox;
  1018. DAC960_V1_CommandStatus_T CommandStatus;
  1019. int TimeoutCounter;
  1020. int i;
  1021. if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask))
  1022. return DAC960_Failure(Controller, "DMA mask out of range");
  1023. Controller->BounceBufferLimit = DAC690_V1_PciDmaMask;
  1024. if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
  1025. CommandMailboxesSize = 0;
  1026. StatusMailboxesSize = 0;
  1027. } else {
  1028. CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
  1029. StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
  1030. }
  1031. DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
  1032. sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
  1033. sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
  1034. sizeof(DAC960_V1_RebuildProgress_T) +
  1035. sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
  1036. sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
  1037. sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
  1038. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  1039. if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
  1040. return false;
  1041. if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
  1042. goto skip_mailboxes;
  1043. CommandMailboxesMemory = slice_dma_loaf(DmaPages,
  1044. CommandMailboxesSize, &CommandMailboxesMemoryDMA);
  1045. /* These are the base addresses for the command memory mailbox array */
  1046. Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
  1047. Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
  1048. CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
  1049. Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
  1050. Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
  1051. Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
  1052. Controller->V1.PreviousCommandMailbox2 =
  1053. Controller->V1.LastCommandMailbox - 1;
  1054. /* These are the base addresses for the status memory mailbox array */
  1055. StatusMailboxesMemory = slice_dma_loaf(DmaPages,
  1056. StatusMailboxesSize, &StatusMailboxesMemoryDMA);
  1057. Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
  1058. Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
  1059. StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
  1060. Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
  1061. Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
  1062. skip_mailboxes:
  1063. Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
  1064. sizeof(DAC960_V1_DCDB_T),
  1065. &Controller->V1.MonitoringDCDB_DMA);
  1066. Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
  1067. sizeof(DAC960_V1_Enquiry_T),
  1068. &Controller->V1.NewEnquiryDMA);
  1069. Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
  1070. sizeof(DAC960_V1_ErrorTable_T),
  1071. &Controller->V1.NewErrorTableDMA);
  1072. Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
  1073. sizeof(DAC960_V1_EventLogEntry_T),
  1074. &Controller->V1.EventLogEntryDMA);
  1075. Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
  1076. sizeof(DAC960_V1_RebuildProgress_T),
  1077. &Controller->V1.RebuildProgressDMA);
  1078. Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
  1079. sizeof(DAC960_V1_LogicalDriveInformationArray_T),
  1080. &Controller->V1.NewLogicalDriveInformationDMA);
  1081. Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
  1082. sizeof(DAC960_V1_BackgroundInitializationStatus_T),
  1083. &Controller->V1.BackgroundInitializationStatusDMA);
  1084. Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
  1085. sizeof(DAC960_V1_DeviceState_T),
  1086. &Controller->V1.NewDeviceStateDMA);
  1087. Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
  1088. sizeof(DAC960_SCSI_Inquiry_T),
  1089. &Controller->V1.NewInquiryStandardDataDMA);
  1090. Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
  1091. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
  1092. &Controller->V1.NewInquiryUnitSerialNumberDMA);
  1093. if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
  1094. return true;
  1095. /* Enable the Memory Mailbox Interface. */
  1096. Controller->V1.DualModeMemoryMailboxInterface = true;
  1097. CommandMailbox.TypeX.CommandOpcode = 0x2B;
  1098. CommandMailbox.TypeX.CommandIdentifier = 0;
  1099. CommandMailbox.TypeX.CommandOpcode2 = 0x14;
  1100. CommandMailbox.TypeX.CommandMailboxesBusAddress =
  1101. Controller->V1.FirstCommandMailboxDMA;
  1102. CommandMailbox.TypeX.StatusMailboxesBusAddress =
  1103. Controller->V1.FirstStatusMailboxDMA;
  1104. #define TIMEOUT_COUNT 1000000
  1105. for (i = 0; i < 2; i++)
  1106. switch (Controller->HardwareType)
  1107. {
  1108. case DAC960_LA_Controller:
  1109. TimeoutCounter = TIMEOUT_COUNT;
  1110. while (--TimeoutCounter >= 0)
  1111. {
  1112. if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
  1113. break;
  1114. udelay(10);
  1115. }
  1116. if (TimeoutCounter < 0) return false;
  1117. DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
  1118. DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
  1119. TimeoutCounter = TIMEOUT_COUNT;
  1120. while (--TimeoutCounter >= 0)
  1121. {
  1122. if (DAC960_LA_HardwareMailboxStatusAvailableP(
  1123. ControllerBaseAddress))
  1124. break;
  1125. udelay(10);
  1126. }
  1127. if (TimeoutCounter < 0) return false;
  1128. CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
  1129. DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
  1130. DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
  1131. if (CommandStatus == DAC960_V1_NormalCompletion) return true;
  1132. Controller->V1.DualModeMemoryMailboxInterface = false;
  1133. CommandMailbox.TypeX.CommandOpcode2 = 0x10;
  1134. break;
  1135. case DAC960_PG_Controller:
  1136. TimeoutCounter = TIMEOUT_COUNT;
  1137. while (--TimeoutCounter >= 0)
  1138. {
  1139. if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
  1140. break;
  1141. udelay(10);
  1142. }
  1143. if (TimeoutCounter < 0) return false;
  1144. DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
  1145. DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
  1146. TimeoutCounter = TIMEOUT_COUNT;
  1147. while (--TimeoutCounter >= 0)
  1148. {
  1149. if (DAC960_PG_HardwareMailboxStatusAvailableP(
  1150. ControllerBaseAddress))
  1151. break;
  1152. udelay(10);
  1153. }
  1154. if (TimeoutCounter < 0) return false;
  1155. CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
  1156. DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
  1157. DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
  1158. if (CommandStatus == DAC960_V1_NormalCompletion) return true;
  1159. Controller->V1.DualModeMemoryMailboxInterface = false;
  1160. CommandMailbox.TypeX.CommandOpcode2 = 0x10;
  1161. break;
  1162. default:
  1163. DAC960_Failure(Controller, "Unknown Controller Type\n");
  1164. break;
  1165. }
  1166. return false;
  1167. }
  1168. /*
  1169. DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
  1170. for DAC960 V2 Firmware Controllers.
  1171. Aggregate the space needed for the controller's memory mailbox and
  1172. the other data structures that will be targets of dma transfers with
  1173. the controller. Allocate a dma-mapped region of memory to hold these
  1174. structures. Then, save CPU pointers and dma_addr_t values to reference
  1175. the structures that are contained in that region.
  1176. */
  1177. static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
  1178. *Controller)
  1179. {
  1180. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  1181. struct pci_dev *PCI_Device = Controller->PCIDevice;
  1182. struct dma_loaf *DmaPages = &Controller->DmaPages;
  1183. size_t DmaPagesSize;
  1184. size_t CommandMailboxesSize;
  1185. size_t StatusMailboxesSize;
  1186. DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
  1187. dma_addr_t CommandMailboxesMemoryDMA;
  1188. DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
  1189. dma_addr_t StatusMailboxesMemoryDMA;
  1190. DAC960_V2_CommandMailbox_T *CommandMailbox;
  1191. dma_addr_t CommandMailboxDMA;
  1192. DAC960_V2_CommandStatus_T CommandStatus;
  1193. if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask))
  1194. return DAC960_Failure(Controller, "DMA mask out of range");
  1195. Controller->BounceBufferLimit = DAC690_V2_PciDmaMask;
  1196. /* This is a temporary dma mapping, used only in the scope of this function */
  1197. CommandMailbox =
  1198. (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device,
  1199. sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
  1200. if (CommandMailbox == NULL)
  1201. return false;
  1202. CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
  1203. StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
  1204. DmaPagesSize =
  1205. CommandMailboxesSize + StatusMailboxesSize +
  1206. sizeof(DAC960_V2_HealthStatusBuffer_T) +
  1207. sizeof(DAC960_V2_ControllerInfo_T) +
  1208. sizeof(DAC960_V2_LogicalDeviceInfo_T) +
  1209. sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
  1210. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
  1211. sizeof(DAC960_V2_Event_T) +
  1212. sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
  1213. if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
  1214. pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
  1215. CommandMailbox, CommandMailboxDMA);
  1216. return false;
  1217. }
  1218. CommandMailboxesMemory = slice_dma_loaf(DmaPages,
  1219. CommandMailboxesSize, &CommandMailboxesMemoryDMA);
  1220. /* These are the base addresses for the command memory mailbox array */
  1221. Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
  1222. Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
  1223. CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
  1224. Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
  1225. Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
  1226. Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
  1227. Controller->V2.PreviousCommandMailbox2 =
  1228. Controller->V2.LastCommandMailbox - 1;
  1229. /* These are the base addresses for the status memory mailbox array */
  1230. StatusMailboxesMemory = slice_dma_loaf(DmaPages,
  1231. StatusMailboxesSize, &StatusMailboxesMemoryDMA);
  1232. Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
  1233. Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
  1234. StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
  1235. Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
  1236. Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
  1237. Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
  1238. sizeof(DAC960_V2_HealthStatusBuffer_T),
  1239. &Controller->V2.HealthStatusBufferDMA);
  1240. Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
  1241. sizeof(DAC960_V2_ControllerInfo_T),
  1242. &Controller->V2.NewControllerInformationDMA);
  1243. Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
  1244. sizeof(DAC960_V2_LogicalDeviceInfo_T),
  1245. &Controller->V2.NewLogicalDeviceInformationDMA);
  1246. Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
  1247. sizeof(DAC960_V2_PhysicalDeviceInfo_T),
  1248. &Controller->V2.NewPhysicalDeviceInformationDMA);
  1249. Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
  1250. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
  1251. &Controller->V2.NewInquiryUnitSerialNumberDMA);
  1252. Controller->V2.Event = slice_dma_loaf(DmaPages,
  1253. sizeof(DAC960_V2_Event_T),
  1254. &Controller->V2.EventDMA);
  1255. Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
  1256. sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
  1257. &Controller->V2.PhysicalToLogicalDeviceDMA);
  1258. /*
  1259. Enable the Memory Mailbox Interface.
  1260. I don't know why we can't just use one of the memory mailboxes
  1261. we just allocated to do this, instead of using this temporary one.
  1262. Try this change later.
  1263. */
  1264. memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
  1265. CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
  1266. CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
  1267. CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
  1268. CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
  1269. (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
  1270. CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
  1271. (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
  1272. CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
  1273. CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
  1274. CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
  1275. CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
  1276. CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
  1277. CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
  1278. Controller->V2.HealthStatusBufferDMA;
  1279. CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
  1280. Controller->V2.FirstCommandMailboxDMA;
  1281. CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
  1282. Controller->V2.FirstStatusMailboxDMA;
  1283. switch (Controller->HardwareType)
  1284. {
  1285. case DAC960_GEM_Controller:
  1286. while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
  1287. udelay(1);
  1288. DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
  1289. DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
  1290. while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
  1291. udelay(1);
  1292. CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
  1293. DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
  1294. DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
  1295. break;
  1296. case DAC960_BA_Controller:
  1297. while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
  1298. udelay(1);
  1299. DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
  1300. DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
  1301. while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
  1302. udelay(1);
  1303. CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
  1304. DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
  1305. DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
  1306. break;
  1307. case DAC960_LP_Controller:
  1308. while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
  1309. udelay(1);
  1310. DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
  1311. DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
  1312. while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
  1313. udelay(1);
  1314. CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
  1315. DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
  1316. DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
  1317. break;
  1318. default:
  1319. DAC960_Failure(Controller, "Unknown Controller Type\n");
  1320. CommandStatus = DAC960_V2_AbormalCompletion;
  1321. break;
  1322. }
  1323. pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
  1324. CommandMailbox, CommandMailboxDMA);
  1325. return (CommandStatus == DAC960_V2_NormalCompletion);
  1326. }
  1327. /*
  1328. DAC960_V1_ReadControllerConfiguration reads the Configuration Information
  1329. from DAC960 V1 Firmware Controllers and initializes the Controller structure.
  1330. */
  1331. static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
  1332. *Controller)
  1333. {
  1334. DAC960_V1_Enquiry2_T *Enquiry2;
  1335. dma_addr_t Enquiry2DMA;
  1336. DAC960_V1_Config2_T *Config2;
  1337. dma_addr_t Config2DMA;
  1338. int LogicalDriveNumber, Channel, TargetID;
  1339. struct dma_loaf local_dma;
  1340. if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
  1341. sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
  1342. return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
  1343. Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
  1344. Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
  1345. if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
  1346. Controller->V1.NewEnquiryDMA)) {
  1347. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1348. return DAC960_Failure(Controller, "ENQUIRY");
  1349. }
  1350. memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
  1351. sizeof(DAC960_V1_Enquiry_T));
  1352. if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
  1353. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1354. return DAC960_Failure(Controller, "ENQUIRY2");
  1355. }
  1356. if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
  1357. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1358. return DAC960_Failure(Controller, "READ CONFIG2");
  1359. }
  1360. if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
  1361. Controller->V1.NewLogicalDriveInformationDMA)) {
  1362. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1363. return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
  1364. }
  1365. memcpy(&Controller->V1.LogicalDriveInformation,
  1366. Controller->V1.NewLogicalDriveInformation,
  1367. sizeof(DAC960_V1_LogicalDriveInformationArray_T));
  1368. for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
  1369. for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
  1370. if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
  1371. Channel, TargetID,
  1372. Controller->V1.NewDeviceStateDMA)) {
  1373. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1374. return DAC960_Failure(Controller, "GET DEVICE STATE");
  1375. }
  1376. memcpy(&Controller->V1.DeviceState[Channel][TargetID],
  1377. Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
  1378. }
  1379. /*
  1380. Initialize the Controller Model Name and Full Model Name fields.
  1381. */
  1382. switch (Enquiry2->HardwareID.SubModel)
  1383. {
  1384. case DAC960_V1_P_PD_PU:
  1385. if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
  1386. strcpy(Controller->ModelName, "DAC960PU");
  1387. else strcpy(Controller->ModelName, "DAC960PD");
  1388. break;
  1389. case DAC960_V1_PL:
  1390. strcpy(Controller->ModelName, "DAC960PL");
  1391. break;
  1392. case DAC960_V1_PG:
  1393. strcpy(Controller->ModelName, "DAC960PG");
  1394. break;
  1395. case DAC960_V1_PJ:
  1396. strcpy(Controller->ModelName, "DAC960PJ");
  1397. break;
  1398. case DAC960_V1_PR:
  1399. strcpy(Controller->ModelName, "DAC960PR");
  1400. break;
  1401. case DAC960_V1_PT:
  1402. strcpy(Controller->ModelName, "DAC960PT");
  1403. break;
  1404. case DAC960_V1_PTL0:
  1405. strcpy(Controller->ModelName, "DAC960PTL0");
  1406. break;
  1407. case DAC960_V1_PRL:
  1408. strcpy(Controller->ModelName, "DAC960PRL");
  1409. break;
  1410. case DAC960_V1_PTL1:
  1411. strcpy(Controller->ModelName, "DAC960PTL1");
  1412. break;
  1413. case DAC960_V1_1164P:
  1414. strcpy(Controller->ModelName, "DAC1164P");
  1415. break;
  1416. default:
  1417. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1418. return DAC960_Failure(Controller, "MODEL VERIFICATION");
  1419. }
  1420. strcpy(Controller->FullModelName, "Mylex ");
  1421. strcat(Controller->FullModelName, Controller->ModelName);
  1422. /*
  1423. Initialize the Controller Firmware Version field and verify that it
  1424. is a supported firmware version. The supported firmware versions are:
  1425. DAC1164P 5.06 and above
  1426. DAC960PTL/PRL/PJ/PG 4.06 and above
  1427. DAC960PU/PD/PL 3.51 and above
  1428. DAC960PU/PD/PL/P 2.73 and above
  1429. */
  1430. #if defined(CONFIG_ALPHA)
  1431. /*
  1432. DEC Alpha machines were often equipped with DAC960 cards that were
  1433. OEMed from Mylex, and had their own custom firmware. Version 2.70,
  1434. the last custom FW revision to be released by DEC for these older
  1435. controllers, appears to work quite well with this driver.
  1436. Cards tested successfully were several versions each of the PD and
  1437. PU, called by DEC the KZPSC and KZPAC, respectively, and having
  1438. the Manufacturer Numbers (from Mylex), usually on a sticker on the
  1439. back of the board, of:
  1440. KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
  1441. KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
  1442. */
  1443. # define FIRMWARE_27X "2.70"
  1444. #else
  1445. # define FIRMWARE_27X "2.73"
  1446. #endif
  1447. if (Enquiry2->FirmwareID.MajorVersion == 0)
  1448. {
  1449. Enquiry2->FirmwareID.MajorVersion =
  1450. Controller->V1.Enquiry.MajorFirmwareVersion;
  1451. Enquiry2->FirmwareID.MinorVersion =
  1452. Controller->V1.Enquiry.MinorFirmwareVersion;
  1453. Enquiry2->FirmwareID.FirmwareType = '0';
  1454. Enquiry2->FirmwareID.TurnID = 0;
  1455. }
  1456. sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
  1457. Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
  1458. Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
  1459. if (!((Controller->FirmwareVersion[0] == '5' &&
  1460. strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
  1461. (Controller->FirmwareVersion[0] == '4' &&
  1462. strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
  1463. (Controller->FirmwareVersion[0] == '3' &&
  1464. strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
  1465. (Controller->FirmwareVersion[0] == '2' &&
  1466. strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
  1467. {
  1468. DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
  1469. DAC960_Error("Firmware Version = '%s'\n", Controller,
  1470. Controller->FirmwareVersion);
  1471. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1472. return false;
  1473. }
  1474. /*
  1475. Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
  1476. Enclosure Management Enabled fields.
  1477. */
  1478. Controller->Channels = Enquiry2->ActualChannels;
  1479. Controller->Targets = Enquiry2->MaxTargets;
  1480. Controller->MemorySize = Enquiry2->MemorySize >> 20;
  1481. Controller->V1.SAFTE_EnclosureManagementEnabled =
  1482. (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
  1483. /*
  1484. Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
  1485. Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
  1486. Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
  1487. less than the Controller Queue Depth to allow for an automatic drive
  1488. rebuild operation.
  1489. */
  1490. Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
  1491. Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
  1492. if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
  1493. Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
  1494. Controller->LogicalDriveCount =
  1495. Controller->V1.Enquiry.NumberOfLogicalDrives;
  1496. Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
  1497. Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
  1498. Controller->DriverScatterGatherLimit =
  1499. Controller->ControllerScatterGatherLimit;
  1500. if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
  1501. Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
  1502. /*
  1503. Initialize the Stripe Size, Segment Size, and Geometry Translation.
  1504. */
  1505. Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
  1506. >> (10 - DAC960_BlockSizeBits);
  1507. Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
  1508. >> (10 - DAC960_BlockSizeBits);
  1509. switch (Config2->DriveGeometry)
  1510. {
  1511. case DAC960_V1_Geometry_128_32:
  1512. Controller->V1.GeometryTranslationHeads = 128;
  1513. Controller->V1.GeometryTranslationSectors = 32;
  1514. break;
  1515. case DAC960_V1_Geometry_255_63:
  1516. Controller->V1.GeometryTranslationHeads = 255;
  1517. Controller->V1.GeometryTranslationSectors = 63;
  1518. break;
  1519. default:
  1520. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1521. return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
  1522. }
  1523. /*
  1524. Initialize the Background Initialization Status.
  1525. */
  1526. if ((Controller->FirmwareVersion[0] == '4' &&
  1527. strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
  1528. (Controller->FirmwareVersion[0] == '5' &&
  1529. strcmp(Controller->FirmwareVersion, "5.08") >= 0))
  1530. {
  1531. Controller->V1.BackgroundInitializationStatusSupported = true;
  1532. DAC960_V1_ExecuteType3B(Controller,
  1533. DAC960_V1_BackgroundInitializationControl, 0x20,
  1534. Controller->
  1535. V1.BackgroundInitializationStatusDMA);
  1536. memcpy(&Controller->V1.LastBackgroundInitializationStatus,
  1537. Controller->V1.BackgroundInitializationStatus,
  1538. sizeof(DAC960_V1_BackgroundInitializationStatus_T));
  1539. }
  1540. /*
  1541. Initialize the Logical Drive Initially Accessible flag.
  1542. */
  1543. for (LogicalDriveNumber = 0;
  1544. LogicalDriveNumber < Controller->LogicalDriveCount;
  1545. LogicalDriveNumber++)
  1546. if (Controller->V1.LogicalDriveInformation
  1547. [LogicalDriveNumber].LogicalDriveState !=
  1548. DAC960_V1_LogicalDrive_Offline)
  1549. Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
  1550. Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
  1551. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1552. return true;
  1553. }
  1554. /*
  1555. DAC960_V2_ReadControllerConfiguration reads the Configuration Information
  1556. from DAC960 V2 Firmware Controllers and initializes the Controller structure.
  1557. */
  1558. static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
  1559. *Controller)
  1560. {
  1561. DAC960_V2_ControllerInfo_T *ControllerInfo =
  1562. &Controller->V2.ControllerInformation;
  1563. unsigned short LogicalDeviceNumber = 0;
  1564. int ModelNameLength;
  1565. /* Get data into dma-able area, then copy into permanant location */
  1566. if (!DAC960_V2_NewControllerInfo(Controller))
  1567. return DAC960_Failure(Controller, "GET CONTROLLER INFO");
  1568. memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
  1569. sizeof(DAC960_V2_ControllerInfo_T));
  1570. if (!DAC960_V2_GeneralInfo(Controller))
  1571. return DAC960_Failure(Controller, "GET HEALTH STATUS");
  1572. /*
  1573. Initialize the Controller Model Name and Full Model Name fields.
  1574. */
  1575. ModelNameLength = sizeof(ControllerInfo->ControllerName);
  1576. if (ModelNameLength > sizeof(Controller->ModelName)-1)
  1577. ModelNameLength = sizeof(Controller->ModelName)-1;
  1578. memcpy(Controller->ModelName, ControllerInfo->ControllerName,
  1579. ModelNameLength);
  1580. ModelNameLength--;
  1581. while (Controller->ModelName[ModelNameLength] == ' ' ||
  1582. Controller->ModelName[ModelNameLength] == '\0')
  1583. ModelNameLength--;
  1584. Controller->ModelName[++ModelNameLength] = '\0';
  1585. strcpy(Controller->FullModelName, "Mylex ");
  1586. strcat(Controller->FullModelName, Controller->ModelName);
  1587. /*
  1588. Initialize the Controller Firmware Version field.
  1589. */
  1590. sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
  1591. ControllerInfo->FirmwareMajorVersion,
  1592. ControllerInfo->FirmwareMinorVersion,
  1593. ControllerInfo->FirmwareTurnNumber);
  1594. if (ControllerInfo->FirmwareMajorVersion == 6 &&
  1595. ControllerInfo->FirmwareMinorVersion == 0 &&
  1596. ControllerInfo->FirmwareTurnNumber < 1)
  1597. {
  1598. DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
  1599. Controller, Controller->FirmwareVersion);
  1600. DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
  1601. Controller);
  1602. DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
  1603. Controller);
  1604. }
  1605. /*
  1606. Initialize the Controller Channels, Targets, and Memory Size.
  1607. */
  1608. Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
  1609. Controller->Targets =
  1610. ControllerInfo->MaximumTargetsPerChannel
  1611. [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
  1612. Controller->MemorySize = ControllerInfo->MemorySizeMB;
  1613. /*
  1614. Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
  1615. Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
  1616. Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
  1617. less than the Controller Queue Depth to allow for an automatic drive
  1618. rebuild operation.
  1619. */
  1620. Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
  1621. Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
  1622. if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
  1623. Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
  1624. Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
  1625. Controller->MaxBlocksPerCommand =
  1626. ControllerInfo->MaximumDataTransferSizeInBlocks;
  1627. Controller->ControllerScatterGatherLimit =
  1628. ControllerInfo->MaximumScatterGatherEntries;
  1629. Controller->DriverScatterGatherLimit =
  1630. Controller->ControllerScatterGatherLimit;
  1631. if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
  1632. Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
  1633. /*
  1634. Initialize the Logical Device Information.
  1635. */
  1636. while (true)
  1637. {
  1638. DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
  1639. Controller->V2.NewLogicalDeviceInformation;
  1640. DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
  1641. DAC960_V2_PhysicalDevice_T PhysicalDevice;
  1642. if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
  1643. break;
  1644. LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
  1645. if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
  1646. DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
  1647. Controller, LogicalDeviceNumber);
  1648. break;
  1649. }
  1650. if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
  1651. DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
  1652. Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
  1653. LogicalDeviceNumber++;
  1654. continue;
  1655. }
  1656. PhysicalDevice.Controller = 0;
  1657. PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
  1658. PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
  1659. PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
  1660. Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
  1661. PhysicalDevice;
  1662. if (NewLogicalDeviceInfo->LogicalDeviceState !=
  1663. DAC960_V2_LogicalDevice_Offline)
  1664. Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
  1665. LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
  1666. kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
  1667. if (LogicalDeviceInfo == NULL)
  1668. return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
  1669. Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
  1670. LogicalDeviceInfo;
  1671. memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
  1672. sizeof(DAC960_V2_LogicalDeviceInfo_T));
  1673. LogicalDeviceNumber++;
  1674. }
  1675. return true;
  1676. }
  1677. /*
  1678. DAC960_ReportControllerConfiguration reports the Configuration Information
  1679. for Controller.
  1680. */
  1681. static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
  1682. *Controller)
  1683. {
  1684. DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
  1685. Controller, Controller->ModelName);
  1686. DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
  1687. Controller, Controller->FirmwareVersion,
  1688. Controller->Channels, Controller->MemorySize);
  1689. DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
  1690. Controller, Controller->Bus,
  1691. Controller->Device, Controller->Function);
  1692. if (Controller->IO_Address == 0)
  1693. DAC960_Info("Unassigned\n", Controller);
  1694. else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
  1695. DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
  1696. Controller, Controller->PCI_Address,
  1697. (unsigned long) Controller->BaseAddress,
  1698. Controller->IRQ_Channel);
  1699. DAC960_Info(" Controller Queue Depth: %d, "
  1700. "Maximum Blocks per Command: %d\n",
  1701. Controller, Controller->ControllerQueueDepth,
  1702. Controller->MaxBlocksPerCommand);
  1703. DAC960_Info(" Driver Queue Depth: %d, "
  1704. "Scatter/Gather Limit: %d of %d Segments\n",
  1705. Controller, Controller->DriverQueueDepth,
  1706. Controller->DriverScatterGatherLimit,
  1707. Controller->ControllerScatterGatherLimit);
  1708. if (Controller->FirmwareType == DAC960_V1_Controller)
  1709. {
  1710. DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
  1711. "BIOS Geometry: %d/%d\n", Controller,
  1712. Controller->V1.StripeSize,
  1713. Controller->V1.SegmentSize,
  1714. Controller->V1.GeometryTranslationHeads,
  1715. Controller->V1.GeometryTranslationSectors);
  1716. if (Controller->V1.SAFTE_EnclosureManagementEnabled)
  1717. DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
  1718. }
  1719. return true;
  1720. }
  1721. /*
  1722. DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
  1723. for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
  1724. Inquiry Unit Serial Number information for each device connected to
  1725. Controller.
  1726. */
  1727. static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
  1728. *Controller)
  1729. {
  1730. struct dma_loaf local_dma;
  1731. dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
  1732. DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
  1733. dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
  1734. DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
  1735. dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
  1736. DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
  1737. struct completion Completions[DAC960_V1_MaxChannels];
  1738. unsigned long flags;
  1739. int Channel, TargetID;
  1740. if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
  1741. DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
  1742. sizeof(DAC960_SCSI_Inquiry_T) +
  1743. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
  1744. return DAC960_Failure(Controller,
  1745. "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
  1746. for (Channel = 0; Channel < Controller->Channels; Channel++) {
  1747. DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
  1748. sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
  1749. SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
  1750. sizeof(DAC960_SCSI_Inquiry_T),
  1751. SCSI_Inquiry_dma + Channel);
  1752. SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
  1753. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
  1754. SCSI_NewInquiryUnitSerialNumberDMA + Channel);
  1755. }
  1756. for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
  1757. {
  1758. /*
  1759. * For each channel, submit a probe for a device on that channel.
  1760. * The timeout interval for a device that is present is 10 seconds.
  1761. * With this approach, the timeout periods can elapse in parallel
  1762. * on each channel.
  1763. */
  1764. for (Channel = 0; Channel < Controller->Channels; Channel++)
  1765. {
  1766. dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
  1767. DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
  1768. dma_addr_t DCDB_dma = DCDBs_dma[Channel];
  1769. DAC960_Command_T *Command = Controller->Commands[Channel];
  1770. struct completion *Completion = &Completions[Channel];
  1771. init_completion(Completion);
  1772. DAC960_V1_ClearCommand(Command);
  1773. Command->CommandType = DAC960_ImmediateCommand;
  1774. Command->Completion = Completion;
  1775. Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
  1776. Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
  1777. DCDB->Channel = Channel;
  1778. DCDB->TargetID = TargetID;
  1779. DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
  1780. DCDB->EarlyStatus = false;
  1781. DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
  1782. DCDB->NoAutomaticRequestSense = false;
  1783. DCDB->DisconnectPermitted = true;
  1784. DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
  1785. DCDB->BusAddress = NewInquiryStandardDataDMA;
  1786. DCDB->CDBLength = 6;
  1787. DCDB->TransferLengthHigh4 = 0;
  1788. DCDB->SenseLength = sizeof(DCDB->SenseData);
  1789. DCDB->CDB[0] = 0x12; /* INQUIRY */
  1790. DCDB->CDB[1] = 0; /* EVPD = 0 */
  1791. DCDB->CDB[2] = 0; /* Page Code */
  1792. DCDB->CDB[3] = 0; /* Reserved */
  1793. DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
  1794. DCDB->CDB[5] = 0; /* Control */
  1795. spin_lock_irqsave(&Controller->queue_lock, flags);
  1796. DAC960_QueueCommand(Command);
  1797. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  1798. }
  1799. /*
  1800. * Wait for the problems submitted in the previous loop
  1801. * to complete. On the probes that are successful,
  1802. * get the serial number of the device that was found.
  1803. */
  1804. for (Channel = 0; Channel < Controller->Channels; Channel++)
  1805. {
  1806. DAC960_SCSI_Inquiry_T *InquiryStandardData =
  1807. &Controller->V1.InquiryStandardData[Channel][TargetID];
  1808. DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
  1809. dma_addr_t NewInquiryUnitSerialNumberDMA =
  1810. SCSI_NewInquiryUnitSerialNumberDMA[Channel];
  1811. DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
  1812. SCSI_NewInquiryUnitSerialNumberCPU[Channel];
  1813. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  1814. &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
  1815. DAC960_Command_T *Command = Controller->Commands[Channel];
  1816. DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
  1817. struct completion *Completion = &Completions[Channel];
  1818. wait_for_completion(Completion);
  1819. if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
  1820. memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
  1821. InquiryStandardData->PeripheralDeviceType = 0x1F;
  1822. continue;
  1823. } else
  1824. memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
  1825. /* Preserve Channel and TargetID values from the previous loop */
  1826. Command->Completion = Completion;
  1827. DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  1828. DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
  1829. DCDB->SenseLength = sizeof(DCDB->SenseData);
  1830. DCDB->CDB[0] = 0x12; /* INQUIRY */
  1831. DCDB->CDB[1] = 1; /* EVPD = 1 */
  1832. DCDB->CDB[2] = 0x80; /* Page Code */
  1833. DCDB->CDB[3] = 0; /* Reserved */
  1834. DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  1835. DCDB->CDB[5] = 0; /* Control */
  1836. spin_lock_irqsave(&Controller->queue_lock, flags);
  1837. DAC960_QueueCommand(Command);
  1838. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  1839. wait_for_completion(Completion);
  1840. if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
  1841. memset(InquiryUnitSerialNumber, 0,
  1842. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1843. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  1844. } else
  1845. memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
  1846. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1847. }
  1848. }
  1849. free_dma_loaf(Controller->PCIDevice, &local_dma);
  1850. return true;
  1851. }
  1852. /*
  1853. DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
  1854. for DAC960 V2 Firmware Controllers by requesting the Physical Device
  1855. Information and SCSI Inquiry Unit Serial Number information for each
  1856. device connected to Controller.
  1857. */
  1858. static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
  1859. *Controller)
  1860. {
  1861. unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
  1862. unsigned short PhysicalDeviceIndex = 0;
  1863. while (true)
  1864. {
  1865. DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
  1866. Controller->V2.NewPhysicalDeviceInformation;
  1867. DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
  1868. DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
  1869. Controller->V2.NewInquiryUnitSerialNumber;
  1870. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
  1871. if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
  1872. break;
  1873. PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
  1874. kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
  1875. if (PhysicalDeviceInfo == NULL)
  1876. return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
  1877. Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
  1878. PhysicalDeviceInfo;
  1879. memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
  1880. sizeof(DAC960_V2_PhysicalDeviceInfo_T));
  1881. InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
  1882. kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
  1883. if (InquiryUnitSerialNumber == NULL) {
  1884. kfree(PhysicalDeviceInfo);
  1885. return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
  1886. }
  1887. Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
  1888. InquiryUnitSerialNumber;
  1889. Channel = NewPhysicalDeviceInfo->Channel;
  1890. TargetID = NewPhysicalDeviceInfo->TargetID;
  1891. LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
  1892. /*
  1893. Some devices do NOT have Unit Serial Numbers.
  1894. This command fails for them. But, we still want to
  1895. remember those devices are there. Construct a
  1896. UnitSerialNumber structure for the failure case.
  1897. */
  1898. if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
  1899. memset(InquiryUnitSerialNumber, 0,
  1900. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1901. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  1902. } else
  1903. memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
  1904. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  1905. PhysicalDeviceIndex++;
  1906. LogicalUnit++;
  1907. }
  1908. return true;
  1909. }
  1910. /*
  1911. DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
  1912. Product Serial Number fields of the Inquiry Standard Data and Inquiry
  1913. Unit Serial Number structures.
  1914. */
  1915. static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
  1916. *InquiryStandardData,
  1917. DAC960_SCSI_Inquiry_UnitSerialNumber_T
  1918. *InquiryUnitSerialNumber,
  1919. unsigned char *Vendor,
  1920. unsigned char *Model,
  1921. unsigned char *Revision,
  1922. unsigned char *SerialNumber)
  1923. {
  1924. int SerialNumberLength, i;
  1925. if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
  1926. for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
  1927. {
  1928. unsigned char VendorCharacter =
  1929. InquiryStandardData->VendorIdentification[i];
  1930. Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
  1931. ? VendorCharacter : ' ');
  1932. }
  1933. Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
  1934. for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
  1935. {
  1936. unsigned char ModelCharacter =
  1937. InquiryStandardData->ProductIdentification[i];
  1938. Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
  1939. ? ModelCharacter : ' ');
  1940. }
  1941. Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
  1942. for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
  1943. {
  1944. unsigned char RevisionCharacter =
  1945. InquiryStandardData->ProductRevisionLevel[i];
  1946. Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
  1947. ? RevisionCharacter : ' ');
  1948. }
  1949. Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
  1950. if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
  1951. SerialNumberLength = InquiryUnitSerialNumber->PageLength;
  1952. if (SerialNumberLength >
  1953. sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
  1954. SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
  1955. for (i = 0; i < SerialNumberLength; i++)
  1956. {
  1957. unsigned char SerialNumberCharacter =
  1958. InquiryUnitSerialNumber->ProductSerialNumber[i];
  1959. SerialNumber[i] =
  1960. (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
  1961. ? SerialNumberCharacter : ' ');
  1962. }
  1963. SerialNumber[SerialNumberLength] = '\0';
  1964. }
  1965. /*
  1966. DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
  1967. Information for DAC960 V1 Firmware Controllers.
  1968. */
  1969. static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
  1970. *Controller)
  1971. {
  1972. int LogicalDriveNumber, Channel, TargetID;
  1973. DAC960_Info(" Physical Devices:\n", Controller);
  1974. for (Channel = 0; Channel < Controller->Channels; Channel++)
  1975. for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
  1976. {
  1977. DAC960_SCSI_Inquiry_T *InquiryStandardData =
  1978. &Controller->V1.InquiryStandardData[Channel][TargetID];
  1979. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  1980. &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
  1981. DAC960_V1_DeviceState_T *DeviceState =
  1982. &Controller->V1.DeviceState[Channel][TargetID];
  1983. DAC960_V1_ErrorTableEntry_T *ErrorEntry =
  1984. &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
  1985. char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
  1986. char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
  1987. char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
  1988. char SerialNumber[1+sizeof(InquiryUnitSerialNumber
  1989. ->ProductSerialNumber)];
  1990. if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
  1991. DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
  1992. Vendor, Model, Revision, SerialNumber);
  1993. DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
  1994. Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
  1995. Vendor, Model, Revision);
  1996. if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
  1997. DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
  1998. if (DeviceState->Present &&
  1999. DeviceState->DeviceType == DAC960_V1_DiskType)
  2000. {
  2001. if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
  2002. DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
  2003. Controller,
  2004. (DeviceState->DeviceState == DAC960_V1_Device_Dead
  2005. ? "Dead"
  2006. : DeviceState->DeviceState
  2007. == DAC960_V1_Device_WriteOnly
  2008. ? "Write-Only"
  2009. : DeviceState->DeviceState
  2010. == DAC960_V1_Device_Online
  2011. ? "Online" : "Standby"),
  2012. DeviceState->DiskSize,
  2013. Controller->V1.DeviceResetCount[Channel][TargetID]);
  2014. else
  2015. DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
  2016. (DeviceState->DeviceState == DAC960_V1_Device_Dead
  2017. ? "Dead"
  2018. : DeviceState->DeviceState
  2019. == DAC960_V1_Device_WriteOnly
  2020. ? "Write-Only"
  2021. : DeviceState->DeviceState
  2022. == DAC960_V1_Device_Online
  2023. ? "Online" : "Standby"),
  2024. DeviceState->DiskSize);
  2025. }
  2026. if (ErrorEntry->ParityErrorCount > 0 ||
  2027. ErrorEntry->SoftErrorCount > 0 ||
  2028. ErrorEntry->HardErrorCount > 0 ||
  2029. ErrorEntry->MiscErrorCount > 0)
  2030. DAC960_Info(" Errors - Parity: %d, Soft: %d, "
  2031. "Hard: %d, Misc: %d\n", Controller,
  2032. ErrorEntry->ParityErrorCount,
  2033. ErrorEntry->SoftErrorCount,
  2034. ErrorEntry->HardErrorCount,
  2035. ErrorEntry->MiscErrorCount);
  2036. }
  2037. DAC960_Info(" Logical Drives:\n", Controller);
  2038. for (LogicalDriveNumber = 0;
  2039. LogicalDriveNumber < Controller->LogicalDriveCount;
  2040. LogicalDriveNumber++)
  2041. {
  2042. DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
  2043. &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
  2044. DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
  2045. Controller, Controller->ControllerNumber, LogicalDriveNumber,
  2046. LogicalDriveInformation->RAIDLevel,
  2047. (LogicalDriveInformation->LogicalDriveState
  2048. == DAC960_V1_LogicalDrive_Online
  2049. ? "Online"
  2050. : LogicalDriveInformation->LogicalDriveState
  2051. == DAC960_V1_LogicalDrive_Critical
  2052. ? "Critical" : "Offline"),
  2053. LogicalDriveInformation->LogicalDriveSize,
  2054. (LogicalDriveInformation->WriteBack
  2055. ? "Write Back" : "Write Thru"));
  2056. }
  2057. return true;
  2058. }
  2059. /*
  2060. DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
  2061. Information for DAC960 V2 Firmware Controllers.
  2062. */
  2063. static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
  2064. *Controller)
  2065. {
  2066. int PhysicalDeviceIndex, LogicalDriveNumber;
  2067. DAC960_Info(" Physical Devices:\n", Controller);
  2068. for (PhysicalDeviceIndex = 0;
  2069. PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
  2070. PhysicalDeviceIndex++)
  2071. {
  2072. DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
  2073. Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
  2074. DAC960_SCSI_Inquiry_T *InquiryStandardData =
  2075. (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
  2076. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  2077. Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
  2078. char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
  2079. char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
  2080. char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
  2081. char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
  2082. if (PhysicalDeviceInfo == NULL) break;
  2083. DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
  2084. Vendor, Model, Revision, SerialNumber);
  2085. DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
  2086. Controller,
  2087. PhysicalDeviceInfo->Channel,
  2088. PhysicalDeviceInfo->TargetID,
  2089. (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
  2090. Vendor, Model, Revision);
  2091. if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
  2092. DAC960_Info(" %sAsynchronous\n", Controller,
  2093. (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
  2094. ? "Wide " :""));
  2095. else
  2096. DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
  2097. (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
  2098. ? "Wide " :""),
  2099. (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
  2100. * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
  2101. if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
  2102. DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
  2103. if (PhysicalDeviceInfo->PhysicalDeviceState ==
  2104. DAC960_V2_Device_Unconfigured)
  2105. continue;
  2106. DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
  2107. (PhysicalDeviceInfo->PhysicalDeviceState
  2108. == DAC960_V2_Device_Online
  2109. ? "Online"
  2110. : PhysicalDeviceInfo->PhysicalDeviceState
  2111. == DAC960_V2_Device_Rebuild
  2112. ? "Rebuild"
  2113. : PhysicalDeviceInfo->PhysicalDeviceState
  2114. == DAC960_V2_Device_Missing
  2115. ? "Missing"
  2116. : PhysicalDeviceInfo->PhysicalDeviceState
  2117. == DAC960_V2_Device_Critical
  2118. ? "Critical"
  2119. : PhysicalDeviceInfo->PhysicalDeviceState
  2120. == DAC960_V2_Device_Dead
  2121. ? "Dead"
  2122. : PhysicalDeviceInfo->PhysicalDeviceState
  2123. == DAC960_V2_Device_SuspectedDead
  2124. ? "Suspected-Dead"
  2125. : PhysicalDeviceInfo->PhysicalDeviceState
  2126. == DAC960_V2_Device_CommandedOffline
  2127. ? "Commanded-Offline"
  2128. : PhysicalDeviceInfo->PhysicalDeviceState
  2129. == DAC960_V2_Device_Standby
  2130. ? "Standby" : "Unknown"),
  2131. PhysicalDeviceInfo->ConfigurableDeviceSize);
  2132. if (PhysicalDeviceInfo->ParityErrors == 0 &&
  2133. PhysicalDeviceInfo->SoftErrors == 0 &&
  2134. PhysicalDeviceInfo->HardErrors == 0 &&
  2135. PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
  2136. PhysicalDeviceInfo->CommandTimeouts == 0 &&
  2137. PhysicalDeviceInfo->Retries == 0 &&
  2138. PhysicalDeviceInfo->Aborts == 0 &&
  2139. PhysicalDeviceInfo->PredictedFailuresDetected == 0)
  2140. continue;
  2141. DAC960_Info(" Errors - Parity: %d, Soft: %d, "
  2142. "Hard: %d, Misc: %d\n", Controller,
  2143. PhysicalDeviceInfo->ParityErrors,
  2144. PhysicalDeviceInfo->SoftErrors,
  2145. PhysicalDeviceInfo->HardErrors,
  2146. PhysicalDeviceInfo->MiscellaneousErrors);
  2147. DAC960_Info(" Timeouts: %d, Retries: %d, "
  2148. "Aborts: %d, Predicted: %d\n", Controller,
  2149. PhysicalDeviceInfo->CommandTimeouts,
  2150. PhysicalDeviceInfo->Retries,
  2151. PhysicalDeviceInfo->Aborts,
  2152. PhysicalDeviceInfo->PredictedFailuresDetected);
  2153. }
  2154. DAC960_Info(" Logical Drives:\n", Controller);
  2155. for (LogicalDriveNumber = 0;
  2156. LogicalDriveNumber < DAC960_MaxLogicalDrives;
  2157. LogicalDriveNumber++)
  2158. {
  2159. DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
  2160. Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
  2161. unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
  2162. "Read Cache Enabled",
  2163. "Read Ahead Enabled",
  2164. "Intelligent Read Ahead Enabled",
  2165. "-", "-", "-", "-" };
  2166. unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
  2167. "Logical Device Read Only",
  2168. "Write Cache Enabled",
  2169. "Intelligent Write Cache Enabled",
  2170. "-", "-", "-", "-" };
  2171. unsigned char *GeometryTranslation;
  2172. if (LogicalDeviceInfo == NULL) continue;
  2173. switch (LogicalDeviceInfo->DriveGeometry)
  2174. {
  2175. case DAC960_V2_Geometry_128_32:
  2176. GeometryTranslation = "128/32";
  2177. break;
  2178. case DAC960_V2_Geometry_255_63:
  2179. GeometryTranslation = "255/63";
  2180. break;
  2181. default:
  2182. GeometryTranslation = "Invalid";
  2183. DAC960_Error("Illegal Logical Device Geometry %d\n",
  2184. Controller, LogicalDeviceInfo->DriveGeometry);
  2185. break;
  2186. }
  2187. DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
  2188. Controller, Controller->ControllerNumber, LogicalDriveNumber,
  2189. LogicalDeviceInfo->RAIDLevel,
  2190. (LogicalDeviceInfo->LogicalDeviceState
  2191. == DAC960_V2_LogicalDevice_Online
  2192. ? "Online"
  2193. : LogicalDeviceInfo->LogicalDeviceState
  2194. == DAC960_V2_LogicalDevice_Critical
  2195. ? "Critical" : "Offline"),
  2196. LogicalDeviceInfo->ConfigurableDeviceSize);
  2197. DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
  2198. Controller,
  2199. (LogicalDeviceInfo->LogicalDeviceControl
  2200. .LogicalDeviceInitialized
  2201. ? "Initialized" : "Uninitialized"),
  2202. GeometryTranslation);
  2203. if (LogicalDeviceInfo->StripeSize == 0)
  2204. {
  2205. if (LogicalDeviceInfo->CacheLineSize == 0)
  2206. DAC960_Info(" Stripe Size: N/A, "
  2207. "Segment Size: N/A\n", Controller);
  2208. else
  2209. DAC960_Info(" Stripe Size: N/A, "
  2210. "Segment Size: %dKB\n", Controller,
  2211. 1 << (LogicalDeviceInfo->CacheLineSize - 2));
  2212. }
  2213. else
  2214. {
  2215. if (LogicalDeviceInfo->CacheLineSize == 0)
  2216. DAC960_Info(" Stripe Size: %dKB, "
  2217. "Segment Size: N/A\n", Controller,
  2218. 1 << (LogicalDeviceInfo->StripeSize - 2));
  2219. else
  2220. DAC960_Info(" Stripe Size: %dKB, "
  2221. "Segment Size: %dKB\n", Controller,
  2222. 1 << (LogicalDeviceInfo->StripeSize - 2),
  2223. 1 << (LogicalDeviceInfo->CacheLineSize - 2));
  2224. }
  2225. DAC960_Info(" %s, %s\n", Controller,
  2226. ReadCacheStatus[
  2227. LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
  2228. WriteCacheStatus[
  2229. LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
  2230. if (LogicalDeviceInfo->SoftErrors > 0 ||
  2231. LogicalDeviceInfo->CommandsFailed > 0 ||
  2232. LogicalDeviceInfo->DeferredWriteErrors)
  2233. DAC960_Info(" Errors - Soft: %d, Failed: %d, "
  2234. "Deferred Write: %d\n", Controller,
  2235. LogicalDeviceInfo->SoftErrors,
  2236. LogicalDeviceInfo->CommandsFailed,
  2237. LogicalDeviceInfo->DeferredWriteErrors);
  2238. }
  2239. return true;
  2240. }
  2241. /*
  2242. DAC960_RegisterBlockDevice registers the Block Device structures
  2243. associated with Controller.
  2244. */
  2245. static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
  2246. {
  2247. int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
  2248. int n;
  2249. /*
  2250. Register the Block Device Major Number for this DAC960 Controller.
  2251. */
  2252. if (register_blkdev(MajorNumber, "dac960") < 0)
  2253. return false;
  2254. for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
  2255. struct gendisk *disk = Controller->disks[n];
  2256. struct request_queue *RequestQueue;
  2257. /* for now, let all request queues share controller's lock */
  2258. RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
  2259. if (!RequestQueue) {
  2260. printk("DAC960: failure to allocate request queue\n");
  2261. continue;
  2262. }
  2263. Controller->RequestQueue[n] = RequestQueue;
  2264. blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
  2265. RequestQueue->queuedata = Controller;
  2266. blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit);
  2267. blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit);
  2268. blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
  2269. disk->queue = RequestQueue;
  2270. sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
  2271. sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n);
  2272. disk->major = MajorNumber;
  2273. disk->first_minor = n << DAC960_MaxPartitionsBits;
  2274. disk->fops = &DAC960_BlockDeviceOperations;
  2275. }
  2276. /*
  2277. Indicate the Block Device Registration completed successfully,
  2278. */
  2279. return true;
  2280. }
  2281. /*
  2282. DAC960_UnregisterBlockDevice unregisters the Block Device structures
  2283. associated with Controller.
  2284. */
  2285. static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
  2286. {
  2287. int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
  2288. int disk;
  2289. /* does order matter when deleting gendisk and cleanup in request queue? */
  2290. for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
  2291. del_gendisk(Controller->disks[disk]);
  2292. blk_cleanup_queue(Controller->RequestQueue[disk]);
  2293. Controller->RequestQueue[disk] = NULL;
  2294. }
  2295. /*
  2296. Unregister the Block Device Major Number for this DAC960 Controller.
  2297. */
  2298. unregister_blkdev(MajorNumber, "dac960");
  2299. }
  2300. /*
  2301. DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
  2302. Information Partition Sector Counts and Block Sizes.
  2303. */
  2304. static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
  2305. {
  2306. int disk;
  2307. for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
  2308. set_capacity(Controller->disks[disk], disk_size(Controller, disk));
  2309. }
  2310. /*
  2311. DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
  2312. the Error Status Register when the driver performs the BIOS handshaking.
  2313. It returns true for fatal errors and false otherwise.
  2314. */
  2315. static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
  2316. unsigned char ErrorStatus,
  2317. unsigned char Parameter0,
  2318. unsigned char Parameter1)
  2319. {
  2320. switch (ErrorStatus)
  2321. {
  2322. case 0x00:
  2323. DAC960_Notice("Physical Device %d:%d Not Responding\n",
  2324. Controller, Parameter1, Parameter0);
  2325. break;
  2326. case 0x08:
  2327. if (Controller->DriveSpinUpMessageDisplayed) break;
  2328. DAC960_Notice("Spinning Up Drives\n", Controller);
  2329. Controller->DriveSpinUpMessageDisplayed = true;
  2330. break;
  2331. case 0x30:
  2332. DAC960_Notice("Configuration Checksum Error\n", Controller);
  2333. break;
  2334. case 0x60:
  2335. DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
  2336. break;
  2337. case 0x70:
  2338. DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
  2339. break;
  2340. case 0x90:
  2341. DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
  2342. Controller, Parameter1, Parameter0);
  2343. break;
  2344. case 0xA0:
  2345. DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
  2346. break;
  2347. case 0xB0:
  2348. DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
  2349. break;
  2350. case 0xD0:
  2351. DAC960_Notice("New Controller Configuration Found\n", Controller);
  2352. break;
  2353. case 0xF0:
  2354. DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
  2355. return true;
  2356. default:
  2357. DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
  2358. Controller, ErrorStatus);
  2359. return true;
  2360. }
  2361. return false;
  2362. }
  2363. /*
  2364. * DAC960_DetectCleanup releases the resources that were allocated
  2365. * during DAC960_DetectController(). DAC960_DetectController can
  2366. * has several internal failure points, so not ALL resources may
  2367. * have been allocated. It's important to free only
  2368. * resources that HAVE been allocated. The code below always
  2369. * tests that the resource has been allocated before attempting to
  2370. * free it.
  2371. */
  2372. static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
  2373. {
  2374. int i;
  2375. /* Free the memory mailbox, status, and related structures */
  2376. free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
  2377. if (Controller->MemoryMappedAddress) {
  2378. switch(Controller->HardwareType)
  2379. {
  2380. case DAC960_GEM_Controller:
  2381. DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
  2382. break;
  2383. case DAC960_BA_Controller:
  2384. DAC960_BA_DisableInterrupts(Controller->BaseAddress);
  2385. break;
  2386. case DAC960_LP_Controller:
  2387. DAC960_LP_DisableInterrupts(Controller->BaseAddress);
  2388. break;
  2389. case DAC960_LA_Controller:
  2390. DAC960_LA_DisableInterrupts(Controller->BaseAddress);
  2391. break;
  2392. case DAC960_PG_Controller:
  2393. DAC960_PG_DisableInterrupts(Controller->BaseAddress);
  2394. break;
  2395. case DAC960_PD_Controller:
  2396. DAC960_PD_DisableInterrupts(Controller->BaseAddress);
  2397. break;
  2398. case DAC960_P_Controller:
  2399. DAC960_PD_DisableInterrupts(Controller->BaseAddress);
  2400. break;
  2401. }
  2402. iounmap(Controller->MemoryMappedAddress);
  2403. }
  2404. if (Controller->IRQ_Channel)
  2405. free_irq(Controller->IRQ_Channel, Controller);
  2406. if (Controller->IO_Address)
  2407. release_region(Controller->IO_Address, 0x80);
  2408. pci_disable_device(Controller->PCIDevice);
  2409. for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
  2410. put_disk(Controller->disks[i]);
  2411. DAC960_Controllers[Controller->ControllerNumber] = NULL;
  2412. kfree(Controller);
  2413. }
  2414. /*
  2415. DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
  2416. PCI RAID Controllers by interrogating the PCI Configuration Space for
  2417. Controller Type.
  2418. */
  2419. static DAC960_Controller_T *
  2420. DAC960_DetectController(struct pci_dev *PCI_Device,
  2421. const struct pci_device_id *entry)
  2422. {
  2423. struct DAC960_privdata *privdata =
  2424. (struct DAC960_privdata *)entry->driver_data;
  2425. irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) =
  2426. privdata->InterruptHandler;
  2427. unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
  2428. DAC960_Controller_T *Controller = NULL;
  2429. unsigned char DeviceFunction = PCI_Device->devfn;
  2430. unsigned char ErrorStatus, Parameter0, Parameter1;
  2431. unsigned int IRQ_Channel;
  2432. void __iomem *BaseAddress;
  2433. int i;
  2434. Controller = (DAC960_Controller_T *)
  2435. kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
  2436. if (Controller == NULL) {
  2437. DAC960_Error("Unable to allocate Controller structure for "
  2438. "Controller at\n", NULL);
  2439. return NULL;
  2440. }
  2441. memset(Controller, 0, sizeof(DAC960_Controller_T));
  2442. Controller->ControllerNumber = DAC960_ControllerCount;
  2443. DAC960_Controllers[DAC960_ControllerCount++] = Controller;
  2444. Controller->Bus = PCI_Device->bus->number;
  2445. Controller->FirmwareType = privdata->FirmwareType;
  2446. Controller->HardwareType = privdata->HardwareType;
  2447. Controller->Device = DeviceFunction >> 3;
  2448. Controller->Function = DeviceFunction & 0x7;
  2449. Controller->PCIDevice = PCI_Device;
  2450. strcpy(Controller->FullModelName, "DAC960");
  2451. if (pci_enable_device(PCI_Device))
  2452. goto Failure;
  2453. switch (Controller->HardwareType)
  2454. {
  2455. case DAC960_GEM_Controller:
  2456. Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  2457. break;
  2458. case DAC960_BA_Controller:
  2459. Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  2460. break;
  2461. case DAC960_LP_Controller:
  2462. Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  2463. break;
  2464. case DAC960_LA_Controller:
  2465. Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  2466. break;
  2467. case DAC960_PG_Controller:
  2468. Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
  2469. break;
  2470. case DAC960_PD_Controller:
  2471. Controller->IO_Address = pci_resource_start(PCI_Device, 0);
  2472. Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
  2473. break;
  2474. case DAC960_P_Controller:
  2475. Controller->IO_Address = pci_resource_start(PCI_Device, 0);
  2476. Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
  2477. break;
  2478. }
  2479. pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
  2480. for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
  2481. Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
  2482. if (!Controller->disks[i])
  2483. goto Failure;
  2484. Controller->disks[i]->private_data = (void *)((long)i);
  2485. }
  2486. init_waitqueue_head(&Controller->CommandWaitQueue);
  2487. init_waitqueue_head(&Controller->HealthStatusWaitQueue);
  2488. spin_lock_init(&Controller->queue_lock);
  2489. DAC960_AnnounceDriver(Controller);
  2490. /*
  2491. Map the Controller Register Window.
  2492. */
  2493. if (MemoryWindowSize < PAGE_SIZE)
  2494. MemoryWindowSize = PAGE_SIZE;
  2495. Controller->MemoryMappedAddress =
  2496. ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
  2497. Controller->BaseAddress =
  2498. Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
  2499. if (Controller->MemoryMappedAddress == NULL)
  2500. {
  2501. DAC960_Error("Unable to map Controller Register Window for "
  2502. "Controller at\n", Controller);
  2503. goto Failure;
  2504. }
  2505. BaseAddress = Controller->BaseAddress;
  2506. switch (Controller->HardwareType)
  2507. {
  2508. case DAC960_GEM_Controller:
  2509. DAC960_GEM_DisableInterrupts(BaseAddress);
  2510. DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
  2511. udelay(1000);
  2512. while (DAC960_GEM_InitializationInProgressP(BaseAddress))
  2513. {
  2514. if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2515. &Parameter0, &Parameter1) &&
  2516. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2517. Parameter0, Parameter1))
  2518. goto Failure;
  2519. udelay(10);
  2520. }
  2521. if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  2522. {
  2523. DAC960_Error("Unable to Enable Memory Mailbox Interface "
  2524. "for Controller at\n", Controller);
  2525. goto Failure;
  2526. }
  2527. DAC960_GEM_EnableInterrupts(BaseAddress);
  2528. Controller->QueueCommand = DAC960_GEM_QueueCommand;
  2529. Controller->ReadControllerConfiguration =
  2530. DAC960_V2_ReadControllerConfiguration;
  2531. Controller->ReadDeviceConfiguration =
  2532. DAC960_V2_ReadDeviceConfiguration;
  2533. Controller->ReportDeviceConfiguration =
  2534. DAC960_V2_ReportDeviceConfiguration;
  2535. Controller->QueueReadWriteCommand =
  2536. DAC960_V2_QueueReadWriteCommand;
  2537. break;
  2538. case DAC960_BA_Controller:
  2539. DAC960_BA_DisableInterrupts(BaseAddress);
  2540. DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
  2541. udelay(1000);
  2542. while (DAC960_BA_InitializationInProgressP(BaseAddress))
  2543. {
  2544. if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2545. &Parameter0, &Parameter1) &&
  2546. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2547. Parameter0, Parameter1))
  2548. goto Failure;
  2549. udelay(10);
  2550. }
  2551. if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  2552. {
  2553. DAC960_Error("Unable to Enable Memory Mailbox Interface "
  2554. "for Controller at\n", Controller);
  2555. goto Failure;
  2556. }
  2557. DAC960_BA_EnableInterrupts(BaseAddress);
  2558. Controller->QueueCommand = DAC960_BA_QueueCommand;
  2559. Controller->ReadControllerConfiguration =
  2560. DAC960_V2_ReadControllerConfiguration;
  2561. Controller->ReadDeviceConfiguration =
  2562. DAC960_V2_ReadDeviceConfiguration;
  2563. Controller->ReportDeviceConfiguration =
  2564. DAC960_V2_ReportDeviceConfiguration;
  2565. Controller->QueueReadWriteCommand =
  2566. DAC960_V2_QueueReadWriteCommand;
  2567. break;
  2568. case DAC960_LP_Controller:
  2569. DAC960_LP_DisableInterrupts(BaseAddress);
  2570. DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
  2571. udelay(1000);
  2572. while (DAC960_LP_InitializationInProgressP(BaseAddress))
  2573. {
  2574. if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2575. &Parameter0, &Parameter1) &&
  2576. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2577. Parameter0, Parameter1))
  2578. goto Failure;
  2579. udelay(10);
  2580. }
  2581. if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
  2582. {
  2583. DAC960_Error("Unable to Enable Memory Mailbox Interface "
  2584. "for Controller at\n", Controller);
  2585. goto Failure;
  2586. }
  2587. DAC960_LP_EnableInterrupts(BaseAddress);
  2588. Controller->QueueCommand = DAC960_LP_QueueCommand;
  2589. Controller->ReadControllerConfiguration =
  2590. DAC960_V2_ReadControllerConfiguration;
  2591. Controller->ReadDeviceConfiguration =
  2592. DAC960_V2_ReadDeviceConfiguration;
  2593. Controller->ReportDeviceConfiguration =
  2594. DAC960_V2_ReportDeviceConfiguration;
  2595. Controller->QueueReadWriteCommand =
  2596. DAC960_V2_QueueReadWriteCommand;
  2597. break;
  2598. case DAC960_LA_Controller:
  2599. DAC960_LA_DisableInterrupts(BaseAddress);
  2600. DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
  2601. udelay(1000);
  2602. while (DAC960_LA_InitializationInProgressP(BaseAddress))
  2603. {
  2604. if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2605. &Parameter0, &Parameter1) &&
  2606. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2607. Parameter0, Parameter1))
  2608. goto Failure;
  2609. udelay(10);
  2610. }
  2611. if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  2612. {
  2613. DAC960_Error("Unable to Enable Memory Mailbox Interface "
  2614. "for Controller at\n", Controller);
  2615. goto Failure;
  2616. }
  2617. DAC960_LA_EnableInterrupts(BaseAddress);
  2618. if (Controller->V1.DualModeMemoryMailboxInterface)
  2619. Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
  2620. else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
  2621. Controller->ReadControllerConfiguration =
  2622. DAC960_V1_ReadControllerConfiguration;
  2623. Controller->ReadDeviceConfiguration =
  2624. DAC960_V1_ReadDeviceConfiguration;
  2625. Controller->ReportDeviceConfiguration =
  2626. DAC960_V1_ReportDeviceConfiguration;
  2627. Controller->QueueReadWriteCommand =
  2628. DAC960_V1_QueueReadWriteCommand;
  2629. break;
  2630. case DAC960_PG_Controller:
  2631. DAC960_PG_DisableInterrupts(BaseAddress);
  2632. DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
  2633. udelay(1000);
  2634. while (DAC960_PG_InitializationInProgressP(BaseAddress))
  2635. {
  2636. if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2637. &Parameter0, &Parameter1) &&
  2638. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2639. Parameter0, Parameter1))
  2640. goto Failure;
  2641. udelay(10);
  2642. }
  2643. if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  2644. {
  2645. DAC960_Error("Unable to Enable Memory Mailbox Interface "
  2646. "for Controller at\n", Controller);
  2647. goto Failure;
  2648. }
  2649. DAC960_PG_EnableInterrupts(BaseAddress);
  2650. if (Controller->V1.DualModeMemoryMailboxInterface)
  2651. Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
  2652. else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
  2653. Controller->ReadControllerConfiguration =
  2654. DAC960_V1_ReadControllerConfiguration;
  2655. Controller->ReadDeviceConfiguration =
  2656. DAC960_V1_ReadDeviceConfiguration;
  2657. Controller->ReportDeviceConfiguration =
  2658. DAC960_V1_ReportDeviceConfiguration;
  2659. Controller->QueueReadWriteCommand =
  2660. DAC960_V1_QueueReadWriteCommand;
  2661. break;
  2662. case DAC960_PD_Controller:
  2663. if (!request_region(Controller->IO_Address, 0x80,
  2664. Controller->FullModelName)) {
  2665. DAC960_Error("IO port 0x%d busy for Controller at\n",
  2666. Controller, Controller->IO_Address);
  2667. goto Failure;
  2668. }
  2669. DAC960_PD_DisableInterrupts(BaseAddress);
  2670. DAC960_PD_AcknowledgeStatus(BaseAddress);
  2671. udelay(1000);
  2672. while (DAC960_PD_InitializationInProgressP(BaseAddress))
  2673. {
  2674. if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2675. &Parameter0, &Parameter1) &&
  2676. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2677. Parameter0, Parameter1))
  2678. goto Failure;
  2679. udelay(10);
  2680. }
  2681. if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  2682. {
  2683. DAC960_Error("Unable to allocate DMA mapped memory "
  2684. "for Controller at\n", Controller);
  2685. goto Failure;
  2686. }
  2687. DAC960_PD_EnableInterrupts(BaseAddress);
  2688. Controller->QueueCommand = DAC960_PD_QueueCommand;
  2689. Controller->ReadControllerConfiguration =
  2690. DAC960_V1_ReadControllerConfiguration;
  2691. Controller->ReadDeviceConfiguration =
  2692. DAC960_V1_ReadDeviceConfiguration;
  2693. Controller->ReportDeviceConfiguration =
  2694. DAC960_V1_ReportDeviceConfiguration;
  2695. Controller->QueueReadWriteCommand =
  2696. DAC960_V1_QueueReadWriteCommand;
  2697. break;
  2698. case DAC960_P_Controller:
  2699. if (!request_region(Controller->IO_Address, 0x80,
  2700. Controller->FullModelName)){
  2701. DAC960_Error("IO port 0x%d busy for Controller at\n",
  2702. Controller, Controller->IO_Address);
  2703. goto Failure;
  2704. }
  2705. DAC960_PD_DisableInterrupts(BaseAddress);
  2706. DAC960_PD_AcknowledgeStatus(BaseAddress);
  2707. udelay(1000);
  2708. while (DAC960_PD_InitializationInProgressP(BaseAddress))
  2709. {
  2710. if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
  2711. &Parameter0, &Parameter1) &&
  2712. DAC960_ReportErrorStatus(Controller, ErrorStatus,
  2713. Parameter0, Parameter1))
  2714. goto Failure;
  2715. udelay(10);
  2716. }
  2717. if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
  2718. {
  2719. DAC960_Error("Unable to allocate DMA mapped memory"
  2720. "for Controller at\n", Controller);
  2721. goto Failure;
  2722. }
  2723. DAC960_PD_EnableInterrupts(BaseAddress);
  2724. Controller->QueueCommand = DAC960_P_QueueCommand;
  2725. Controller->ReadControllerConfiguration =
  2726. DAC960_V1_ReadControllerConfiguration;
  2727. Controller->ReadDeviceConfiguration =
  2728. DAC960_V1_ReadDeviceConfiguration;
  2729. Controller->ReportDeviceConfiguration =
  2730. DAC960_V1_ReportDeviceConfiguration;
  2731. Controller->QueueReadWriteCommand =
  2732. DAC960_V1_QueueReadWriteCommand;
  2733. break;
  2734. }
  2735. /*
  2736. Acquire shared access to the IRQ Channel.
  2737. */
  2738. IRQ_Channel = PCI_Device->irq;
  2739. if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
  2740. Controller->FullModelName, Controller) < 0)
  2741. {
  2742. DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
  2743. Controller, Controller->IRQ_Channel);
  2744. goto Failure;
  2745. }
  2746. Controller->IRQ_Channel = IRQ_Channel;
  2747. Controller->InitialCommand.CommandIdentifier = 1;
  2748. Controller->InitialCommand.Controller = Controller;
  2749. Controller->Commands[0] = &Controller->InitialCommand;
  2750. Controller->FreeCommands = &Controller->InitialCommand;
  2751. return Controller;
  2752. Failure:
  2753. if (Controller->IO_Address == 0)
  2754. DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
  2755. "PCI Address 0x%X\n", Controller,
  2756. Controller->Bus, Controller->Device,
  2757. Controller->Function, Controller->PCI_Address);
  2758. else
  2759. DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
  2760. "0x%X PCI Address 0x%X\n", Controller,
  2761. Controller->Bus, Controller->Device,
  2762. Controller->Function, Controller->IO_Address,
  2763. Controller->PCI_Address);
  2764. DAC960_DetectCleanup(Controller);
  2765. DAC960_ControllerCount--;
  2766. return NULL;
  2767. }
  2768. /*
  2769. DAC960_InitializeController initializes Controller.
  2770. */
  2771. static boolean
  2772. DAC960_InitializeController(DAC960_Controller_T *Controller)
  2773. {
  2774. if (DAC960_ReadControllerConfiguration(Controller) &&
  2775. DAC960_ReportControllerConfiguration(Controller) &&
  2776. DAC960_CreateAuxiliaryStructures(Controller) &&
  2777. DAC960_ReadDeviceConfiguration(Controller) &&
  2778. DAC960_ReportDeviceConfiguration(Controller) &&
  2779. DAC960_RegisterBlockDevice(Controller))
  2780. {
  2781. /*
  2782. Initialize the Monitoring Timer.
  2783. */
  2784. init_timer(&Controller->MonitoringTimer);
  2785. Controller->MonitoringTimer.expires =
  2786. jiffies + DAC960_MonitoringTimerInterval;
  2787. Controller->MonitoringTimer.data = (unsigned long) Controller;
  2788. Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
  2789. add_timer(&Controller->MonitoringTimer);
  2790. Controller->ControllerInitialized = true;
  2791. return true;
  2792. }
  2793. return false;
  2794. }
  2795. /*
  2796. DAC960_FinalizeController finalizes Controller.
  2797. */
  2798. static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
  2799. {
  2800. if (Controller->ControllerInitialized)
  2801. {
  2802. unsigned long flags;
  2803. /*
  2804. * Acquiring and releasing lock here eliminates
  2805. * a very low probability race.
  2806. *
  2807. * The code below allocates controller command structures
  2808. * from the free list without holding the controller lock.
  2809. * This is safe assuming there is no other activity on
  2810. * the controller at the time.
  2811. *
  2812. * But, there might be a monitoring command still
  2813. * in progress. Setting the Shutdown flag while holding
  2814. * the lock ensures that there is no monitoring command
  2815. * in the interrupt handler currently, and any monitoring
  2816. * commands that complete from this time on will NOT return
  2817. * their command structure to the free list.
  2818. */
  2819. spin_lock_irqsave(&Controller->queue_lock, flags);
  2820. Controller->ShutdownMonitoringTimer = 1;
  2821. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  2822. del_timer_sync(&Controller->MonitoringTimer);
  2823. if (Controller->FirmwareType == DAC960_V1_Controller)
  2824. {
  2825. DAC960_Notice("Flushing Cache...", Controller);
  2826. DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
  2827. DAC960_Notice("done\n", Controller);
  2828. if (Controller->HardwareType == DAC960_PD_Controller)
  2829. release_region(Controller->IO_Address, 0x80);
  2830. }
  2831. else
  2832. {
  2833. DAC960_Notice("Flushing Cache...", Controller);
  2834. DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
  2835. DAC960_V2_RAID_Controller);
  2836. DAC960_Notice("done\n", Controller);
  2837. }
  2838. }
  2839. DAC960_UnregisterBlockDevice(Controller);
  2840. DAC960_DestroyAuxiliaryStructures(Controller);
  2841. DAC960_DestroyProcEntries(Controller);
  2842. DAC960_DetectCleanup(Controller);
  2843. }
  2844. /*
  2845. DAC960_Probe verifies controller's existence and
  2846. initializes the DAC960 Driver for that controller.
  2847. */
  2848. static int
  2849. DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
  2850. {
  2851. int disk;
  2852. DAC960_Controller_T *Controller;
  2853. if (DAC960_ControllerCount == DAC960_MaxControllers)
  2854. {
  2855. DAC960_Error("More than %d DAC960 Controllers detected - "
  2856. "ignoring from Controller at\n",
  2857. NULL, DAC960_MaxControllers);
  2858. return -ENODEV;
  2859. }
  2860. Controller = DAC960_DetectController(dev, entry);
  2861. if (!Controller)
  2862. return -ENODEV;
  2863. if (!DAC960_InitializeController(Controller)) {
  2864. DAC960_FinalizeController(Controller);
  2865. return -ENODEV;
  2866. }
  2867. for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
  2868. set_capacity(Controller->disks[disk], disk_size(Controller, disk));
  2869. add_disk(Controller->disks[disk]);
  2870. }
  2871. DAC960_CreateProcEntries(Controller);
  2872. return 0;
  2873. }
  2874. /*
  2875. DAC960_Finalize finalizes the DAC960 Driver.
  2876. */
  2877. static void DAC960_Remove(struct pci_dev *PCI_Device)
  2878. {
  2879. int Controller_Number = (long)pci_get_drvdata(PCI_Device);
  2880. DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
  2881. if (Controller != NULL)
  2882. DAC960_FinalizeController(Controller);
  2883. }
  2884. /*
  2885. DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
  2886. DAC960 V1 Firmware Controllers.
  2887. */
  2888. static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
  2889. {
  2890. DAC960_Controller_T *Controller = Command->Controller;
  2891. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  2892. DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
  2893. Command->V1.ScatterGatherList;
  2894. struct scatterlist *ScatterList = Command->V1.ScatterList;
  2895. DAC960_V1_ClearCommand(Command);
  2896. if (Command->SegmentCount == 1)
  2897. {
  2898. if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  2899. CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
  2900. else
  2901. CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
  2902. CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
  2903. CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
  2904. CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
  2905. CommandMailbox->Type5.BusAddress =
  2906. (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
  2907. }
  2908. else
  2909. {
  2910. int i;
  2911. if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  2912. CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
  2913. else
  2914. CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
  2915. CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
  2916. CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
  2917. CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
  2918. CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
  2919. CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
  2920. for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
  2921. ScatterGatherList->SegmentDataPointer =
  2922. (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
  2923. ScatterGatherList->SegmentByteCount =
  2924. (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
  2925. }
  2926. }
  2927. DAC960_QueueCommand(Command);
  2928. }
  2929. /*
  2930. DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
  2931. DAC960 V2 Firmware Controllers.
  2932. */
  2933. static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
  2934. {
  2935. DAC960_Controller_T *Controller = Command->Controller;
  2936. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  2937. struct scatterlist *ScatterList = Command->V2.ScatterList;
  2938. DAC960_V2_ClearCommand(Command);
  2939. CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
  2940. CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
  2941. (Command->DmaDirection == PCI_DMA_FROMDEVICE);
  2942. CommandMailbox->SCSI_10.DataTransferSize =
  2943. Command->BlockCount << DAC960_BlockSizeBits;
  2944. CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
  2945. CommandMailbox->SCSI_10.PhysicalDevice =
  2946. Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
  2947. CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
  2948. CommandMailbox->SCSI_10.CDBLength = 10;
  2949. CommandMailbox->SCSI_10.SCSI_CDB[0] =
  2950. (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
  2951. CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
  2952. CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
  2953. CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
  2954. CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
  2955. CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
  2956. CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
  2957. if (Command->SegmentCount == 1)
  2958. {
  2959. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  2960. .ScatterGatherSegments[0]
  2961. .SegmentDataPointer =
  2962. (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
  2963. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  2964. .ScatterGatherSegments[0]
  2965. .SegmentByteCount =
  2966. CommandMailbox->SCSI_10.DataTransferSize;
  2967. }
  2968. else
  2969. {
  2970. DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
  2971. int i;
  2972. if (Command->SegmentCount > 2)
  2973. {
  2974. ScatterGatherList = Command->V2.ScatterGatherList;
  2975. CommandMailbox->SCSI_10.CommandControlBits
  2976. .AdditionalScatterGatherListMemory = true;
  2977. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  2978. .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
  2979. CommandMailbox->SCSI_10.DataTransferMemoryAddress
  2980. .ExtendedScatterGather.ScatterGatherList0Address =
  2981. Command->V2.ScatterGatherListDMA;
  2982. }
  2983. else
  2984. ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
  2985. .ScatterGatherSegments;
  2986. for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
  2987. ScatterGatherList->SegmentDataPointer =
  2988. (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
  2989. ScatterGatherList->SegmentByteCount =
  2990. (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
  2991. }
  2992. }
  2993. DAC960_QueueCommand(Command);
  2994. }
  2995. static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
  2996. {
  2997. struct request *Request;
  2998. DAC960_Command_T *Command;
  2999. while(1) {
  3000. Request = elv_next_request(req_q);
  3001. if (!Request)
  3002. return 1;
  3003. Command = DAC960_AllocateCommand(Controller);
  3004. if (Command == NULL)
  3005. return 0;
  3006. if (rq_data_dir(Request) == READ) {
  3007. Command->DmaDirection = PCI_DMA_FROMDEVICE;
  3008. Command->CommandType = DAC960_ReadCommand;
  3009. } else {
  3010. Command->DmaDirection = PCI_DMA_TODEVICE;
  3011. Command->CommandType = DAC960_WriteCommand;
  3012. }
  3013. Command->Completion = Request->waiting;
  3014. Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
  3015. Command->BlockNumber = Request->sector;
  3016. Command->BlockCount = Request->nr_sectors;
  3017. Command->Request = Request;
  3018. blkdev_dequeue_request(Request);
  3019. Command->SegmentCount = blk_rq_map_sg(req_q,
  3020. Command->Request, Command->cmd_sglist);
  3021. /* pci_map_sg MAY change the value of SegCount */
  3022. Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
  3023. Command->SegmentCount, Command->DmaDirection);
  3024. DAC960_QueueReadWriteCommand(Command);
  3025. }
  3026. }
  3027. /*
  3028. DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
  3029. I/O Request Queue and queues it to the Controller. WaitForCommand is true if
  3030. this function should wait for a Command to become available if necessary.
  3031. This function returns true if an I/O Request was queued and false otherwise.
  3032. */
  3033. static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
  3034. {
  3035. int i;
  3036. if (!controller->ControllerInitialized)
  3037. return;
  3038. /* Do this better later! */
  3039. for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
  3040. struct request_queue *req_q = controller->RequestQueue[i];
  3041. if (req_q == NULL)
  3042. continue;
  3043. if (!DAC960_process_queue(controller, req_q)) {
  3044. controller->req_q_index = i;
  3045. return;
  3046. }
  3047. }
  3048. if (controller->req_q_index == 0)
  3049. return;
  3050. for (i = 0; i < controller->req_q_index; i++) {
  3051. struct request_queue *req_q = controller->RequestQueue[i];
  3052. if (req_q == NULL)
  3053. continue;
  3054. if (!DAC960_process_queue(controller, req_q)) {
  3055. controller->req_q_index = i;
  3056. return;
  3057. }
  3058. }
  3059. }
  3060. /*
  3061. DAC960_queue_partial_rw extracts one bio from the request already
  3062. associated with argument command, and construct a new command block to retry I/O
  3063. only on that bio. Queue that command to the controller.
  3064. This function re-uses a previously-allocated Command,
  3065. there is no failure mode from trying to allocate a command.
  3066. */
  3067. static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
  3068. {
  3069. DAC960_Controller_T *Controller = Command->Controller;
  3070. struct request *Request = Command->Request;
  3071. struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
  3072. if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
  3073. Command->CommandType = DAC960_ReadRetryCommand;
  3074. else
  3075. Command->CommandType = DAC960_WriteRetryCommand;
  3076. /*
  3077. * We could be more efficient with these mapping requests
  3078. * and map only the portions that we need. But since this
  3079. * code should almost never be called, just go with a
  3080. * simple coding.
  3081. */
  3082. (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
  3083. (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
  3084. /*
  3085. * Resubmitting the request sector at a time is really tedious.
  3086. * But, this should almost never happen. So, we're willing to pay
  3087. * this price so that in the end, as much of the transfer is completed
  3088. * successfully as possible.
  3089. */
  3090. Command->SegmentCount = 1;
  3091. Command->BlockNumber = Request->sector;
  3092. Command->BlockCount = 1;
  3093. DAC960_QueueReadWriteCommand(Command);
  3094. return;
  3095. }
  3096. /*
  3097. DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
  3098. */
  3099. static void DAC960_RequestFunction(struct request_queue *RequestQueue)
  3100. {
  3101. DAC960_ProcessRequest(RequestQueue->queuedata);
  3102. }
  3103. /*
  3104. DAC960_ProcessCompletedBuffer performs completion processing for an
  3105. individual Buffer.
  3106. */
  3107. static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
  3108. boolean SuccessfulIO)
  3109. {
  3110. struct request *Request = Command->Request;
  3111. int UpToDate;
  3112. UpToDate = 0;
  3113. if (SuccessfulIO)
  3114. UpToDate = 1;
  3115. pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
  3116. Command->SegmentCount, Command->DmaDirection);
  3117. if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) {
  3118. end_that_request_last(Request);
  3119. if (Command->Completion) {
  3120. complete(Command->Completion);
  3121. Command->Completion = NULL;
  3122. }
  3123. return true;
  3124. }
  3125. return false;
  3126. }
  3127. /*
  3128. DAC960_V1_ReadWriteError prints an appropriate error message for Command
  3129. when an error occurs on a Read or Write operation.
  3130. */
  3131. static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
  3132. {
  3133. DAC960_Controller_T *Controller = Command->Controller;
  3134. unsigned char *CommandName = "UNKNOWN";
  3135. switch (Command->CommandType)
  3136. {
  3137. case DAC960_ReadCommand:
  3138. case DAC960_ReadRetryCommand:
  3139. CommandName = "READ";
  3140. break;
  3141. case DAC960_WriteCommand:
  3142. case DAC960_WriteRetryCommand:
  3143. CommandName = "WRITE";
  3144. break;
  3145. case DAC960_MonitoringCommand:
  3146. case DAC960_ImmediateCommand:
  3147. case DAC960_QueuedCommand:
  3148. break;
  3149. }
  3150. switch (Command->V1.CommandStatus)
  3151. {
  3152. case DAC960_V1_IrrecoverableDataError:
  3153. DAC960_Error("Irrecoverable Data Error on %s:\n",
  3154. Controller, CommandName);
  3155. break;
  3156. case DAC960_V1_LogicalDriveNonexistentOrOffline:
  3157. DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
  3158. Controller, CommandName);
  3159. break;
  3160. case DAC960_V1_AccessBeyondEndOfLogicalDrive:
  3161. DAC960_Error("Attempt to Access Beyond End of Logical Drive "
  3162. "on %s:\n", Controller, CommandName);
  3163. break;
  3164. case DAC960_V1_BadDataEncountered:
  3165. DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
  3166. break;
  3167. default:
  3168. DAC960_Error("Unexpected Error Status %04X on %s:\n",
  3169. Controller, Command->V1.CommandStatus, CommandName);
  3170. break;
  3171. }
  3172. DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
  3173. Controller, Controller->ControllerNumber,
  3174. Command->LogicalDriveNumber, Command->BlockNumber,
  3175. Command->BlockNumber + Command->BlockCount - 1);
  3176. }
  3177. /*
  3178. DAC960_V1_ProcessCompletedCommand performs completion processing for Command
  3179. for DAC960 V1 Firmware Controllers.
  3180. */
  3181. static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
  3182. {
  3183. DAC960_Controller_T *Controller = Command->Controller;
  3184. DAC960_CommandType_T CommandType = Command->CommandType;
  3185. DAC960_V1_CommandOpcode_T CommandOpcode =
  3186. Command->V1.CommandMailbox.Common.CommandOpcode;
  3187. DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
  3188. if (CommandType == DAC960_ReadCommand ||
  3189. CommandType == DAC960_WriteCommand)
  3190. {
  3191. #ifdef FORCE_RETRY_DEBUG
  3192. CommandStatus = DAC960_V1_IrrecoverableDataError;
  3193. #endif
  3194. if (CommandStatus == DAC960_V1_NormalCompletion) {
  3195. if (!DAC960_ProcessCompletedRequest(Command, true))
  3196. BUG();
  3197. } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
  3198. CommandStatus == DAC960_V1_BadDataEncountered)
  3199. {
  3200. /*
  3201. * break the command down into pieces and resubmit each
  3202. * piece, hoping that some of them will succeed.
  3203. */
  3204. DAC960_queue_partial_rw(Command);
  3205. return;
  3206. }
  3207. else
  3208. {
  3209. if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
  3210. DAC960_V1_ReadWriteError(Command);
  3211. if (!DAC960_ProcessCompletedRequest(Command, false))
  3212. BUG();
  3213. }
  3214. }
  3215. else if (CommandType == DAC960_ReadRetryCommand ||
  3216. CommandType == DAC960_WriteRetryCommand)
  3217. {
  3218. boolean normal_completion;
  3219. #ifdef FORCE_RETRY_FAILURE_DEBUG
  3220. static int retry_count = 1;
  3221. #endif
  3222. /*
  3223. Perform completion processing for the portion that was
  3224. retried, and submit the next portion, if any.
  3225. */
  3226. normal_completion = true;
  3227. if (CommandStatus != DAC960_V1_NormalCompletion) {
  3228. normal_completion = false;
  3229. if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
  3230. DAC960_V1_ReadWriteError(Command);
  3231. }
  3232. #ifdef FORCE_RETRY_FAILURE_DEBUG
  3233. if (!(++retry_count % 10000)) {
  3234. printk("V1 error retry failure test\n");
  3235. normal_completion = false;
  3236. DAC960_V1_ReadWriteError(Command);
  3237. }
  3238. #endif
  3239. if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
  3240. DAC960_queue_partial_rw(Command);
  3241. return;
  3242. }
  3243. }
  3244. else if (CommandType == DAC960_MonitoringCommand)
  3245. {
  3246. if (Controller->ShutdownMonitoringTimer)
  3247. return;
  3248. if (CommandOpcode == DAC960_V1_Enquiry)
  3249. {
  3250. DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
  3251. DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
  3252. unsigned int OldCriticalLogicalDriveCount =
  3253. OldEnquiry->CriticalLogicalDriveCount;
  3254. unsigned int NewCriticalLogicalDriveCount =
  3255. NewEnquiry->CriticalLogicalDriveCount;
  3256. if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
  3257. {
  3258. int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
  3259. while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
  3260. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  3261. "Now Exists\n", Controller,
  3262. LogicalDriveNumber,
  3263. Controller->ControllerNumber,
  3264. LogicalDriveNumber);
  3265. Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
  3266. DAC960_ComputeGenericDiskInfo(Controller);
  3267. }
  3268. if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
  3269. {
  3270. int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
  3271. while (++LogicalDriveNumber < Controller->LogicalDriveCount)
  3272. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  3273. "No Longer Exists\n", Controller,
  3274. LogicalDriveNumber,
  3275. Controller->ControllerNumber,
  3276. LogicalDriveNumber);
  3277. Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
  3278. DAC960_ComputeGenericDiskInfo(Controller);
  3279. }
  3280. if (NewEnquiry->StatusFlags.DeferredWriteError !=
  3281. OldEnquiry->StatusFlags.DeferredWriteError)
  3282. DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
  3283. (NewEnquiry->StatusFlags.DeferredWriteError
  3284. ? "TRUE" : "FALSE"));
  3285. if ((NewCriticalLogicalDriveCount > 0 ||
  3286. NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
  3287. (NewEnquiry->OfflineLogicalDriveCount > 0 ||
  3288. NewEnquiry->OfflineLogicalDriveCount !=
  3289. OldEnquiry->OfflineLogicalDriveCount) ||
  3290. (NewEnquiry->DeadDriveCount > 0 ||
  3291. NewEnquiry->DeadDriveCount !=
  3292. OldEnquiry->DeadDriveCount) ||
  3293. (NewEnquiry->EventLogSequenceNumber !=
  3294. OldEnquiry->EventLogSequenceNumber) ||
  3295. Controller->MonitoringTimerCount == 0 ||
  3296. (jiffies - Controller->SecondaryMonitoringTime
  3297. >= DAC960_SecondaryMonitoringInterval))
  3298. {
  3299. Controller->V1.NeedLogicalDriveInformation = true;
  3300. Controller->V1.NewEventLogSequenceNumber =
  3301. NewEnquiry->EventLogSequenceNumber;
  3302. Controller->V1.NeedErrorTableInformation = true;
  3303. Controller->V1.NeedDeviceStateInformation = true;
  3304. Controller->V1.StartDeviceStateScan = true;
  3305. Controller->V1.NeedBackgroundInitializationStatus =
  3306. Controller->V1.BackgroundInitializationStatusSupported;
  3307. Controller->SecondaryMonitoringTime = jiffies;
  3308. }
  3309. if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
  3310. NewEnquiry->RebuildFlag
  3311. == DAC960_V1_BackgroundRebuildInProgress ||
  3312. OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
  3313. OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
  3314. {
  3315. Controller->V1.NeedRebuildProgress = true;
  3316. Controller->V1.RebuildProgressFirst =
  3317. (NewEnquiry->CriticalLogicalDriveCount <
  3318. OldEnquiry->CriticalLogicalDriveCount);
  3319. }
  3320. if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
  3321. switch (NewEnquiry->RebuildFlag)
  3322. {
  3323. case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
  3324. DAC960_Progress("Consistency Check Completed Successfully\n",
  3325. Controller);
  3326. break;
  3327. case DAC960_V1_StandbyRebuildInProgress:
  3328. case DAC960_V1_BackgroundRebuildInProgress:
  3329. break;
  3330. case DAC960_V1_BackgroundCheckInProgress:
  3331. Controller->V1.NeedConsistencyCheckProgress = true;
  3332. break;
  3333. case DAC960_V1_StandbyRebuildCompletedWithError:
  3334. DAC960_Progress("Consistency Check Completed with Error\n",
  3335. Controller);
  3336. break;
  3337. case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
  3338. DAC960_Progress("Consistency Check Failed - "
  3339. "Physical Device Failed\n", Controller);
  3340. break;
  3341. case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
  3342. DAC960_Progress("Consistency Check Failed - "
  3343. "Logical Drive Failed\n", Controller);
  3344. break;
  3345. case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
  3346. DAC960_Progress("Consistency Check Failed - Other Causes\n",
  3347. Controller);
  3348. break;
  3349. case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
  3350. DAC960_Progress("Consistency Check Successfully Terminated\n",
  3351. Controller);
  3352. break;
  3353. }
  3354. else if (NewEnquiry->RebuildFlag
  3355. == DAC960_V1_BackgroundCheckInProgress)
  3356. Controller->V1.NeedConsistencyCheckProgress = true;
  3357. Controller->MonitoringAlertMode =
  3358. (NewEnquiry->CriticalLogicalDriveCount > 0 ||
  3359. NewEnquiry->OfflineLogicalDriveCount > 0 ||
  3360. NewEnquiry->DeadDriveCount > 0);
  3361. if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
  3362. {
  3363. Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
  3364. Controller->V1.RebuildFlagPending = true;
  3365. }
  3366. memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
  3367. sizeof(DAC960_V1_Enquiry_T));
  3368. }
  3369. else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
  3370. {
  3371. static char
  3372. *DAC960_EventMessages[] =
  3373. { "killed because write recovery failed",
  3374. "killed because of SCSI bus reset failure",
  3375. "killed because of double check condition",
  3376. "killed because it was removed",
  3377. "killed because of gross error on SCSI chip",
  3378. "killed because of bad tag returned from drive",
  3379. "killed because of timeout on SCSI command",
  3380. "killed because of reset SCSI command issued from system",
  3381. "killed because busy or parity error count exceeded limit",
  3382. "killed because of 'kill drive' command from system",
  3383. "killed because of selection timeout",
  3384. "killed due to SCSI phase sequence error",
  3385. "killed due to unknown status" };
  3386. DAC960_V1_EventLogEntry_T *EventLogEntry =
  3387. Controller->V1.EventLogEntry;
  3388. if (EventLogEntry->SequenceNumber ==
  3389. Controller->V1.OldEventLogSequenceNumber)
  3390. {
  3391. unsigned char SenseKey = EventLogEntry->SenseKey;
  3392. unsigned char AdditionalSenseCode =
  3393. EventLogEntry->AdditionalSenseCode;
  3394. unsigned char AdditionalSenseCodeQualifier =
  3395. EventLogEntry->AdditionalSenseCodeQualifier;
  3396. if (SenseKey == DAC960_SenseKey_VendorSpecific &&
  3397. AdditionalSenseCode == 0x80 &&
  3398. AdditionalSenseCodeQualifier <
  3399. sizeof(DAC960_EventMessages) / sizeof(char *))
  3400. DAC960_Critical("Physical Device %d:%d %s\n", Controller,
  3401. EventLogEntry->Channel,
  3402. EventLogEntry->TargetID,
  3403. DAC960_EventMessages[
  3404. AdditionalSenseCodeQualifier]);
  3405. else if (SenseKey == DAC960_SenseKey_UnitAttention &&
  3406. AdditionalSenseCode == 0x29)
  3407. {
  3408. if (Controller->MonitoringTimerCount > 0)
  3409. Controller->V1.DeviceResetCount[EventLogEntry->Channel]
  3410. [EventLogEntry->TargetID]++;
  3411. }
  3412. else if (!(SenseKey == DAC960_SenseKey_NoSense ||
  3413. (SenseKey == DAC960_SenseKey_NotReady &&
  3414. AdditionalSenseCode == 0x04 &&
  3415. (AdditionalSenseCodeQualifier == 0x01 ||
  3416. AdditionalSenseCodeQualifier == 0x02))))
  3417. {
  3418. DAC960_Critical("Physical Device %d:%d Error Log: "
  3419. "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
  3420. Controller,
  3421. EventLogEntry->Channel,
  3422. EventLogEntry->TargetID,
  3423. SenseKey,
  3424. AdditionalSenseCode,
  3425. AdditionalSenseCodeQualifier);
  3426. DAC960_Critical("Physical Device %d:%d Error Log: "
  3427. "Information = %02X%02X%02X%02X "
  3428. "%02X%02X%02X%02X\n",
  3429. Controller,
  3430. EventLogEntry->Channel,
  3431. EventLogEntry->TargetID,
  3432. EventLogEntry->Information[0],
  3433. EventLogEntry->Information[1],
  3434. EventLogEntry->Information[2],
  3435. EventLogEntry->Information[3],
  3436. EventLogEntry->CommandSpecificInformation[0],
  3437. EventLogEntry->CommandSpecificInformation[1],
  3438. EventLogEntry->CommandSpecificInformation[2],
  3439. EventLogEntry->CommandSpecificInformation[3]);
  3440. }
  3441. }
  3442. Controller->V1.OldEventLogSequenceNumber++;
  3443. }
  3444. else if (CommandOpcode == DAC960_V1_GetErrorTable)
  3445. {
  3446. DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
  3447. DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
  3448. int Channel, TargetID;
  3449. for (Channel = 0; Channel < Controller->Channels; Channel++)
  3450. for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
  3451. {
  3452. DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
  3453. &NewErrorTable->ErrorTableEntries[Channel][TargetID];
  3454. DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
  3455. &OldErrorTable->ErrorTableEntries[Channel][TargetID];
  3456. if ((NewErrorEntry->ParityErrorCount !=
  3457. OldErrorEntry->ParityErrorCount) ||
  3458. (NewErrorEntry->SoftErrorCount !=
  3459. OldErrorEntry->SoftErrorCount) ||
  3460. (NewErrorEntry->HardErrorCount !=
  3461. OldErrorEntry->HardErrorCount) ||
  3462. (NewErrorEntry->MiscErrorCount !=
  3463. OldErrorEntry->MiscErrorCount))
  3464. DAC960_Critical("Physical Device %d:%d Errors: "
  3465. "Parity = %d, Soft = %d, "
  3466. "Hard = %d, Misc = %d\n",
  3467. Controller, Channel, TargetID,
  3468. NewErrorEntry->ParityErrorCount,
  3469. NewErrorEntry->SoftErrorCount,
  3470. NewErrorEntry->HardErrorCount,
  3471. NewErrorEntry->MiscErrorCount);
  3472. }
  3473. memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
  3474. sizeof(DAC960_V1_ErrorTable_T));
  3475. }
  3476. else if (CommandOpcode == DAC960_V1_GetDeviceState)
  3477. {
  3478. DAC960_V1_DeviceState_T *OldDeviceState =
  3479. &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
  3480. [Controller->V1.DeviceStateTargetID];
  3481. DAC960_V1_DeviceState_T *NewDeviceState =
  3482. Controller->V1.NewDeviceState;
  3483. if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
  3484. DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
  3485. Controller->V1.DeviceStateChannel,
  3486. Controller->V1.DeviceStateTargetID,
  3487. (NewDeviceState->DeviceState
  3488. == DAC960_V1_Device_Dead
  3489. ? "DEAD"
  3490. : NewDeviceState->DeviceState
  3491. == DAC960_V1_Device_WriteOnly
  3492. ? "WRITE-ONLY"
  3493. : NewDeviceState->DeviceState
  3494. == DAC960_V1_Device_Online
  3495. ? "ONLINE" : "STANDBY"));
  3496. if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
  3497. NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
  3498. {
  3499. Controller->V1.NeedDeviceInquiryInformation = true;
  3500. Controller->V1.NeedDeviceSerialNumberInformation = true;
  3501. Controller->V1.DeviceResetCount
  3502. [Controller->V1.DeviceStateChannel]
  3503. [Controller->V1.DeviceStateTargetID] = 0;
  3504. }
  3505. memcpy(OldDeviceState, NewDeviceState,
  3506. sizeof(DAC960_V1_DeviceState_T));
  3507. }
  3508. else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
  3509. {
  3510. int LogicalDriveNumber;
  3511. for (LogicalDriveNumber = 0;
  3512. LogicalDriveNumber < Controller->LogicalDriveCount;
  3513. LogicalDriveNumber++)
  3514. {
  3515. DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
  3516. &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
  3517. DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
  3518. &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
  3519. if (NewLogicalDriveInformation->LogicalDriveState !=
  3520. OldLogicalDriveInformation->LogicalDriveState)
  3521. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  3522. "is now %s\n", Controller,
  3523. LogicalDriveNumber,
  3524. Controller->ControllerNumber,
  3525. LogicalDriveNumber,
  3526. (NewLogicalDriveInformation->LogicalDriveState
  3527. == DAC960_V1_LogicalDrive_Online
  3528. ? "ONLINE"
  3529. : NewLogicalDriveInformation->LogicalDriveState
  3530. == DAC960_V1_LogicalDrive_Critical
  3531. ? "CRITICAL" : "OFFLINE"));
  3532. if (NewLogicalDriveInformation->WriteBack !=
  3533. OldLogicalDriveInformation->WriteBack)
  3534. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  3535. "is now %s\n", Controller,
  3536. LogicalDriveNumber,
  3537. Controller->ControllerNumber,
  3538. LogicalDriveNumber,
  3539. (NewLogicalDriveInformation->WriteBack
  3540. ? "WRITE BACK" : "WRITE THRU"));
  3541. }
  3542. memcpy(&Controller->V1.LogicalDriveInformation,
  3543. Controller->V1.NewLogicalDriveInformation,
  3544. sizeof(DAC960_V1_LogicalDriveInformationArray_T));
  3545. }
  3546. else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
  3547. {
  3548. unsigned int LogicalDriveNumber =
  3549. Controller->V1.RebuildProgress->LogicalDriveNumber;
  3550. unsigned int LogicalDriveSize =
  3551. Controller->V1.RebuildProgress->LogicalDriveSize;
  3552. unsigned int BlocksCompleted =
  3553. LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
  3554. if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
  3555. Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
  3556. CommandStatus = DAC960_V1_RebuildSuccessful;
  3557. switch (CommandStatus)
  3558. {
  3559. case DAC960_V1_NormalCompletion:
  3560. Controller->EphemeralProgressMessage = true;
  3561. DAC960_Progress("Rebuild in Progress: "
  3562. "Logical Drive %d (/dev/rd/c%dd%d) "
  3563. "%d%% completed\n",
  3564. Controller, LogicalDriveNumber,
  3565. Controller->ControllerNumber,
  3566. LogicalDriveNumber,
  3567. (100 * (BlocksCompleted >> 7))
  3568. / (LogicalDriveSize >> 7));
  3569. Controller->EphemeralProgressMessage = false;
  3570. break;
  3571. case DAC960_V1_RebuildFailed_LogicalDriveFailure:
  3572. DAC960_Progress("Rebuild Failed due to "
  3573. "Logical Drive Failure\n", Controller);
  3574. break;
  3575. case DAC960_V1_RebuildFailed_BadBlocksOnOther:
  3576. DAC960_Progress("Rebuild Failed due to "
  3577. "Bad Blocks on Other Drives\n", Controller);
  3578. break;
  3579. case DAC960_V1_RebuildFailed_NewDriveFailed:
  3580. DAC960_Progress("Rebuild Failed due to "
  3581. "Failure of Drive Being Rebuilt\n", Controller);
  3582. break;
  3583. case DAC960_V1_NoRebuildOrCheckInProgress:
  3584. break;
  3585. case DAC960_V1_RebuildSuccessful:
  3586. DAC960_Progress("Rebuild Completed Successfully\n", Controller);
  3587. break;
  3588. case DAC960_V1_RebuildSuccessfullyTerminated:
  3589. DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
  3590. break;
  3591. }
  3592. Controller->V1.LastRebuildStatus = CommandStatus;
  3593. if (CommandType != DAC960_MonitoringCommand &&
  3594. Controller->V1.RebuildStatusPending)
  3595. {
  3596. Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
  3597. Controller->V1.RebuildStatusPending = false;
  3598. }
  3599. else if (CommandType == DAC960_MonitoringCommand &&
  3600. CommandStatus != DAC960_V1_NormalCompletion &&
  3601. CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
  3602. {
  3603. Controller->V1.PendingRebuildStatus = CommandStatus;
  3604. Controller->V1.RebuildStatusPending = true;
  3605. }
  3606. }
  3607. else if (CommandOpcode == DAC960_V1_RebuildStat)
  3608. {
  3609. unsigned int LogicalDriveNumber =
  3610. Controller->V1.RebuildProgress->LogicalDriveNumber;
  3611. unsigned int LogicalDriveSize =
  3612. Controller->V1.RebuildProgress->LogicalDriveSize;
  3613. unsigned int BlocksCompleted =
  3614. LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
  3615. if (CommandStatus == DAC960_V1_NormalCompletion)
  3616. {
  3617. Controller->EphemeralProgressMessage = true;
  3618. DAC960_Progress("Consistency Check in Progress: "
  3619. "Logical Drive %d (/dev/rd/c%dd%d) "
  3620. "%d%% completed\n",
  3621. Controller, LogicalDriveNumber,
  3622. Controller->ControllerNumber,
  3623. LogicalDriveNumber,
  3624. (100 * (BlocksCompleted >> 7))
  3625. / (LogicalDriveSize >> 7));
  3626. Controller->EphemeralProgressMessage = false;
  3627. }
  3628. }
  3629. else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
  3630. {
  3631. unsigned int LogicalDriveNumber =
  3632. Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
  3633. unsigned int LogicalDriveSize =
  3634. Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
  3635. unsigned int BlocksCompleted =
  3636. Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
  3637. switch (CommandStatus)
  3638. {
  3639. case DAC960_V1_NormalCompletion:
  3640. switch (Controller->V1.BackgroundInitializationStatus->Status)
  3641. {
  3642. case DAC960_V1_BackgroundInitializationInvalid:
  3643. break;
  3644. case DAC960_V1_BackgroundInitializationStarted:
  3645. DAC960_Progress("Background Initialization Started\n",
  3646. Controller);
  3647. break;
  3648. case DAC960_V1_BackgroundInitializationInProgress:
  3649. if (BlocksCompleted ==
  3650. Controller->V1.LastBackgroundInitializationStatus.
  3651. BlocksCompleted &&
  3652. LogicalDriveNumber ==
  3653. Controller->V1.LastBackgroundInitializationStatus.
  3654. LogicalDriveNumber)
  3655. break;
  3656. Controller->EphemeralProgressMessage = true;
  3657. DAC960_Progress("Background Initialization in Progress: "
  3658. "Logical Drive %d (/dev/rd/c%dd%d) "
  3659. "%d%% completed\n",
  3660. Controller, LogicalDriveNumber,
  3661. Controller->ControllerNumber,
  3662. LogicalDriveNumber,
  3663. (100 * (BlocksCompleted >> 7))
  3664. / (LogicalDriveSize >> 7));
  3665. Controller->EphemeralProgressMessage = false;
  3666. break;
  3667. case DAC960_V1_BackgroundInitializationSuspended:
  3668. DAC960_Progress("Background Initialization Suspended\n",
  3669. Controller);
  3670. break;
  3671. case DAC960_V1_BackgroundInitializationCancelled:
  3672. DAC960_Progress("Background Initialization Cancelled\n",
  3673. Controller);
  3674. break;
  3675. }
  3676. memcpy(&Controller->V1.LastBackgroundInitializationStatus,
  3677. Controller->V1.BackgroundInitializationStatus,
  3678. sizeof(DAC960_V1_BackgroundInitializationStatus_T));
  3679. break;
  3680. case DAC960_V1_BackgroundInitSuccessful:
  3681. if (Controller->V1.BackgroundInitializationStatus->Status ==
  3682. DAC960_V1_BackgroundInitializationInProgress)
  3683. DAC960_Progress("Background Initialization "
  3684. "Completed Successfully\n", Controller);
  3685. Controller->V1.BackgroundInitializationStatus->Status =
  3686. DAC960_V1_BackgroundInitializationInvalid;
  3687. break;
  3688. case DAC960_V1_BackgroundInitAborted:
  3689. if (Controller->V1.BackgroundInitializationStatus->Status ==
  3690. DAC960_V1_BackgroundInitializationInProgress)
  3691. DAC960_Progress("Background Initialization Aborted\n",
  3692. Controller);
  3693. Controller->V1.BackgroundInitializationStatus->Status =
  3694. DAC960_V1_BackgroundInitializationInvalid;
  3695. break;
  3696. case DAC960_V1_NoBackgroundInitInProgress:
  3697. break;
  3698. }
  3699. }
  3700. else if (CommandOpcode == DAC960_V1_DCDB)
  3701. {
  3702. /*
  3703. This is a bit ugly.
  3704. The InquiryStandardData and
  3705. the InquiryUntitSerialNumber information
  3706. retrieval operations BOTH use the DAC960_V1_DCDB
  3707. commands. the test above can't distinguish between
  3708. these two cases.
  3709. Instead, we rely on the order of code later in this
  3710. function to ensure that DeviceInquiryInformation commands
  3711. are submitted before DeviceSerialNumber commands.
  3712. */
  3713. if (Controller->V1.NeedDeviceInquiryInformation)
  3714. {
  3715. DAC960_SCSI_Inquiry_T *InquiryStandardData =
  3716. &Controller->V1.InquiryStandardData
  3717. [Controller->V1.DeviceStateChannel]
  3718. [Controller->V1.DeviceStateTargetID];
  3719. if (CommandStatus != DAC960_V1_NormalCompletion)
  3720. {
  3721. memset(InquiryStandardData, 0,
  3722. sizeof(DAC960_SCSI_Inquiry_T));
  3723. InquiryStandardData->PeripheralDeviceType = 0x1F;
  3724. }
  3725. else
  3726. memcpy(InquiryStandardData,
  3727. Controller->V1.NewInquiryStandardData,
  3728. sizeof(DAC960_SCSI_Inquiry_T));
  3729. Controller->V1.NeedDeviceInquiryInformation = false;
  3730. }
  3731. else if (Controller->V1.NeedDeviceSerialNumberInformation)
  3732. {
  3733. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  3734. &Controller->V1.InquiryUnitSerialNumber
  3735. [Controller->V1.DeviceStateChannel]
  3736. [Controller->V1.DeviceStateTargetID];
  3737. if (CommandStatus != DAC960_V1_NormalCompletion)
  3738. {
  3739. memset(InquiryUnitSerialNumber, 0,
  3740. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  3741. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  3742. }
  3743. else
  3744. memcpy(InquiryUnitSerialNumber,
  3745. Controller->V1.NewInquiryUnitSerialNumber,
  3746. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  3747. Controller->V1.NeedDeviceSerialNumberInformation = false;
  3748. }
  3749. }
  3750. /*
  3751. Begin submitting new monitoring commands.
  3752. */
  3753. if (Controller->V1.NewEventLogSequenceNumber
  3754. - Controller->V1.OldEventLogSequenceNumber > 0)
  3755. {
  3756. Command->V1.CommandMailbox.Type3E.CommandOpcode =
  3757. DAC960_V1_PerformEventLogOperation;
  3758. Command->V1.CommandMailbox.Type3E.OperationType =
  3759. DAC960_V1_GetEventLogEntry;
  3760. Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
  3761. Command->V1.CommandMailbox.Type3E.SequenceNumber =
  3762. Controller->V1.OldEventLogSequenceNumber;
  3763. Command->V1.CommandMailbox.Type3E.BusAddress =
  3764. Controller->V1.EventLogEntryDMA;
  3765. DAC960_QueueCommand(Command);
  3766. return;
  3767. }
  3768. if (Controller->V1.NeedErrorTableInformation)
  3769. {
  3770. Controller->V1.NeedErrorTableInformation = false;
  3771. Command->V1.CommandMailbox.Type3.CommandOpcode =
  3772. DAC960_V1_GetErrorTable;
  3773. Command->V1.CommandMailbox.Type3.BusAddress =
  3774. Controller->V1.NewErrorTableDMA;
  3775. DAC960_QueueCommand(Command);
  3776. return;
  3777. }
  3778. if (Controller->V1.NeedRebuildProgress &&
  3779. Controller->V1.RebuildProgressFirst)
  3780. {
  3781. Controller->V1.NeedRebuildProgress = false;
  3782. Command->V1.CommandMailbox.Type3.CommandOpcode =
  3783. DAC960_V1_GetRebuildProgress;
  3784. Command->V1.CommandMailbox.Type3.BusAddress =
  3785. Controller->V1.RebuildProgressDMA;
  3786. DAC960_QueueCommand(Command);
  3787. return;
  3788. }
  3789. if (Controller->V1.NeedDeviceStateInformation)
  3790. {
  3791. if (Controller->V1.NeedDeviceInquiryInformation)
  3792. {
  3793. DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
  3794. dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
  3795. dma_addr_t NewInquiryStandardDataDMA =
  3796. Controller->V1.NewInquiryStandardDataDMA;
  3797. Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
  3798. Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
  3799. DCDB->Channel = Controller->V1.DeviceStateChannel;
  3800. DCDB->TargetID = Controller->V1.DeviceStateTargetID;
  3801. DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
  3802. DCDB->EarlyStatus = false;
  3803. DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
  3804. DCDB->NoAutomaticRequestSense = false;
  3805. DCDB->DisconnectPermitted = true;
  3806. DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
  3807. DCDB->BusAddress = NewInquiryStandardDataDMA;
  3808. DCDB->CDBLength = 6;
  3809. DCDB->TransferLengthHigh4 = 0;
  3810. DCDB->SenseLength = sizeof(DCDB->SenseData);
  3811. DCDB->CDB[0] = 0x12; /* INQUIRY */
  3812. DCDB->CDB[1] = 0; /* EVPD = 0 */
  3813. DCDB->CDB[2] = 0; /* Page Code */
  3814. DCDB->CDB[3] = 0; /* Reserved */
  3815. DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
  3816. DCDB->CDB[5] = 0; /* Control */
  3817. DAC960_QueueCommand(Command);
  3818. return;
  3819. }
  3820. if (Controller->V1.NeedDeviceSerialNumberInformation)
  3821. {
  3822. DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
  3823. dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
  3824. dma_addr_t NewInquiryUnitSerialNumberDMA =
  3825. Controller->V1.NewInquiryUnitSerialNumberDMA;
  3826. Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
  3827. Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
  3828. DCDB->Channel = Controller->V1.DeviceStateChannel;
  3829. DCDB->TargetID = Controller->V1.DeviceStateTargetID;
  3830. DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
  3831. DCDB->EarlyStatus = false;
  3832. DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
  3833. DCDB->NoAutomaticRequestSense = false;
  3834. DCDB->DisconnectPermitted = true;
  3835. DCDB->TransferLength =
  3836. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  3837. DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
  3838. DCDB->CDBLength = 6;
  3839. DCDB->TransferLengthHigh4 = 0;
  3840. DCDB->SenseLength = sizeof(DCDB->SenseData);
  3841. DCDB->CDB[0] = 0x12; /* INQUIRY */
  3842. DCDB->CDB[1] = 1; /* EVPD = 1 */
  3843. DCDB->CDB[2] = 0x80; /* Page Code */
  3844. DCDB->CDB[3] = 0; /* Reserved */
  3845. DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
  3846. DCDB->CDB[5] = 0; /* Control */
  3847. DAC960_QueueCommand(Command);
  3848. return;
  3849. }
  3850. if (Controller->V1.StartDeviceStateScan)
  3851. {
  3852. Controller->V1.DeviceStateChannel = 0;
  3853. Controller->V1.DeviceStateTargetID = 0;
  3854. Controller->V1.StartDeviceStateScan = false;
  3855. }
  3856. else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
  3857. {
  3858. Controller->V1.DeviceStateChannel++;
  3859. Controller->V1.DeviceStateTargetID = 0;
  3860. }
  3861. if (Controller->V1.DeviceStateChannel < Controller->Channels)
  3862. {
  3863. Controller->V1.NewDeviceState->DeviceState =
  3864. DAC960_V1_Device_Dead;
  3865. Command->V1.CommandMailbox.Type3D.CommandOpcode =
  3866. DAC960_V1_GetDeviceState;
  3867. Command->V1.CommandMailbox.Type3D.Channel =
  3868. Controller->V1.DeviceStateChannel;
  3869. Command->V1.CommandMailbox.Type3D.TargetID =
  3870. Controller->V1.DeviceStateTargetID;
  3871. Command->V1.CommandMailbox.Type3D.BusAddress =
  3872. Controller->V1.NewDeviceStateDMA;
  3873. DAC960_QueueCommand(Command);
  3874. return;
  3875. }
  3876. Controller->V1.NeedDeviceStateInformation = false;
  3877. }
  3878. if (Controller->V1.NeedLogicalDriveInformation)
  3879. {
  3880. Controller->V1.NeedLogicalDriveInformation = false;
  3881. Command->V1.CommandMailbox.Type3.CommandOpcode =
  3882. DAC960_V1_GetLogicalDriveInformation;
  3883. Command->V1.CommandMailbox.Type3.BusAddress =
  3884. Controller->V1.NewLogicalDriveInformationDMA;
  3885. DAC960_QueueCommand(Command);
  3886. return;
  3887. }
  3888. if (Controller->V1.NeedRebuildProgress)
  3889. {
  3890. Controller->V1.NeedRebuildProgress = false;
  3891. Command->V1.CommandMailbox.Type3.CommandOpcode =
  3892. DAC960_V1_GetRebuildProgress;
  3893. Command->V1.CommandMailbox.Type3.BusAddress =
  3894. Controller->V1.RebuildProgressDMA;
  3895. DAC960_QueueCommand(Command);
  3896. return;
  3897. }
  3898. if (Controller->V1.NeedConsistencyCheckProgress)
  3899. {
  3900. Controller->V1.NeedConsistencyCheckProgress = false;
  3901. Command->V1.CommandMailbox.Type3.CommandOpcode =
  3902. DAC960_V1_RebuildStat;
  3903. Command->V1.CommandMailbox.Type3.BusAddress =
  3904. Controller->V1.RebuildProgressDMA;
  3905. DAC960_QueueCommand(Command);
  3906. return;
  3907. }
  3908. if (Controller->V1.NeedBackgroundInitializationStatus)
  3909. {
  3910. Controller->V1.NeedBackgroundInitializationStatus = false;
  3911. Command->V1.CommandMailbox.Type3B.CommandOpcode =
  3912. DAC960_V1_BackgroundInitializationControl;
  3913. Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
  3914. Command->V1.CommandMailbox.Type3B.BusAddress =
  3915. Controller->V1.BackgroundInitializationStatusDMA;
  3916. DAC960_QueueCommand(Command);
  3917. return;
  3918. }
  3919. Controller->MonitoringTimerCount++;
  3920. Controller->MonitoringTimer.expires =
  3921. jiffies + DAC960_MonitoringTimerInterval;
  3922. add_timer(&Controller->MonitoringTimer);
  3923. }
  3924. if (CommandType == DAC960_ImmediateCommand)
  3925. {
  3926. complete(Command->Completion);
  3927. Command->Completion = NULL;
  3928. return;
  3929. }
  3930. if (CommandType == DAC960_QueuedCommand)
  3931. {
  3932. DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
  3933. KernelCommand->CommandStatus = Command->V1.CommandStatus;
  3934. Command->V1.KernelCommand = NULL;
  3935. if (CommandOpcode == DAC960_V1_DCDB)
  3936. Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
  3937. [KernelCommand->DCDB->TargetID] =
  3938. false;
  3939. DAC960_DeallocateCommand(Command);
  3940. KernelCommand->CompletionFunction(KernelCommand);
  3941. return;
  3942. }
  3943. /*
  3944. Queue a Status Monitoring Command to the Controller using the just
  3945. completed Command if one was deferred previously due to lack of a
  3946. free Command when the Monitoring Timer Function was called.
  3947. */
  3948. if (Controller->MonitoringCommandDeferred)
  3949. {
  3950. Controller->MonitoringCommandDeferred = false;
  3951. DAC960_V1_QueueMonitoringCommand(Command);
  3952. return;
  3953. }
  3954. /*
  3955. Deallocate the Command.
  3956. */
  3957. DAC960_DeallocateCommand(Command);
  3958. /*
  3959. Wake up any processes waiting on a free Command.
  3960. */
  3961. wake_up(&Controller->CommandWaitQueue);
  3962. }
  3963. /*
  3964. DAC960_V2_ReadWriteError prints an appropriate error message for Command
  3965. when an error occurs on a Read or Write operation.
  3966. */
  3967. static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
  3968. {
  3969. DAC960_Controller_T *Controller = Command->Controller;
  3970. unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
  3971. "NOT READY", "MEDIUM ERROR",
  3972. "HARDWARE ERROR", "ILLEGAL REQUEST",
  3973. "UNIT ATTENTION", "DATA PROTECT",
  3974. "BLANK CHECK", "VENDOR-SPECIFIC",
  3975. "COPY ABORTED", "ABORTED COMMAND",
  3976. "EQUAL", "VOLUME OVERFLOW",
  3977. "MISCOMPARE", "RESERVED" };
  3978. unsigned char *CommandName = "UNKNOWN";
  3979. switch (Command->CommandType)
  3980. {
  3981. case DAC960_ReadCommand:
  3982. case DAC960_ReadRetryCommand:
  3983. CommandName = "READ";
  3984. break;
  3985. case DAC960_WriteCommand:
  3986. case DAC960_WriteRetryCommand:
  3987. CommandName = "WRITE";
  3988. break;
  3989. case DAC960_MonitoringCommand:
  3990. case DAC960_ImmediateCommand:
  3991. case DAC960_QueuedCommand:
  3992. break;
  3993. }
  3994. DAC960_Error("Error Condition %s on %s:\n", Controller,
  3995. SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
  3996. DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
  3997. Controller, Controller->ControllerNumber,
  3998. Command->LogicalDriveNumber, Command->BlockNumber,
  3999. Command->BlockNumber + Command->BlockCount - 1);
  4000. }
  4001. /*
  4002. DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
  4003. occurs.
  4004. */
  4005. static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
  4006. DAC960_V2_Event_T *Event)
  4007. {
  4008. DAC960_SCSI_RequestSense_T *RequestSense =
  4009. (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
  4010. unsigned char MessageBuffer[DAC960_LineBufferSize];
  4011. static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
  4012. { /* Physical Device Events (0x0000 - 0x007F) */
  4013. { 0x0001, "P Online" },
  4014. { 0x0002, "P Standby" },
  4015. { 0x0005, "P Automatic Rebuild Started" },
  4016. { 0x0006, "P Manual Rebuild Started" },
  4017. { 0x0007, "P Rebuild Completed" },
  4018. { 0x0008, "P Rebuild Cancelled" },
  4019. { 0x0009, "P Rebuild Failed for Unknown Reasons" },
  4020. { 0x000A, "P Rebuild Failed due to New Physical Device" },
  4021. { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
  4022. { 0x000C, "S Offline" },
  4023. { 0x000D, "P Found" },
  4024. { 0x000E, "P Removed" },
  4025. { 0x000F, "P Unconfigured" },
  4026. { 0x0010, "P Expand Capacity Started" },
  4027. { 0x0011, "P Expand Capacity Completed" },
  4028. { 0x0012, "P Expand Capacity Failed" },
  4029. { 0x0013, "P Command Timed Out" },
  4030. { 0x0014, "P Command Aborted" },
  4031. { 0x0015, "P Command Retried" },
  4032. { 0x0016, "P Parity Error" },
  4033. { 0x0017, "P Soft Error" },
  4034. { 0x0018, "P Miscellaneous Error" },
  4035. { 0x0019, "P Reset" },
  4036. { 0x001A, "P Active Spare Found" },
  4037. { 0x001B, "P Warm Spare Found" },
  4038. { 0x001C, "S Sense Data Received" },
  4039. { 0x001D, "P Initialization Started" },
  4040. { 0x001E, "P Initialization Completed" },
  4041. { 0x001F, "P Initialization Failed" },
  4042. { 0x0020, "P Initialization Cancelled" },
  4043. { 0x0021, "P Failed because Write Recovery Failed" },
  4044. { 0x0022, "P Failed because SCSI Bus Reset Failed" },
  4045. { 0x0023, "P Failed because of Double Check Condition" },
  4046. { 0x0024, "P Failed because Device Cannot Be Accessed" },
  4047. { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
  4048. { 0x0026, "P Failed because of Bad Tag from Device" },
  4049. { 0x0027, "P Failed because of Command Timeout" },
  4050. { 0x0028, "P Failed because of System Reset" },
  4051. { 0x0029, "P Failed because of Busy Status or Parity Error" },
  4052. { 0x002A, "P Failed because Host Set Device to Failed State" },
  4053. { 0x002B, "P Failed because of Selection Timeout" },
  4054. { 0x002C, "P Failed because of SCSI Bus Phase Error" },
  4055. { 0x002D, "P Failed because Device Returned Unknown Status" },
  4056. { 0x002E, "P Failed because Device Not Ready" },
  4057. { 0x002F, "P Failed because Device Not Found at Startup" },
  4058. { 0x0030, "P Failed because COD Write Operation Failed" },
  4059. { 0x0031, "P Failed because BDT Write Operation Failed" },
  4060. { 0x0039, "P Missing at Startup" },
  4061. { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
  4062. { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
  4063. { 0x003D, "P Standby Rebuild Started" },
  4064. /* Logical Device Events (0x0080 - 0x00FF) */
  4065. { 0x0080, "M Consistency Check Started" },
  4066. { 0x0081, "M Consistency Check Completed" },
  4067. { 0x0082, "M Consistency Check Cancelled" },
  4068. { 0x0083, "M Consistency Check Completed With Errors" },
  4069. { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
  4070. { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
  4071. { 0x0086, "L Offline" },
  4072. { 0x0087, "L Critical" },
  4073. { 0x0088, "L Online" },
  4074. { 0x0089, "M Automatic Rebuild Started" },
  4075. { 0x008A, "M Manual Rebuild Started" },
  4076. { 0x008B, "M Rebuild Completed" },
  4077. { 0x008C, "M Rebuild Cancelled" },
  4078. { 0x008D, "M Rebuild Failed for Unknown Reasons" },
  4079. { 0x008E, "M Rebuild Failed due to New Physical Device" },
  4080. { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
  4081. { 0x0090, "M Initialization Started" },
  4082. { 0x0091, "M Initialization Completed" },
  4083. { 0x0092, "M Initialization Cancelled" },
  4084. { 0x0093, "M Initialization Failed" },
  4085. { 0x0094, "L Found" },
  4086. { 0x0095, "L Deleted" },
  4087. { 0x0096, "M Expand Capacity Started" },
  4088. { 0x0097, "M Expand Capacity Completed" },
  4089. { 0x0098, "M Expand Capacity Failed" },
  4090. { 0x0099, "L Bad Block Found" },
  4091. { 0x009A, "L Size Changed" },
  4092. { 0x009B, "L Type Changed" },
  4093. { 0x009C, "L Bad Data Block Found" },
  4094. { 0x009E, "L Read of Data Block in BDT" },
  4095. { 0x009F, "L Write Back Data for Disk Block Lost" },
  4096. { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
  4097. { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
  4098. { 0x00A2, "L Standby Rebuild Started" },
  4099. /* Fault Management Events (0x0100 - 0x017F) */
  4100. { 0x0140, "E Fan %d Failed" },
  4101. { 0x0141, "E Fan %d OK" },
  4102. { 0x0142, "E Fan %d Not Present" },
  4103. { 0x0143, "E Power Supply %d Failed" },
  4104. { 0x0144, "E Power Supply %d OK" },
  4105. { 0x0145, "E Power Supply %d Not Present" },
  4106. { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
  4107. { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
  4108. { 0x0148, "E Temperature Sensor %d Temperature Normal" },
  4109. { 0x0149, "E Temperature Sensor %d Not Present" },
  4110. { 0x014A, "E Enclosure Management Unit %d Access Critical" },
  4111. { 0x014B, "E Enclosure Management Unit %d Access OK" },
  4112. { 0x014C, "E Enclosure Management Unit %d Access Offline" },
  4113. /* Controller Events (0x0180 - 0x01FF) */
  4114. { 0x0181, "C Cache Write Back Error" },
  4115. { 0x0188, "C Battery Backup Unit Found" },
  4116. { 0x0189, "C Battery Backup Unit Charge Level Low" },
  4117. { 0x018A, "C Battery Backup Unit Charge Level OK" },
  4118. { 0x0193, "C Installation Aborted" },
  4119. { 0x0195, "C Battery Backup Unit Physically Removed" },
  4120. { 0x0196, "C Memory Error During Warm Boot" },
  4121. { 0x019E, "C Memory Soft ECC Error Corrected" },
  4122. { 0x019F, "C Memory Hard ECC Error Corrected" },
  4123. { 0x01A2, "C Battery Backup Unit Failed" },
  4124. { 0x01AB, "C Mirror Race Recovery Failed" },
  4125. { 0x01AC, "C Mirror Race on Critical Drive" },
  4126. /* Controller Internal Processor Events */
  4127. { 0x0380, "C Internal Controller Hung" },
  4128. { 0x0381, "C Internal Controller Firmware Breakpoint" },
  4129. { 0x0390, "C Internal Controller i960 Processor Specific Error" },
  4130. { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
  4131. { 0, "" } };
  4132. int EventListIndex = 0, EventCode;
  4133. unsigned char EventType, *EventMessage;
  4134. if (Event->EventCode == 0x1C &&
  4135. RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
  4136. (RequestSense->AdditionalSenseCode == 0x80 ||
  4137. RequestSense->AdditionalSenseCode == 0x81))
  4138. Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
  4139. RequestSense->AdditionalSenseCodeQualifier;
  4140. while (true)
  4141. {
  4142. EventCode = EventList[EventListIndex].EventCode;
  4143. if (EventCode == Event->EventCode || EventCode == 0) break;
  4144. EventListIndex++;
  4145. }
  4146. EventType = EventList[EventListIndex].EventMessage[0];
  4147. EventMessage = &EventList[EventListIndex].EventMessage[2];
  4148. if (EventCode == 0)
  4149. {
  4150. DAC960_Critical("Unknown Controller Event Code %04X\n",
  4151. Controller, Event->EventCode);
  4152. return;
  4153. }
  4154. switch (EventType)
  4155. {
  4156. case 'P':
  4157. DAC960_Critical("Physical Device %d:%d %s\n", Controller,
  4158. Event->Channel, Event->TargetID, EventMessage);
  4159. break;
  4160. case 'L':
  4161. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
  4162. Event->LogicalUnit, Controller->ControllerNumber,
  4163. Event->LogicalUnit, EventMessage);
  4164. break;
  4165. case 'M':
  4166. DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
  4167. Event->LogicalUnit, Controller->ControllerNumber,
  4168. Event->LogicalUnit, EventMessage);
  4169. break;
  4170. case 'S':
  4171. if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
  4172. (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
  4173. RequestSense->AdditionalSenseCode == 0x04 &&
  4174. (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
  4175. RequestSense->AdditionalSenseCodeQualifier == 0x02)))
  4176. break;
  4177. DAC960_Critical("Physical Device %d:%d %s\n", Controller,
  4178. Event->Channel, Event->TargetID, EventMessage);
  4179. DAC960_Critical("Physical Device %d:%d Request Sense: "
  4180. "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
  4181. Controller,
  4182. Event->Channel,
  4183. Event->TargetID,
  4184. RequestSense->SenseKey,
  4185. RequestSense->AdditionalSenseCode,
  4186. RequestSense->AdditionalSenseCodeQualifier);
  4187. DAC960_Critical("Physical Device %d:%d Request Sense: "
  4188. "Information = %02X%02X%02X%02X "
  4189. "%02X%02X%02X%02X\n",
  4190. Controller,
  4191. Event->Channel,
  4192. Event->TargetID,
  4193. RequestSense->Information[0],
  4194. RequestSense->Information[1],
  4195. RequestSense->Information[2],
  4196. RequestSense->Information[3],
  4197. RequestSense->CommandSpecificInformation[0],
  4198. RequestSense->CommandSpecificInformation[1],
  4199. RequestSense->CommandSpecificInformation[2],
  4200. RequestSense->CommandSpecificInformation[3]);
  4201. break;
  4202. case 'E':
  4203. if (Controller->SuppressEnclosureMessages) break;
  4204. sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
  4205. DAC960_Critical("Enclosure %d %s\n", Controller,
  4206. Event->TargetID, MessageBuffer);
  4207. break;
  4208. case 'C':
  4209. DAC960_Critical("Controller %s\n", Controller, EventMessage);
  4210. break;
  4211. default:
  4212. DAC960_Critical("Unknown Controller Event Code %04X\n",
  4213. Controller, Event->EventCode);
  4214. break;
  4215. }
  4216. }
  4217. /*
  4218. DAC960_V2_ReportProgress prints an appropriate progress message for
  4219. Logical Device Long Operations.
  4220. */
  4221. static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
  4222. unsigned char *MessageString,
  4223. unsigned int LogicalDeviceNumber,
  4224. unsigned long BlocksCompleted,
  4225. unsigned long LogicalDeviceSize)
  4226. {
  4227. Controller->EphemeralProgressMessage = true;
  4228. DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
  4229. "%d%% completed\n", Controller,
  4230. MessageString,
  4231. LogicalDeviceNumber,
  4232. Controller->ControllerNumber,
  4233. LogicalDeviceNumber,
  4234. (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
  4235. Controller->EphemeralProgressMessage = false;
  4236. }
  4237. /*
  4238. DAC960_V2_ProcessCompletedCommand performs completion processing for Command
  4239. for DAC960 V2 Firmware Controllers.
  4240. */
  4241. static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
  4242. {
  4243. DAC960_Controller_T *Controller = Command->Controller;
  4244. DAC960_CommandType_T CommandType = Command->CommandType;
  4245. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  4246. DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
  4247. DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
  4248. if (CommandType == DAC960_ReadCommand ||
  4249. CommandType == DAC960_WriteCommand)
  4250. {
  4251. #ifdef FORCE_RETRY_DEBUG
  4252. CommandStatus = DAC960_V2_AbormalCompletion;
  4253. #endif
  4254. Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
  4255. if (CommandStatus == DAC960_V2_NormalCompletion) {
  4256. if (!DAC960_ProcessCompletedRequest(Command, true))
  4257. BUG();
  4258. } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
  4259. {
  4260. /*
  4261. * break the command down into pieces and resubmit each
  4262. * piece, hoping that some of them will succeed.
  4263. */
  4264. DAC960_queue_partial_rw(Command);
  4265. return;
  4266. }
  4267. else
  4268. {
  4269. if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
  4270. DAC960_V2_ReadWriteError(Command);
  4271. /*
  4272. Perform completion processing for all buffers in this I/O Request.
  4273. */
  4274. (void)DAC960_ProcessCompletedRequest(Command, false);
  4275. }
  4276. }
  4277. else if (CommandType == DAC960_ReadRetryCommand ||
  4278. CommandType == DAC960_WriteRetryCommand)
  4279. {
  4280. boolean normal_completion;
  4281. #ifdef FORCE_RETRY_FAILURE_DEBUG
  4282. static int retry_count = 1;
  4283. #endif
  4284. /*
  4285. Perform completion processing for the portion that was
  4286. retried, and submit the next portion, if any.
  4287. */
  4288. normal_completion = true;
  4289. if (CommandStatus != DAC960_V2_NormalCompletion) {
  4290. normal_completion = false;
  4291. if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
  4292. DAC960_V2_ReadWriteError(Command);
  4293. }
  4294. #ifdef FORCE_RETRY_FAILURE_DEBUG
  4295. if (!(++retry_count % 10000)) {
  4296. printk("V2 error retry failure test\n");
  4297. normal_completion = false;
  4298. DAC960_V2_ReadWriteError(Command);
  4299. }
  4300. #endif
  4301. if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
  4302. DAC960_queue_partial_rw(Command);
  4303. return;
  4304. }
  4305. }
  4306. else if (CommandType == DAC960_MonitoringCommand)
  4307. {
  4308. if (Controller->ShutdownMonitoringTimer)
  4309. return;
  4310. if (CommandOpcode == DAC960_V2_GetControllerInfo)
  4311. {
  4312. DAC960_V2_ControllerInfo_T *NewControllerInfo =
  4313. Controller->V2.NewControllerInformation;
  4314. DAC960_V2_ControllerInfo_T *ControllerInfo =
  4315. &Controller->V2.ControllerInformation;
  4316. Controller->LogicalDriveCount =
  4317. NewControllerInfo->LogicalDevicesPresent;
  4318. Controller->V2.NeedLogicalDeviceInformation = true;
  4319. Controller->V2.NeedPhysicalDeviceInformation = true;
  4320. Controller->V2.StartLogicalDeviceInformationScan = true;
  4321. Controller->V2.StartPhysicalDeviceInformationScan = true;
  4322. Controller->MonitoringAlertMode =
  4323. (NewControllerInfo->LogicalDevicesCritical > 0 ||
  4324. NewControllerInfo->LogicalDevicesOffline > 0 ||
  4325. NewControllerInfo->PhysicalDisksCritical > 0 ||
  4326. NewControllerInfo->PhysicalDisksOffline > 0);
  4327. memcpy(ControllerInfo, NewControllerInfo,
  4328. sizeof(DAC960_V2_ControllerInfo_T));
  4329. }
  4330. else if (CommandOpcode == DAC960_V2_GetEvent)
  4331. {
  4332. if (CommandStatus == DAC960_V2_NormalCompletion) {
  4333. DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
  4334. }
  4335. Controller->V2.NextEventSequenceNumber++;
  4336. }
  4337. else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
  4338. CommandStatus == DAC960_V2_NormalCompletion)
  4339. {
  4340. DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
  4341. Controller->V2.NewPhysicalDeviceInformation;
  4342. unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
  4343. DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
  4344. Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
  4345. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  4346. Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
  4347. unsigned int DeviceIndex;
  4348. while (PhysicalDeviceInfo != NULL &&
  4349. (NewPhysicalDeviceInfo->Channel >
  4350. PhysicalDeviceInfo->Channel ||
  4351. (NewPhysicalDeviceInfo->Channel ==
  4352. PhysicalDeviceInfo->Channel &&
  4353. (NewPhysicalDeviceInfo->TargetID >
  4354. PhysicalDeviceInfo->TargetID ||
  4355. (NewPhysicalDeviceInfo->TargetID ==
  4356. PhysicalDeviceInfo->TargetID &&
  4357. NewPhysicalDeviceInfo->LogicalUnit >
  4358. PhysicalDeviceInfo->LogicalUnit)))))
  4359. {
  4360. DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
  4361. Controller,
  4362. PhysicalDeviceInfo->Channel,
  4363. PhysicalDeviceInfo->TargetID);
  4364. Controller->V2.PhysicalDeviceInformation
  4365. [PhysicalDeviceIndex] = NULL;
  4366. Controller->V2.InquiryUnitSerialNumber
  4367. [PhysicalDeviceIndex] = NULL;
  4368. kfree(PhysicalDeviceInfo);
  4369. kfree(InquiryUnitSerialNumber);
  4370. for (DeviceIndex = PhysicalDeviceIndex;
  4371. DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
  4372. DeviceIndex++)
  4373. {
  4374. Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
  4375. Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
  4376. Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
  4377. Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
  4378. }
  4379. Controller->V2.PhysicalDeviceInformation
  4380. [DAC960_V2_MaxPhysicalDevices-1] = NULL;
  4381. Controller->V2.InquiryUnitSerialNumber
  4382. [DAC960_V2_MaxPhysicalDevices-1] = NULL;
  4383. PhysicalDeviceInfo =
  4384. Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
  4385. InquiryUnitSerialNumber =
  4386. Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
  4387. }
  4388. if (PhysicalDeviceInfo == NULL ||
  4389. (NewPhysicalDeviceInfo->Channel !=
  4390. PhysicalDeviceInfo->Channel) ||
  4391. (NewPhysicalDeviceInfo->TargetID !=
  4392. PhysicalDeviceInfo->TargetID) ||
  4393. (NewPhysicalDeviceInfo->LogicalUnit !=
  4394. PhysicalDeviceInfo->LogicalUnit))
  4395. {
  4396. PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
  4397. kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
  4398. InquiryUnitSerialNumber =
  4399. (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
  4400. kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
  4401. GFP_ATOMIC);
  4402. if (InquiryUnitSerialNumber == NULL &&
  4403. PhysicalDeviceInfo != NULL)
  4404. {
  4405. kfree(PhysicalDeviceInfo);
  4406. PhysicalDeviceInfo = NULL;
  4407. }
  4408. DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
  4409. Controller,
  4410. NewPhysicalDeviceInfo->Channel,
  4411. NewPhysicalDeviceInfo->TargetID,
  4412. (PhysicalDeviceInfo != NULL
  4413. ? "" : " - Allocation Failed"));
  4414. if (PhysicalDeviceInfo != NULL)
  4415. {
  4416. memset(PhysicalDeviceInfo, 0,
  4417. sizeof(DAC960_V2_PhysicalDeviceInfo_T));
  4418. PhysicalDeviceInfo->PhysicalDeviceState =
  4419. DAC960_V2_Device_InvalidState;
  4420. memset(InquiryUnitSerialNumber, 0,
  4421. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  4422. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  4423. for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
  4424. DeviceIndex > PhysicalDeviceIndex;
  4425. DeviceIndex--)
  4426. {
  4427. Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
  4428. Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
  4429. Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
  4430. Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
  4431. }
  4432. Controller->V2.PhysicalDeviceInformation
  4433. [PhysicalDeviceIndex] =
  4434. PhysicalDeviceInfo;
  4435. Controller->V2.InquiryUnitSerialNumber
  4436. [PhysicalDeviceIndex] =
  4437. InquiryUnitSerialNumber;
  4438. Controller->V2.NeedDeviceSerialNumberInformation = true;
  4439. }
  4440. }
  4441. if (PhysicalDeviceInfo != NULL)
  4442. {
  4443. if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
  4444. PhysicalDeviceInfo->PhysicalDeviceState)
  4445. DAC960_Critical(
  4446. "Physical Device %d:%d is now %s\n", Controller,
  4447. NewPhysicalDeviceInfo->Channel,
  4448. NewPhysicalDeviceInfo->TargetID,
  4449. (NewPhysicalDeviceInfo->PhysicalDeviceState
  4450. == DAC960_V2_Device_Online
  4451. ? "ONLINE"
  4452. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4453. == DAC960_V2_Device_Rebuild
  4454. ? "REBUILD"
  4455. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4456. == DAC960_V2_Device_Missing
  4457. ? "MISSING"
  4458. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4459. == DAC960_V2_Device_Critical
  4460. ? "CRITICAL"
  4461. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4462. == DAC960_V2_Device_Dead
  4463. ? "DEAD"
  4464. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4465. == DAC960_V2_Device_SuspectedDead
  4466. ? "SUSPECTED-DEAD"
  4467. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4468. == DAC960_V2_Device_CommandedOffline
  4469. ? "COMMANDED-OFFLINE"
  4470. : NewPhysicalDeviceInfo->PhysicalDeviceState
  4471. == DAC960_V2_Device_Standby
  4472. ? "STANDBY" : "UNKNOWN"));
  4473. if ((NewPhysicalDeviceInfo->ParityErrors !=
  4474. PhysicalDeviceInfo->ParityErrors) ||
  4475. (NewPhysicalDeviceInfo->SoftErrors !=
  4476. PhysicalDeviceInfo->SoftErrors) ||
  4477. (NewPhysicalDeviceInfo->HardErrors !=
  4478. PhysicalDeviceInfo->HardErrors) ||
  4479. (NewPhysicalDeviceInfo->MiscellaneousErrors !=
  4480. PhysicalDeviceInfo->MiscellaneousErrors) ||
  4481. (NewPhysicalDeviceInfo->CommandTimeouts !=
  4482. PhysicalDeviceInfo->CommandTimeouts) ||
  4483. (NewPhysicalDeviceInfo->Retries !=
  4484. PhysicalDeviceInfo->Retries) ||
  4485. (NewPhysicalDeviceInfo->Aborts !=
  4486. PhysicalDeviceInfo->Aborts) ||
  4487. (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
  4488. PhysicalDeviceInfo->PredictedFailuresDetected))
  4489. {
  4490. DAC960_Critical("Physical Device %d:%d Errors: "
  4491. "Parity = %d, Soft = %d, "
  4492. "Hard = %d, Misc = %d\n",
  4493. Controller,
  4494. NewPhysicalDeviceInfo->Channel,
  4495. NewPhysicalDeviceInfo->TargetID,
  4496. NewPhysicalDeviceInfo->ParityErrors,
  4497. NewPhysicalDeviceInfo->SoftErrors,
  4498. NewPhysicalDeviceInfo->HardErrors,
  4499. NewPhysicalDeviceInfo->MiscellaneousErrors);
  4500. DAC960_Critical("Physical Device %d:%d Errors: "
  4501. "Timeouts = %d, Retries = %d, "
  4502. "Aborts = %d, Predicted = %d\n",
  4503. Controller,
  4504. NewPhysicalDeviceInfo->Channel,
  4505. NewPhysicalDeviceInfo->TargetID,
  4506. NewPhysicalDeviceInfo->CommandTimeouts,
  4507. NewPhysicalDeviceInfo->Retries,
  4508. NewPhysicalDeviceInfo->Aborts,
  4509. NewPhysicalDeviceInfo
  4510. ->PredictedFailuresDetected);
  4511. }
  4512. if ((PhysicalDeviceInfo->PhysicalDeviceState
  4513. == DAC960_V2_Device_Dead ||
  4514. PhysicalDeviceInfo->PhysicalDeviceState
  4515. == DAC960_V2_Device_InvalidState) &&
  4516. NewPhysicalDeviceInfo->PhysicalDeviceState
  4517. != DAC960_V2_Device_Dead)
  4518. Controller->V2.NeedDeviceSerialNumberInformation = true;
  4519. memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
  4520. sizeof(DAC960_V2_PhysicalDeviceInfo_T));
  4521. }
  4522. NewPhysicalDeviceInfo->LogicalUnit++;
  4523. Controller->V2.PhysicalDeviceIndex++;
  4524. }
  4525. else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
  4526. {
  4527. unsigned int DeviceIndex;
  4528. for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
  4529. DeviceIndex < DAC960_V2_MaxPhysicalDevices;
  4530. DeviceIndex++)
  4531. {
  4532. DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
  4533. Controller->V2.PhysicalDeviceInformation[DeviceIndex];
  4534. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  4535. Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
  4536. if (PhysicalDeviceInfo == NULL) break;
  4537. DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
  4538. Controller,
  4539. PhysicalDeviceInfo->Channel,
  4540. PhysicalDeviceInfo->TargetID);
  4541. Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
  4542. Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
  4543. kfree(PhysicalDeviceInfo);
  4544. kfree(InquiryUnitSerialNumber);
  4545. }
  4546. Controller->V2.NeedPhysicalDeviceInformation = false;
  4547. }
  4548. else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
  4549. CommandStatus == DAC960_V2_NormalCompletion)
  4550. {
  4551. DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
  4552. Controller->V2.NewLogicalDeviceInformation;
  4553. unsigned short LogicalDeviceNumber =
  4554. NewLogicalDeviceInfo->LogicalDeviceNumber;
  4555. DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
  4556. Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
  4557. if (LogicalDeviceInfo == NULL)
  4558. {
  4559. DAC960_V2_PhysicalDevice_T PhysicalDevice;
  4560. PhysicalDevice.Controller = 0;
  4561. PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
  4562. PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
  4563. PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
  4564. Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
  4565. PhysicalDevice;
  4566. LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
  4567. kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
  4568. Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
  4569. LogicalDeviceInfo;
  4570. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  4571. "Now Exists%s\n", Controller,
  4572. LogicalDeviceNumber,
  4573. Controller->ControllerNumber,
  4574. LogicalDeviceNumber,
  4575. (LogicalDeviceInfo != NULL
  4576. ? "" : " - Allocation Failed"));
  4577. if (LogicalDeviceInfo != NULL)
  4578. {
  4579. memset(LogicalDeviceInfo, 0,
  4580. sizeof(DAC960_V2_LogicalDeviceInfo_T));
  4581. DAC960_ComputeGenericDiskInfo(Controller);
  4582. }
  4583. }
  4584. if (LogicalDeviceInfo != NULL)
  4585. {
  4586. unsigned long LogicalDeviceSize =
  4587. NewLogicalDeviceInfo->ConfigurableDeviceSize;
  4588. if (NewLogicalDeviceInfo->LogicalDeviceState !=
  4589. LogicalDeviceInfo->LogicalDeviceState)
  4590. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  4591. "is now %s\n", Controller,
  4592. LogicalDeviceNumber,
  4593. Controller->ControllerNumber,
  4594. LogicalDeviceNumber,
  4595. (NewLogicalDeviceInfo->LogicalDeviceState
  4596. == DAC960_V2_LogicalDevice_Online
  4597. ? "ONLINE"
  4598. : NewLogicalDeviceInfo->LogicalDeviceState
  4599. == DAC960_V2_LogicalDevice_Critical
  4600. ? "CRITICAL" : "OFFLINE"));
  4601. if ((NewLogicalDeviceInfo->SoftErrors !=
  4602. LogicalDeviceInfo->SoftErrors) ||
  4603. (NewLogicalDeviceInfo->CommandsFailed !=
  4604. LogicalDeviceInfo->CommandsFailed) ||
  4605. (NewLogicalDeviceInfo->DeferredWriteErrors !=
  4606. LogicalDeviceInfo->DeferredWriteErrors))
  4607. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
  4608. "Soft = %d, Failed = %d, Deferred Write = %d\n",
  4609. Controller, LogicalDeviceNumber,
  4610. Controller->ControllerNumber,
  4611. LogicalDeviceNumber,
  4612. NewLogicalDeviceInfo->SoftErrors,
  4613. NewLogicalDeviceInfo->CommandsFailed,
  4614. NewLogicalDeviceInfo->DeferredWriteErrors);
  4615. if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
  4616. DAC960_V2_ReportProgress(Controller,
  4617. "Consistency Check",
  4618. LogicalDeviceNumber,
  4619. NewLogicalDeviceInfo
  4620. ->ConsistencyCheckBlockNumber,
  4621. LogicalDeviceSize);
  4622. else if (NewLogicalDeviceInfo->RebuildInProgress)
  4623. DAC960_V2_ReportProgress(Controller,
  4624. "Rebuild",
  4625. LogicalDeviceNumber,
  4626. NewLogicalDeviceInfo
  4627. ->RebuildBlockNumber,
  4628. LogicalDeviceSize);
  4629. else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
  4630. DAC960_V2_ReportProgress(Controller,
  4631. "Background Initialization",
  4632. LogicalDeviceNumber,
  4633. NewLogicalDeviceInfo
  4634. ->BackgroundInitializationBlockNumber,
  4635. LogicalDeviceSize);
  4636. else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
  4637. DAC960_V2_ReportProgress(Controller,
  4638. "Foreground Initialization",
  4639. LogicalDeviceNumber,
  4640. NewLogicalDeviceInfo
  4641. ->ForegroundInitializationBlockNumber,
  4642. LogicalDeviceSize);
  4643. else if (NewLogicalDeviceInfo->DataMigrationInProgress)
  4644. DAC960_V2_ReportProgress(Controller,
  4645. "Data Migration",
  4646. LogicalDeviceNumber,
  4647. NewLogicalDeviceInfo
  4648. ->DataMigrationBlockNumber,
  4649. LogicalDeviceSize);
  4650. else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
  4651. DAC960_V2_ReportProgress(Controller,
  4652. "Patrol Operation",
  4653. LogicalDeviceNumber,
  4654. NewLogicalDeviceInfo
  4655. ->PatrolOperationBlockNumber,
  4656. LogicalDeviceSize);
  4657. if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
  4658. !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
  4659. DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
  4660. "Background Initialization %s\n",
  4661. Controller,
  4662. LogicalDeviceNumber,
  4663. Controller->ControllerNumber,
  4664. LogicalDeviceNumber,
  4665. (NewLogicalDeviceInfo->LogicalDeviceControl
  4666. .LogicalDeviceInitialized
  4667. ? "Completed" : "Failed"));
  4668. memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
  4669. sizeof(DAC960_V2_LogicalDeviceInfo_T));
  4670. }
  4671. Controller->V2.LogicalDriveFoundDuringScan
  4672. [LogicalDeviceNumber] = true;
  4673. NewLogicalDeviceInfo->LogicalDeviceNumber++;
  4674. }
  4675. else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
  4676. {
  4677. int LogicalDriveNumber;
  4678. for (LogicalDriveNumber = 0;
  4679. LogicalDriveNumber < DAC960_MaxLogicalDrives;
  4680. LogicalDriveNumber++)
  4681. {
  4682. DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
  4683. Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
  4684. if (LogicalDeviceInfo == NULL ||
  4685. Controller->V2.LogicalDriveFoundDuringScan
  4686. [LogicalDriveNumber])
  4687. continue;
  4688. DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
  4689. "No Longer Exists\n", Controller,
  4690. LogicalDriveNumber,
  4691. Controller->ControllerNumber,
  4692. LogicalDriveNumber);
  4693. Controller->V2.LogicalDeviceInformation
  4694. [LogicalDriveNumber] = NULL;
  4695. kfree(LogicalDeviceInfo);
  4696. Controller->LogicalDriveInitiallyAccessible
  4697. [LogicalDriveNumber] = false;
  4698. DAC960_ComputeGenericDiskInfo(Controller);
  4699. }
  4700. Controller->V2.NeedLogicalDeviceInformation = false;
  4701. }
  4702. else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
  4703. {
  4704. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  4705. Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
  4706. if (CommandStatus != DAC960_V2_NormalCompletion) {
  4707. memset(InquiryUnitSerialNumber,
  4708. 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  4709. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  4710. } else
  4711. memcpy(InquiryUnitSerialNumber,
  4712. Controller->V2.NewInquiryUnitSerialNumber,
  4713. sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
  4714. Controller->V2.NeedDeviceSerialNumberInformation = false;
  4715. }
  4716. if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
  4717. - Controller->V2.NextEventSequenceNumber > 0)
  4718. {
  4719. CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
  4720. CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
  4721. CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
  4722. Controller->V2.NextEventSequenceNumber >> 16;
  4723. CommandMailbox->GetEvent.ControllerNumber = 0;
  4724. CommandMailbox->GetEvent.IOCTL_Opcode =
  4725. DAC960_V2_GetEvent;
  4726. CommandMailbox->GetEvent.EventSequenceNumberLow16 =
  4727. Controller->V2.NextEventSequenceNumber & 0xFFFF;
  4728. CommandMailbox->GetEvent.DataTransferMemoryAddress
  4729. .ScatterGatherSegments[0]
  4730. .SegmentDataPointer =
  4731. Controller->V2.EventDMA;
  4732. CommandMailbox->GetEvent.DataTransferMemoryAddress
  4733. .ScatterGatherSegments[0]
  4734. .SegmentByteCount =
  4735. CommandMailbox->GetEvent.DataTransferSize;
  4736. DAC960_QueueCommand(Command);
  4737. return;
  4738. }
  4739. if (Controller->V2.NeedPhysicalDeviceInformation)
  4740. {
  4741. if (Controller->V2.NeedDeviceSerialNumberInformation)
  4742. {
  4743. DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
  4744. Controller->V2.NewInquiryUnitSerialNumber;
  4745. InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
  4746. DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
  4747. Controller->V2.NewPhysicalDeviceInformation->Channel,
  4748. Controller->V2.NewPhysicalDeviceInformation->TargetID,
  4749. Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
  4750. DAC960_QueueCommand(Command);
  4751. return;
  4752. }
  4753. if (Controller->V2.StartPhysicalDeviceInformationScan)
  4754. {
  4755. Controller->V2.PhysicalDeviceIndex = 0;
  4756. Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
  4757. Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
  4758. Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
  4759. Controller->V2.StartPhysicalDeviceInformationScan = false;
  4760. }
  4761. CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
  4762. CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
  4763. sizeof(DAC960_V2_PhysicalDeviceInfo_T);
  4764. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
  4765. Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
  4766. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
  4767. Controller->V2.NewPhysicalDeviceInformation->TargetID;
  4768. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
  4769. Controller->V2.NewPhysicalDeviceInformation->Channel;
  4770. CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
  4771. DAC960_V2_GetPhysicalDeviceInfoValid;
  4772. CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
  4773. .ScatterGatherSegments[0]
  4774. .SegmentDataPointer =
  4775. Controller->V2.NewPhysicalDeviceInformationDMA;
  4776. CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
  4777. .ScatterGatherSegments[0]
  4778. .SegmentByteCount =
  4779. CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
  4780. DAC960_QueueCommand(Command);
  4781. return;
  4782. }
  4783. if (Controller->V2.NeedLogicalDeviceInformation)
  4784. {
  4785. if (Controller->V2.StartLogicalDeviceInformationScan)
  4786. {
  4787. int LogicalDriveNumber;
  4788. for (LogicalDriveNumber = 0;
  4789. LogicalDriveNumber < DAC960_MaxLogicalDrives;
  4790. LogicalDriveNumber++)
  4791. Controller->V2.LogicalDriveFoundDuringScan
  4792. [LogicalDriveNumber] = false;
  4793. Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
  4794. Controller->V2.StartLogicalDeviceInformationScan = false;
  4795. }
  4796. CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
  4797. CommandMailbox->LogicalDeviceInfo.DataTransferSize =
  4798. sizeof(DAC960_V2_LogicalDeviceInfo_T);
  4799. CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
  4800. Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
  4801. CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
  4802. DAC960_V2_GetLogicalDeviceInfoValid;
  4803. CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
  4804. .ScatterGatherSegments[0]
  4805. .SegmentDataPointer =
  4806. Controller->V2.NewLogicalDeviceInformationDMA;
  4807. CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
  4808. .ScatterGatherSegments[0]
  4809. .SegmentByteCount =
  4810. CommandMailbox->LogicalDeviceInfo.DataTransferSize;
  4811. DAC960_QueueCommand(Command);
  4812. return;
  4813. }
  4814. Controller->MonitoringTimerCount++;
  4815. Controller->MonitoringTimer.expires =
  4816. jiffies + DAC960_HealthStatusMonitoringInterval;
  4817. add_timer(&Controller->MonitoringTimer);
  4818. }
  4819. if (CommandType == DAC960_ImmediateCommand)
  4820. {
  4821. complete(Command->Completion);
  4822. Command->Completion = NULL;
  4823. return;
  4824. }
  4825. if (CommandType == DAC960_QueuedCommand)
  4826. {
  4827. DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
  4828. KernelCommand->CommandStatus = CommandStatus;
  4829. KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
  4830. KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
  4831. Command->V2.KernelCommand = NULL;
  4832. DAC960_DeallocateCommand(Command);
  4833. KernelCommand->CompletionFunction(KernelCommand);
  4834. return;
  4835. }
  4836. /*
  4837. Queue a Status Monitoring Command to the Controller using the just
  4838. completed Command if one was deferred previously due to lack of a
  4839. free Command when the Monitoring Timer Function was called.
  4840. */
  4841. if (Controller->MonitoringCommandDeferred)
  4842. {
  4843. Controller->MonitoringCommandDeferred = false;
  4844. DAC960_V2_QueueMonitoringCommand(Command);
  4845. return;
  4846. }
  4847. /*
  4848. Deallocate the Command.
  4849. */
  4850. DAC960_DeallocateCommand(Command);
  4851. /*
  4852. Wake up any processes waiting on a free Command.
  4853. */
  4854. wake_up(&Controller->CommandWaitQueue);
  4855. }
  4856. /*
  4857. DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
  4858. Controllers.
  4859. */
  4860. static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
  4861. void *DeviceIdentifier,
  4862. struct pt_regs *InterruptRegisters)
  4863. {
  4864. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  4865. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  4866. DAC960_V2_StatusMailbox_T *NextStatusMailbox;
  4867. unsigned long flags;
  4868. spin_lock_irqsave(&Controller->queue_lock, flags);
  4869. DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
  4870. NextStatusMailbox = Controller->V2.NextStatusMailbox;
  4871. while (NextStatusMailbox->Fields.CommandIdentifier > 0)
  4872. {
  4873. DAC960_V2_CommandIdentifier_T CommandIdentifier =
  4874. NextStatusMailbox->Fields.CommandIdentifier;
  4875. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  4876. Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
  4877. Command->V2.RequestSenseLength =
  4878. NextStatusMailbox->Fields.RequestSenseLength;
  4879. Command->V2.DataTransferResidue =
  4880. NextStatusMailbox->Fields.DataTransferResidue;
  4881. NextStatusMailbox->Words[0] = 0;
  4882. if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
  4883. NextStatusMailbox = Controller->V2.FirstStatusMailbox;
  4884. DAC960_V2_ProcessCompletedCommand(Command);
  4885. }
  4886. Controller->V2.NextStatusMailbox = NextStatusMailbox;
  4887. /*
  4888. Attempt to remove additional I/O Requests from the Controller's
  4889. I/O Request Queue and queue them to the Controller.
  4890. */
  4891. DAC960_ProcessRequest(Controller);
  4892. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  4893. return IRQ_HANDLED;
  4894. }
  4895. /*
  4896. DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
  4897. Controllers.
  4898. */
  4899. static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
  4900. void *DeviceIdentifier,
  4901. struct pt_regs *InterruptRegisters)
  4902. {
  4903. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  4904. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  4905. DAC960_V2_StatusMailbox_T *NextStatusMailbox;
  4906. unsigned long flags;
  4907. spin_lock_irqsave(&Controller->queue_lock, flags);
  4908. DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
  4909. NextStatusMailbox = Controller->V2.NextStatusMailbox;
  4910. while (NextStatusMailbox->Fields.CommandIdentifier > 0)
  4911. {
  4912. DAC960_V2_CommandIdentifier_T CommandIdentifier =
  4913. NextStatusMailbox->Fields.CommandIdentifier;
  4914. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  4915. Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
  4916. Command->V2.RequestSenseLength =
  4917. NextStatusMailbox->Fields.RequestSenseLength;
  4918. Command->V2.DataTransferResidue =
  4919. NextStatusMailbox->Fields.DataTransferResidue;
  4920. NextStatusMailbox->Words[0] = 0;
  4921. if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
  4922. NextStatusMailbox = Controller->V2.FirstStatusMailbox;
  4923. DAC960_V2_ProcessCompletedCommand(Command);
  4924. }
  4925. Controller->V2.NextStatusMailbox = NextStatusMailbox;
  4926. /*
  4927. Attempt to remove additional I/O Requests from the Controller's
  4928. I/O Request Queue and queue them to the Controller.
  4929. */
  4930. DAC960_ProcessRequest(Controller);
  4931. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  4932. return IRQ_HANDLED;
  4933. }
  4934. /*
  4935. DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
  4936. Controllers.
  4937. */
  4938. static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
  4939. void *DeviceIdentifier,
  4940. struct pt_regs *InterruptRegisters)
  4941. {
  4942. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  4943. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  4944. DAC960_V2_StatusMailbox_T *NextStatusMailbox;
  4945. unsigned long flags;
  4946. spin_lock_irqsave(&Controller->queue_lock, flags);
  4947. DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
  4948. NextStatusMailbox = Controller->V2.NextStatusMailbox;
  4949. while (NextStatusMailbox->Fields.CommandIdentifier > 0)
  4950. {
  4951. DAC960_V2_CommandIdentifier_T CommandIdentifier =
  4952. NextStatusMailbox->Fields.CommandIdentifier;
  4953. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  4954. Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
  4955. Command->V2.RequestSenseLength =
  4956. NextStatusMailbox->Fields.RequestSenseLength;
  4957. Command->V2.DataTransferResidue =
  4958. NextStatusMailbox->Fields.DataTransferResidue;
  4959. NextStatusMailbox->Words[0] = 0;
  4960. if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
  4961. NextStatusMailbox = Controller->V2.FirstStatusMailbox;
  4962. DAC960_V2_ProcessCompletedCommand(Command);
  4963. }
  4964. Controller->V2.NextStatusMailbox = NextStatusMailbox;
  4965. /*
  4966. Attempt to remove additional I/O Requests from the Controller's
  4967. I/O Request Queue and queue them to the Controller.
  4968. */
  4969. DAC960_ProcessRequest(Controller);
  4970. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  4971. return IRQ_HANDLED;
  4972. }
  4973. /*
  4974. DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
  4975. Controllers.
  4976. */
  4977. static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
  4978. void *DeviceIdentifier,
  4979. struct pt_regs *InterruptRegisters)
  4980. {
  4981. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  4982. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  4983. DAC960_V1_StatusMailbox_T *NextStatusMailbox;
  4984. unsigned long flags;
  4985. spin_lock_irqsave(&Controller->queue_lock, flags);
  4986. DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
  4987. NextStatusMailbox = Controller->V1.NextStatusMailbox;
  4988. while (NextStatusMailbox->Fields.Valid)
  4989. {
  4990. DAC960_V1_CommandIdentifier_T CommandIdentifier =
  4991. NextStatusMailbox->Fields.CommandIdentifier;
  4992. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  4993. Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
  4994. NextStatusMailbox->Word = 0;
  4995. if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
  4996. NextStatusMailbox = Controller->V1.FirstStatusMailbox;
  4997. DAC960_V1_ProcessCompletedCommand(Command);
  4998. }
  4999. Controller->V1.NextStatusMailbox = NextStatusMailbox;
  5000. /*
  5001. Attempt to remove additional I/O Requests from the Controller's
  5002. I/O Request Queue and queue them to the Controller.
  5003. */
  5004. DAC960_ProcessRequest(Controller);
  5005. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5006. return IRQ_HANDLED;
  5007. }
  5008. /*
  5009. DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
  5010. Controllers.
  5011. */
  5012. static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
  5013. void *DeviceIdentifier,
  5014. struct pt_regs *InterruptRegisters)
  5015. {
  5016. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  5017. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  5018. DAC960_V1_StatusMailbox_T *NextStatusMailbox;
  5019. unsigned long flags;
  5020. spin_lock_irqsave(&Controller->queue_lock, flags);
  5021. DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
  5022. NextStatusMailbox = Controller->V1.NextStatusMailbox;
  5023. while (NextStatusMailbox->Fields.Valid)
  5024. {
  5025. DAC960_V1_CommandIdentifier_T CommandIdentifier =
  5026. NextStatusMailbox->Fields.CommandIdentifier;
  5027. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  5028. Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
  5029. NextStatusMailbox->Word = 0;
  5030. if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
  5031. NextStatusMailbox = Controller->V1.FirstStatusMailbox;
  5032. DAC960_V1_ProcessCompletedCommand(Command);
  5033. }
  5034. Controller->V1.NextStatusMailbox = NextStatusMailbox;
  5035. /*
  5036. Attempt to remove additional I/O Requests from the Controller's
  5037. I/O Request Queue and queue them to the Controller.
  5038. */
  5039. DAC960_ProcessRequest(Controller);
  5040. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5041. return IRQ_HANDLED;
  5042. }
  5043. /*
  5044. DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
  5045. Controllers.
  5046. */
  5047. static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
  5048. void *DeviceIdentifier,
  5049. struct pt_regs *InterruptRegisters)
  5050. {
  5051. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  5052. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  5053. unsigned long flags;
  5054. spin_lock_irqsave(&Controller->queue_lock, flags);
  5055. while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
  5056. {
  5057. DAC960_V1_CommandIdentifier_T CommandIdentifier =
  5058. DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
  5059. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  5060. Command->V1.CommandStatus =
  5061. DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
  5062. DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
  5063. DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
  5064. DAC960_V1_ProcessCompletedCommand(Command);
  5065. }
  5066. /*
  5067. Attempt to remove additional I/O Requests from the Controller's
  5068. I/O Request Queue and queue them to the Controller.
  5069. */
  5070. DAC960_ProcessRequest(Controller);
  5071. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5072. return IRQ_HANDLED;
  5073. }
  5074. /*
  5075. DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
  5076. Controllers.
  5077. Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
  5078. on the data having been placed into DAC960_Controller_T, rather than
  5079. an arbitrary buffer.
  5080. */
  5081. static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
  5082. void *DeviceIdentifier,
  5083. struct pt_regs *InterruptRegisters)
  5084. {
  5085. DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier;
  5086. void __iomem *ControllerBaseAddress = Controller->BaseAddress;
  5087. unsigned long flags;
  5088. spin_lock_irqsave(&Controller->queue_lock, flags);
  5089. while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
  5090. {
  5091. DAC960_V1_CommandIdentifier_T CommandIdentifier =
  5092. DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
  5093. DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
  5094. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  5095. DAC960_V1_CommandOpcode_T CommandOpcode =
  5096. CommandMailbox->Common.CommandOpcode;
  5097. Command->V1.CommandStatus =
  5098. DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
  5099. DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
  5100. DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
  5101. switch (CommandOpcode)
  5102. {
  5103. case DAC960_V1_Enquiry_Old:
  5104. Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
  5105. DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
  5106. break;
  5107. case DAC960_V1_GetDeviceState_Old:
  5108. Command->V1.CommandMailbox.Common.CommandOpcode =
  5109. DAC960_V1_GetDeviceState;
  5110. DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
  5111. break;
  5112. case DAC960_V1_Read_Old:
  5113. Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
  5114. DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
  5115. break;
  5116. case DAC960_V1_Write_Old:
  5117. Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
  5118. DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
  5119. break;
  5120. case DAC960_V1_ReadWithScatterGather_Old:
  5121. Command->V1.CommandMailbox.Common.CommandOpcode =
  5122. DAC960_V1_ReadWithScatterGather;
  5123. DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
  5124. break;
  5125. case DAC960_V1_WriteWithScatterGather_Old:
  5126. Command->V1.CommandMailbox.Common.CommandOpcode =
  5127. DAC960_V1_WriteWithScatterGather;
  5128. DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
  5129. break;
  5130. default:
  5131. break;
  5132. }
  5133. DAC960_V1_ProcessCompletedCommand(Command);
  5134. }
  5135. /*
  5136. Attempt to remove additional I/O Requests from the Controller's
  5137. I/O Request Queue and queue them to the Controller.
  5138. */
  5139. DAC960_ProcessRequest(Controller);
  5140. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5141. return IRQ_HANDLED;
  5142. }
  5143. /*
  5144. DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
  5145. Firmware Controllers.
  5146. */
  5147. static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
  5148. {
  5149. DAC960_Controller_T *Controller = Command->Controller;
  5150. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  5151. DAC960_V1_ClearCommand(Command);
  5152. Command->CommandType = DAC960_MonitoringCommand;
  5153. CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
  5154. CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
  5155. DAC960_QueueCommand(Command);
  5156. }
  5157. /*
  5158. DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
  5159. Firmware Controllers.
  5160. */
  5161. static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
  5162. {
  5163. DAC960_Controller_T *Controller = Command->Controller;
  5164. DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
  5165. DAC960_V2_ClearCommand(Command);
  5166. Command->CommandType = DAC960_MonitoringCommand;
  5167. CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
  5168. CommandMailbox->ControllerInfo.CommandControlBits
  5169. .DataTransferControllerToHost = true;
  5170. CommandMailbox->ControllerInfo.CommandControlBits
  5171. .NoAutoRequestSense = true;
  5172. CommandMailbox->ControllerInfo.DataTransferSize =
  5173. sizeof(DAC960_V2_ControllerInfo_T);
  5174. CommandMailbox->ControllerInfo.ControllerNumber = 0;
  5175. CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
  5176. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  5177. .ScatterGatherSegments[0]
  5178. .SegmentDataPointer =
  5179. Controller->V2.NewControllerInformationDMA;
  5180. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  5181. .ScatterGatherSegments[0]
  5182. .SegmentByteCount =
  5183. CommandMailbox->ControllerInfo.DataTransferSize;
  5184. DAC960_QueueCommand(Command);
  5185. }
  5186. /*
  5187. DAC960_MonitoringTimerFunction is the timer function for monitoring
  5188. the status of DAC960 Controllers.
  5189. */
  5190. static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
  5191. {
  5192. DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
  5193. DAC960_Command_T *Command;
  5194. unsigned long flags;
  5195. if (Controller->FirmwareType == DAC960_V1_Controller)
  5196. {
  5197. spin_lock_irqsave(&Controller->queue_lock, flags);
  5198. /*
  5199. Queue a Status Monitoring Command to Controller.
  5200. */
  5201. Command = DAC960_AllocateCommand(Controller);
  5202. if (Command != NULL)
  5203. DAC960_V1_QueueMonitoringCommand(Command);
  5204. else Controller->MonitoringCommandDeferred = true;
  5205. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5206. }
  5207. else
  5208. {
  5209. DAC960_V2_ControllerInfo_T *ControllerInfo =
  5210. &Controller->V2.ControllerInformation;
  5211. unsigned int StatusChangeCounter =
  5212. Controller->V2.HealthStatusBuffer->StatusChangeCounter;
  5213. boolean ForceMonitoringCommand = false;
  5214. if (jiffies - Controller->SecondaryMonitoringTime
  5215. > DAC960_SecondaryMonitoringInterval)
  5216. {
  5217. int LogicalDriveNumber;
  5218. for (LogicalDriveNumber = 0;
  5219. LogicalDriveNumber < DAC960_MaxLogicalDrives;
  5220. LogicalDriveNumber++)
  5221. {
  5222. DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
  5223. Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
  5224. if (LogicalDeviceInfo == NULL) continue;
  5225. if (!LogicalDeviceInfo->LogicalDeviceControl
  5226. .LogicalDeviceInitialized)
  5227. {
  5228. ForceMonitoringCommand = true;
  5229. break;
  5230. }
  5231. }
  5232. Controller->SecondaryMonitoringTime = jiffies;
  5233. }
  5234. if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
  5235. Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
  5236. == Controller->V2.NextEventSequenceNumber &&
  5237. (ControllerInfo->BackgroundInitializationsActive +
  5238. ControllerInfo->LogicalDeviceInitializationsActive +
  5239. ControllerInfo->PhysicalDeviceInitializationsActive +
  5240. ControllerInfo->ConsistencyChecksActive +
  5241. ControllerInfo->RebuildsActive +
  5242. ControllerInfo->OnlineExpansionsActive == 0 ||
  5243. jiffies - Controller->PrimaryMonitoringTime
  5244. < DAC960_MonitoringTimerInterval) &&
  5245. !ForceMonitoringCommand)
  5246. {
  5247. Controller->MonitoringTimer.expires =
  5248. jiffies + DAC960_HealthStatusMonitoringInterval;
  5249. add_timer(&Controller->MonitoringTimer);
  5250. return;
  5251. }
  5252. Controller->V2.StatusChangeCounter = StatusChangeCounter;
  5253. Controller->PrimaryMonitoringTime = jiffies;
  5254. spin_lock_irqsave(&Controller->queue_lock, flags);
  5255. /*
  5256. Queue a Status Monitoring Command to Controller.
  5257. */
  5258. Command = DAC960_AllocateCommand(Controller);
  5259. if (Command != NULL)
  5260. DAC960_V2_QueueMonitoringCommand(Command);
  5261. else Controller->MonitoringCommandDeferred = true;
  5262. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5263. /*
  5264. Wake up any processes waiting on a Health Status Buffer change.
  5265. */
  5266. wake_up(&Controller->HealthStatusWaitQueue);
  5267. }
  5268. }
  5269. /*
  5270. DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
  5271. additional bytes in the Combined Status Buffer and grows the buffer if
  5272. necessary. It returns true if there is enough room and false otherwise.
  5273. */
  5274. static boolean DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
  5275. unsigned int ByteCount)
  5276. {
  5277. unsigned char *NewStatusBuffer;
  5278. if (Controller->InitialStatusLength + 1 +
  5279. Controller->CurrentStatusLength + ByteCount + 1 <=
  5280. Controller->CombinedStatusBufferLength)
  5281. return true;
  5282. if (Controller->CombinedStatusBufferLength == 0)
  5283. {
  5284. unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
  5285. while (NewStatusBufferLength < ByteCount)
  5286. NewStatusBufferLength *= 2;
  5287. Controller->CombinedStatusBuffer =
  5288. (unsigned char *) kmalloc(NewStatusBufferLength, GFP_ATOMIC);
  5289. if (Controller->CombinedStatusBuffer == NULL) return false;
  5290. Controller->CombinedStatusBufferLength = NewStatusBufferLength;
  5291. return true;
  5292. }
  5293. NewStatusBuffer = (unsigned char *)
  5294. kmalloc(2 * Controller->CombinedStatusBufferLength, GFP_ATOMIC);
  5295. if (NewStatusBuffer == NULL)
  5296. {
  5297. DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
  5298. Controller);
  5299. return false;
  5300. }
  5301. memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
  5302. Controller->CombinedStatusBufferLength);
  5303. kfree(Controller->CombinedStatusBuffer);
  5304. Controller->CombinedStatusBuffer = NewStatusBuffer;
  5305. Controller->CombinedStatusBufferLength *= 2;
  5306. Controller->CurrentStatusBuffer =
  5307. &NewStatusBuffer[Controller->InitialStatusLength + 1];
  5308. return true;
  5309. }
  5310. /*
  5311. DAC960_Message prints Driver Messages.
  5312. */
  5313. static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
  5314. unsigned char *Format,
  5315. DAC960_Controller_T *Controller,
  5316. ...)
  5317. {
  5318. static unsigned char Buffer[DAC960_LineBufferSize];
  5319. static boolean BeginningOfLine = true;
  5320. va_list Arguments;
  5321. int Length = 0;
  5322. va_start(Arguments, Controller);
  5323. Length = vsprintf(Buffer, Format, Arguments);
  5324. va_end(Arguments);
  5325. if (Controller == NULL)
  5326. printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
  5327. DAC960_ControllerCount, Buffer);
  5328. else if (MessageLevel == DAC960_AnnounceLevel ||
  5329. MessageLevel == DAC960_InfoLevel)
  5330. {
  5331. if (!Controller->ControllerInitialized)
  5332. {
  5333. if (DAC960_CheckStatusBuffer(Controller, Length))
  5334. {
  5335. strcpy(&Controller->CombinedStatusBuffer
  5336. [Controller->InitialStatusLength],
  5337. Buffer);
  5338. Controller->InitialStatusLength += Length;
  5339. Controller->CurrentStatusBuffer =
  5340. &Controller->CombinedStatusBuffer
  5341. [Controller->InitialStatusLength + 1];
  5342. }
  5343. if (MessageLevel == DAC960_AnnounceLevel)
  5344. {
  5345. static int AnnouncementLines = 0;
  5346. if (++AnnouncementLines <= 2)
  5347. printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
  5348. Buffer);
  5349. }
  5350. else
  5351. {
  5352. if (BeginningOfLine)
  5353. {
  5354. if (Buffer[0] != '\n' || Length > 1)
  5355. printk("%sDAC960#%d: %s",
  5356. DAC960_MessageLevelMap[MessageLevel],
  5357. Controller->ControllerNumber, Buffer);
  5358. }
  5359. else printk("%s", Buffer);
  5360. }
  5361. }
  5362. else if (DAC960_CheckStatusBuffer(Controller, Length))
  5363. {
  5364. strcpy(&Controller->CurrentStatusBuffer[
  5365. Controller->CurrentStatusLength], Buffer);
  5366. Controller->CurrentStatusLength += Length;
  5367. }
  5368. }
  5369. else if (MessageLevel == DAC960_ProgressLevel)
  5370. {
  5371. strcpy(Controller->ProgressBuffer, Buffer);
  5372. Controller->ProgressBufferLength = Length;
  5373. if (Controller->EphemeralProgressMessage)
  5374. {
  5375. if (jiffies - Controller->LastProgressReportTime
  5376. >= DAC960_ProgressReportingInterval)
  5377. {
  5378. printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
  5379. Controller->ControllerNumber, Buffer);
  5380. Controller->LastProgressReportTime = jiffies;
  5381. }
  5382. }
  5383. else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
  5384. Controller->ControllerNumber, Buffer);
  5385. }
  5386. else if (MessageLevel == DAC960_UserCriticalLevel)
  5387. {
  5388. strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
  5389. Buffer);
  5390. Controller->UserStatusLength += Length;
  5391. if (Buffer[0] != '\n' || Length > 1)
  5392. printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
  5393. Controller->ControllerNumber, Buffer);
  5394. }
  5395. else
  5396. {
  5397. if (BeginningOfLine)
  5398. printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
  5399. Controller->ControllerNumber, Buffer);
  5400. else printk("%s", Buffer);
  5401. }
  5402. BeginningOfLine = (Buffer[Length-1] == '\n');
  5403. }
  5404. /*
  5405. DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
  5406. Channel:TargetID specification from a User Command string. It updates
  5407. Channel and TargetID and returns true on success and false on failure.
  5408. */
  5409. static boolean DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
  5410. char *UserCommandString,
  5411. unsigned char *Channel,
  5412. unsigned char *TargetID)
  5413. {
  5414. char *NewUserCommandString = UserCommandString;
  5415. unsigned long XChannel, XTargetID;
  5416. while (*UserCommandString == ' ') UserCommandString++;
  5417. if (UserCommandString == NewUserCommandString)
  5418. return false;
  5419. XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
  5420. if (NewUserCommandString == UserCommandString ||
  5421. *NewUserCommandString != ':' ||
  5422. XChannel >= Controller->Channels)
  5423. return false;
  5424. UserCommandString = ++NewUserCommandString;
  5425. XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
  5426. if (NewUserCommandString == UserCommandString ||
  5427. *NewUserCommandString != '\0' ||
  5428. XTargetID >= Controller->Targets)
  5429. return false;
  5430. *Channel = XChannel;
  5431. *TargetID = XTargetID;
  5432. return true;
  5433. }
  5434. /*
  5435. DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
  5436. specification from a User Command string. It updates LogicalDriveNumber and
  5437. returns true on success and false on failure.
  5438. */
  5439. static boolean DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
  5440. char *UserCommandString,
  5441. unsigned char *LogicalDriveNumber)
  5442. {
  5443. char *NewUserCommandString = UserCommandString;
  5444. unsigned long XLogicalDriveNumber;
  5445. while (*UserCommandString == ' ') UserCommandString++;
  5446. if (UserCommandString == NewUserCommandString)
  5447. return false;
  5448. XLogicalDriveNumber =
  5449. simple_strtoul(UserCommandString, &NewUserCommandString, 10);
  5450. if (NewUserCommandString == UserCommandString ||
  5451. *NewUserCommandString != '\0' ||
  5452. XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
  5453. return false;
  5454. *LogicalDriveNumber = XLogicalDriveNumber;
  5455. return true;
  5456. }
  5457. /*
  5458. DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
  5459. DAC960 V1 Firmware Controllers.
  5460. */
  5461. static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
  5462. DAC960_Command_T *Command,
  5463. unsigned char Channel,
  5464. unsigned char TargetID,
  5465. DAC960_V1_PhysicalDeviceState_T
  5466. DeviceState,
  5467. const unsigned char *DeviceStateString)
  5468. {
  5469. DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
  5470. CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
  5471. CommandMailbox->Type3D.Channel = Channel;
  5472. CommandMailbox->Type3D.TargetID = TargetID;
  5473. CommandMailbox->Type3D.DeviceState = DeviceState;
  5474. CommandMailbox->Type3D.Modifier = 0;
  5475. DAC960_ExecuteCommand(Command);
  5476. switch (Command->V1.CommandStatus)
  5477. {
  5478. case DAC960_V1_NormalCompletion:
  5479. DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
  5480. DeviceStateString, Channel, TargetID);
  5481. break;
  5482. case DAC960_V1_UnableToStartDevice:
  5483. DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
  5484. "Unable to Start Device\n", Controller,
  5485. DeviceStateString, Channel, TargetID);
  5486. break;
  5487. case DAC960_V1_NoDeviceAtAddress:
  5488. DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
  5489. "No Device at Address\n", Controller,
  5490. DeviceStateString, Channel, TargetID);
  5491. break;
  5492. case DAC960_V1_InvalidChannelOrTargetOrModifier:
  5493. DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
  5494. "Invalid Channel or Target or Modifier\n",
  5495. Controller, DeviceStateString, Channel, TargetID);
  5496. break;
  5497. case DAC960_V1_ChannelBusy:
  5498. DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
  5499. "Channel Busy\n", Controller,
  5500. DeviceStateString, Channel, TargetID);
  5501. break;
  5502. default:
  5503. DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
  5504. "Unexpected Status %04X\n", Controller,
  5505. DeviceStateString, Channel, TargetID,
  5506. Command->V1.CommandStatus);
  5507. break;
  5508. }
  5509. }
  5510. /*
  5511. DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
  5512. Controllers.
  5513. */
  5514. static boolean DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
  5515. unsigned char *UserCommand)
  5516. {
  5517. DAC960_Command_T *Command;
  5518. DAC960_V1_CommandMailbox_T *CommandMailbox;
  5519. unsigned long flags;
  5520. unsigned char Channel, TargetID, LogicalDriveNumber;
  5521. spin_lock_irqsave(&Controller->queue_lock, flags);
  5522. while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
  5523. DAC960_WaitForCommand(Controller);
  5524. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5525. Controller->UserStatusLength = 0;
  5526. DAC960_V1_ClearCommand(Command);
  5527. Command->CommandType = DAC960_ImmediateCommand;
  5528. CommandMailbox = &Command->V1.CommandMailbox;
  5529. if (strcmp(UserCommand, "flush-cache") == 0)
  5530. {
  5531. CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
  5532. DAC960_ExecuteCommand(Command);
  5533. DAC960_UserCritical("Cache Flush Completed\n", Controller);
  5534. }
  5535. else if (strncmp(UserCommand, "kill", 4) == 0 &&
  5536. DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
  5537. &Channel, &TargetID))
  5538. {
  5539. DAC960_V1_DeviceState_T *DeviceState =
  5540. &Controller->V1.DeviceState[Channel][TargetID];
  5541. if (DeviceState->Present &&
  5542. DeviceState->DeviceType == DAC960_V1_DiskType &&
  5543. DeviceState->DeviceState != DAC960_V1_Device_Dead)
  5544. DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
  5545. DAC960_V1_Device_Dead, "Kill");
  5546. else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
  5547. Controller, Channel, TargetID);
  5548. }
  5549. else if (strncmp(UserCommand, "make-online", 11) == 0 &&
  5550. DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
  5551. &Channel, &TargetID))
  5552. {
  5553. DAC960_V1_DeviceState_T *DeviceState =
  5554. &Controller->V1.DeviceState[Channel][TargetID];
  5555. if (DeviceState->Present &&
  5556. DeviceState->DeviceType == DAC960_V1_DiskType &&
  5557. DeviceState->DeviceState == DAC960_V1_Device_Dead)
  5558. DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
  5559. DAC960_V1_Device_Online, "Make Online");
  5560. else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
  5561. Controller, Channel, TargetID);
  5562. }
  5563. else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
  5564. DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
  5565. &Channel, &TargetID))
  5566. {
  5567. DAC960_V1_DeviceState_T *DeviceState =
  5568. &Controller->V1.DeviceState[Channel][TargetID];
  5569. if (DeviceState->Present &&
  5570. DeviceState->DeviceType == DAC960_V1_DiskType &&
  5571. DeviceState->DeviceState == DAC960_V1_Device_Dead)
  5572. DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
  5573. DAC960_V1_Device_Standby, "Make Standby");
  5574. else DAC960_UserCritical("Make Standby of Physical "
  5575. "Device %d:%d Illegal\n",
  5576. Controller, Channel, TargetID);
  5577. }
  5578. else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
  5579. DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
  5580. &Channel, &TargetID))
  5581. {
  5582. CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
  5583. CommandMailbox->Type3D.Channel = Channel;
  5584. CommandMailbox->Type3D.TargetID = TargetID;
  5585. DAC960_ExecuteCommand(Command);
  5586. switch (Command->V1.CommandStatus)
  5587. {
  5588. case DAC960_V1_NormalCompletion:
  5589. DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
  5590. Controller, Channel, TargetID);
  5591. break;
  5592. case DAC960_V1_AttemptToRebuildOnlineDrive:
  5593. DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
  5594. "Attempt to Rebuild Online or "
  5595. "Unresponsive Drive\n",
  5596. Controller, Channel, TargetID);
  5597. break;
  5598. case DAC960_V1_NewDiskFailedDuringRebuild:
  5599. DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
  5600. "New Disk Failed During Rebuild\n",
  5601. Controller, Channel, TargetID);
  5602. break;
  5603. case DAC960_V1_InvalidDeviceAddress:
  5604. DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
  5605. "Invalid Device Address\n",
  5606. Controller, Channel, TargetID);
  5607. break;
  5608. case DAC960_V1_RebuildOrCheckAlreadyInProgress:
  5609. DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
  5610. "Rebuild or Consistency Check Already "
  5611. "in Progress\n", Controller, Channel, TargetID);
  5612. break;
  5613. default:
  5614. DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
  5615. "Unexpected Status %04X\n", Controller,
  5616. Channel, TargetID, Command->V1.CommandStatus);
  5617. break;
  5618. }
  5619. }
  5620. else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
  5621. DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
  5622. &LogicalDriveNumber))
  5623. {
  5624. CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
  5625. CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
  5626. CommandMailbox->Type3C.AutoRestore = true;
  5627. DAC960_ExecuteCommand(Command);
  5628. switch (Command->V1.CommandStatus)
  5629. {
  5630. case DAC960_V1_NormalCompletion:
  5631. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5632. "(/dev/rd/c%dd%d) Initiated\n",
  5633. Controller, LogicalDriveNumber,
  5634. Controller->ControllerNumber,
  5635. LogicalDriveNumber);
  5636. break;
  5637. case DAC960_V1_DependentDiskIsDead:
  5638. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5639. "(/dev/rd/c%dd%d) Failed - "
  5640. "Dependent Physical Device is DEAD\n",
  5641. Controller, LogicalDriveNumber,
  5642. Controller->ControllerNumber,
  5643. LogicalDriveNumber);
  5644. break;
  5645. case DAC960_V1_InvalidOrNonredundantLogicalDrive:
  5646. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5647. "(/dev/rd/c%dd%d) Failed - "
  5648. "Invalid or Nonredundant Logical Drive\n",
  5649. Controller, LogicalDriveNumber,
  5650. Controller->ControllerNumber,
  5651. LogicalDriveNumber);
  5652. break;
  5653. case DAC960_V1_RebuildOrCheckAlreadyInProgress:
  5654. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5655. "(/dev/rd/c%dd%d) Failed - Rebuild or "
  5656. "Consistency Check Already in Progress\n",
  5657. Controller, LogicalDriveNumber,
  5658. Controller->ControllerNumber,
  5659. LogicalDriveNumber);
  5660. break;
  5661. default:
  5662. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5663. "(/dev/rd/c%dd%d) Failed - "
  5664. "Unexpected Status %04X\n",
  5665. Controller, LogicalDriveNumber,
  5666. Controller->ControllerNumber,
  5667. LogicalDriveNumber, Command->V1.CommandStatus);
  5668. break;
  5669. }
  5670. }
  5671. else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
  5672. strcmp(UserCommand, "cancel-consistency-check") == 0)
  5673. {
  5674. /*
  5675. the OldRebuildRateConstant is never actually used
  5676. once its value is retrieved from the controller.
  5677. */
  5678. unsigned char *OldRebuildRateConstant;
  5679. dma_addr_t OldRebuildRateConstantDMA;
  5680. OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
  5681. sizeof(char), &OldRebuildRateConstantDMA);
  5682. if (OldRebuildRateConstant == NULL) {
  5683. DAC960_UserCritical("Cancellation of Rebuild or "
  5684. "Consistency Check Failed - "
  5685. "Out of Memory",
  5686. Controller);
  5687. goto failure;
  5688. }
  5689. CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
  5690. CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
  5691. CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
  5692. DAC960_ExecuteCommand(Command);
  5693. switch (Command->V1.CommandStatus)
  5694. {
  5695. case DAC960_V1_NormalCompletion:
  5696. DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
  5697. Controller);
  5698. break;
  5699. default:
  5700. DAC960_UserCritical("Cancellation of Rebuild or "
  5701. "Consistency Check Failed - "
  5702. "Unexpected Status %04X\n",
  5703. Controller, Command->V1.CommandStatus);
  5704. break;
  5705. }
  5706. failure:
  5707. pci_free_consistent(Controller->PCIDevice, sizeof(char),
  5708. OldRebuildRateConstant, OldRebuildRateConstantDMA);
  5709. }
  5710. else DAC960_UserCritical("Illegal User Command: '%s'\n",
  5711. Controller, UserCommand);
  5712. spin_lock_irqsave(&Controller->queue_lock, flags);
  5713. DAC960_DeallocateCommand(Command);
  5714. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5715. return true;
  5716. }
  5717. /*
  5718. DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
  5719. TargetID into a Logical Device. It returns true on success and false
  5720. on failure.
  5721. */
  5722. static boolean DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
  5723. unsigned char Channel,
  5724. unsigned char TargetID,
  5725. unsigned short
  5726. *LogicalDeviceNumber)
  5727. {
  5728. DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
  5729. DAC960_Controller_T *Controller = Command->Controller;
  5730. CommandMailbox = &Command->V2.CommandMailbox;
  5731. memcpy(&SavedCommandMailbox, CommandMailbox,
  5732. sizeof(DAC960_V2_CommandMailbox_T));
  5733. CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
  5734. CommandMailbox->PhysicalDeviceInfo.CommandControlBits
  5735. .DataTransferControllerToHost = true;
  5736. CommandMailbox->PhysicalDeviceInfo.CommandControlBits
  5737. .NoAutoRequestSense = true;
  5738. CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
  5739. sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
  5740. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
  5741. CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
  5742. CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
  5743. DAC960_V2_TranslatePhysicalToLogicalDevice;
  5744. CommandMailbox->Common.DataTransferMemoryAddress
  5745. .ScatterGatherSegments[0]
  5746. .SegmentDataPointer =
  5747. Controller->V2.PhysicalToLogicalDeviceDMA;
  5748. CommandMailbox->Common.DataTransferMemoryAddress
  5749. .ScatterGatherSegments[0]
  5750. .SegmentByteCount =
  5751. CommandMailbox->Common.DataTransferSize;
  5752. DAC960_ExecuteCommand(Command);
  5753. *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
  5754. memcpy(CommandMailbox, &SavedCommandMailbox,
  5755. sizeof(DAC960_V2_CommandMailbox_T));
  5756. return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
  5757. }
  5758. /*
  5759. DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
  5760. Controllers.
  5761. */
  5762. static boolean DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
  5763. unsigned char *UserCommand)
  5764. {
  5765. DAC960_Command_T *Command;
  5766. DAC960_V2_CommandMailbox_T *CommandMailbox;
  5767. unsigned long flags;
  5768. unsigned char Channel, TargetID, LogicalDriveNumber;
  5769. unsigned short LogicalDeviceNumber;
  5770. spin_lock_irqsave(&Controller->queue_lock, flags);
  5771. while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
  5772. DAC960_WaitForCommand(Controller);
  5773. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5774. Controller->UserStatusLength = 0;
  5775. DAC960_V2_ClearCommand(Command);
  5776. Command->CommandType = DAC960_ImmediateCommand;
  5777. CommandMailbox = &Command->V2.CommandMailbox;
  5778. CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
  5779. CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
  5780. CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
  5781. if (strcmp(UserCommand, "flush-cache") == 0)
  5782. {
  5783. CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
  5784. CommandMailbox->DeviceOperation.OperationDevice =
  5785. DAC960_V2_RAID_Controller;
  5786. DAC960_ExecuteCommand(Command);
  5787. DAC960_UserCritical("Cache Flush Completed\n", Controller);
  5788. }
  5789. else if (strncmp(UserCommand, "kill", 4) == 0 &&
  5790. DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
  5791. &Channel, &TargetID) &&
  5792. DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
  5793. &LogicalDeviceNumber))
  5794. {
  5795. CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
  5796. LogicalDeviceNumber;
  5797. CommandMailbox->SetDeviceState.IOCTL_Opcode =
  5798. DAC960_V2_SetDeviceState;
  5799. CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
  5800. DAC960_V2_Device_Dead;
  5801. DAC960_ExecuteCommand(Command);
  5802. DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
  5803. Controller, Channel, TargetID,
  5804. (Command->V2.CommandStatus
  5805. == DAC960_V2_NormalCompletion
  5806. ? "Succeeded" : "Failed"));
  5807. }
  5808. else if (strncmp(UserCommand, "make-online", 11) == 0 &&
  5809. DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
  5810. &Channel, &TargetID) &&
  5811. DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
  5812. &LogicalDeviceNumber))
  5813. {
  5814. CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
  5815. LogicalDeviceNumber;
  5816. CommandMailbox->SetDeviceState.IOCTL_Opcode =
  5817. DAC960_V2_SetDeviceState;
  5818. CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
  5819. DAC960_V2_Device_Online;
  5820. DAC960_ExecuteCommand(Command);
  5821. DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
  5822. Controller, Channel, TargetID,
  5823. (Command->V2.CommandStatus
  5824. == DAC960_V2_NormalCompletion
  5825. ? "Succeeded" : "Failed"));
  5826. }
  5827. else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
  5828. DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
  5829. &Channel, &TargetID) &&
  5830. DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
  5831. &LogicalDeviceNumber))
  5832. {
  5833. CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
  5834. LogicalDeviceNumber;
  5835. CommandMailbox->SetDeviceState.IOCTL_Opcode =
  5836. DAC960_V2_SetDeviceState;
  5837. CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
  5838. DAC960_V2_Device_Standby;
  5839. DAC960_ExecuteCommand(Command);
  5840. DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
  5841. Controller, Channel, TargetID,
  5842. (Command->V2.CommandStatus
  5843. == DAC960_V2_NormalCompletion
  5844. ? "Succeeded" : "Failed"));
  5845. }
  5846. else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
  5847. DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
  5848. &Channel, &TargetID) &&
  5849. DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
  5850. &LogicalDeviceNumber))
  5851. {
  5852. CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
  5853. LogicalDeviceNumber;
  5854. CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
  5855. DAC960_V2_RebuildDeviceStart;
  5856. DAC960_ExecuteCommand(Command);
  5857. DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
  5858. Controller, Channel, TargetID,
  5859. (Command->V2.CommandStatus
  5860. == DAC960_V2_NormalCompletion
  5861. ? "Initiated" : "Not Initiated"));
  5862. }
  5863. else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
  5864. DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
  5865. &Channel, &TargetID) &&
  5866. DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
  5867. &LogicalDeviceNumber))
  5868. {
  5869. CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
  5870. LogicalDeviceNumber;
  5871. CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
  5872. DAC960_V2_RebuildDeviceStop;
  5873. DAC960_ExecuteCommand(Command);
  5874. DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
  5875. Controller, Channel, TargetID,
  5876. (Command->V2.CommandStatus
  5877. == DAC960_V2_NormalCompletion
  5878. ? "Cancelled" : "Not Cancelled"));
  5879. }
  5880. else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
  5881. DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
  5882. &LogicalDriveNumber))
  5883. {
  5884. CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
  5885. LogicalDriveNumber;
  5886. CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
  5887. DAC960_V2_ConsistencyCheckStart;
  5888. CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
  5889. CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
  5890. DAC960_ExecuteCommand(Command);
  5891. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5892. "(/dev/rd/c%dd%d) %s\n",
  5893. Controller, LogicalDriveNumber,
  5894. Controller->ControllerNumber,
  5895. LogicalDriveNumber,
  5896. (Command->V2.CommandStatus
  5897. == DAC960_V2_NormalCompletion
  5898. ? "Initiated" : "Not Initiated"));
  5899. }
  5900. else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
  5901. DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
  5902. &LogicalDriveNumber))
  5903. {
  5904. CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
  5905. LogicalDriveNumber;
  5906. CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
  5907. DAC960_V2_ConsistencyCheckStop;
  5908. DAC960_ExecuteCommand(Command);
  5909. DAC960_UserCritical("Consistency Check of Logical Drive %d "
  5910. "(/dev/rd/c%dd%d) %s\n",
  5911. Controller, LogicalDriveNumber,
  5912. Controller->ControllerNumber,
  5913. LogicalDriveNumber,
  5914. (Command->V2.CommandStatus
  5915. == DAC960_V2_NormalCompletion
  5916. ? "Cancelled" : "Not Cancelled"));
  5917. }
  5918. else if (strcmp(UserCommand, "perform-discovery") == 0)
  5919. {
  5920. CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
  5921. DAC960_ExecuteCommand(Command);
  5922. DAC960_UserCritical("Discovery %s\n", Controller,
  5923. (Command->V2.CommandStatus
  5924. == DAC960_V2_NormalCompletion
  5925. ? "Initiated" : "Not Initiated"));
  5926. if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
  5927. {
  5928. CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
  5929. CommandMailbox->ControllerInfo.CommandControlBits
  5930. .DataTransferControllerToHost = true;
  5931. CommandMailbox->ControllerInfo.CommandControlBits
  5932. .NoAutoRequestSense = true;
  5933. CommandMailbox->ControllerInfo.DataTransferSize =
  5934. sizeof(DAC960_V2_ControllerInfo_T);
  5935. CommandMailbox->ControllerInfo.ControllerNumber = 0;
  5936. CommandMailbox->ControllerInfo.IOCTL_Opcode =
  5937. DAC960_V2_GetControllerInfo;
  5938. /*
  5939. * How does this NOT race with the queued Monitoring
  5940. * usage of this structure?
  5941. */
  5942. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  5943. .ScatterGatherSegments[0]
  5944. .SegmentDataPointer =
  5945. Controller->V2.NewControllerInformationDMA;
  5946. CommandMailbox->ControllerInfo.DataTransferMemoryAddress
  5947. .ScatterGatherSegments[0]
  5948. .SegmentByteCount =
  5949. CommandMailbox->ControllerInfo.DataTransferSize;
  5950. DAC960_ExecuteCommand(Command);
  5951. while (Controller->V2.NewControllerInformation->PhysicalScanActive)
  5952. {
  5953. DAC960_ExecuteCommand(Command);
  5954. sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
  5955. }
  5956. DAC960_UserCritical("Discovery Completed\n", Controller);
  5957. }
  5958. }
  5959. else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
  5960. Controller->SuppressEnclosureMessages = true;
  5961. else DAC960_UserCritical("Illegal User Command: '%s'\n",
  5962. Controller, UserCommand);
  5963. spin_lock_irqsave(&Controller->queue_lock, flags);
  5964. DAC960_DeallocateCommand(Command);
  5965. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  5966. return true;
  5967. }
  5968. /*
  5969. DAC960_ProcReadStatus implements reading /proc/rd/status.
  5970. */
  5971. static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset,
  5972. int Count, int *EOF, void *Data)
  5973. {
  5974. unsigned char *StatusMessage = "OK\n";
  5975. int ControllerNumber, BytesAvailable;
  5976. for (ControllerNumber = 0;
  5977. ControllerNumber < DAC960_ControllerCount;
  5978. ControllerNumber++)
  5979. {
  5980. DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
  5981. if (Controller == NULL) continue;
  5982. if (Controller->MonitoringAlertMode)
  5983. {
  5984. StatusMessage = "ALERT\n";
  5985. break;
  5986. }
  5987. }
  5988. BytesAvailable = strlen(StatusMessage) - Offset;
  5989. if (Count >= BytesAvailable)
  5990. {
  5991. Count = BytesAvailable;
  5992. *EOF = true;
  5993. }
  5994. if (Count <= 0) return 0;
  5995. *Start = Page;
  5996. memcpy(Page, &StatusMessage[Offset], Count);
  5997. return Count;
  5998. }
  5999. /*
  6000. DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status.
  6001. */
  6002. static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset,
  6003. int Count, int *EOF, void *Data)
  6004. {
  6005. DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
  6006. int BytesAvailable = Controller->InitialStatusLength - Offset;
  6007. if (Count >= BytesAvailable)
  6008. {
  6009. Count = BytesAvailable;
  6010. *EOF = true;
  6011. }
  6012. if (Count <= 0) return 0;
  6013. *Start = Page;
  6014. memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count);
  6015. return Count;
  6016. }
  6017. /*
  6018. DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status.
  6019. */
  6020. static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset,
  6021. int Count, int *EOF, void *Data)
  6022. {
  6023. DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
  6024. unsigned char *StatusMessage =
  6025. "No Rebuild or Consistency Check in Progress\n";
  6026. int ProgressMessageLength = strlen(StatusMessage);
  6027. int BytesAvailable;
  6028. if (jiffies != Controller->LastCurrentStatusTime)
  6029. {
  6030. Controller->CurrentStatusLength = 0;
  6031. DAC960_AnnounceDriver(Controller);
  6032. DAC960_ReportControllerConfiguration(Controller);
  6033. DAC960_ReportDeviceConfiguration(Controller);
  6034. if (Controller->ProgressBufferLength > 0)
  6035. ProgressMessageLength = Controller->ProgressBufferLength;
  6036. if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
  6037. {
  6038. unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
  6039. CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
  6040. CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
  6041. if (Controller->ProgressBufferLength > 0)
  6042. strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
  6043. Controller->ProgressBuffer);
  6044. else
  6045. strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
  6046. StatusMessage);
  6047. Controller->CurrentStatusLength += ProgressMessageLength;
  6048. }
  6049. Controller->LastCurrentStatusTime = jiffies;
  6050. }
  6051. BytesAvailable = Controller->CurrentStatusLength - Offset;
  6052. if (Count >= BytesAvailable)
  6053. {
  6054. Count = BytesAvailable;
  6055. *EOF = true;
  6056. }
  6057. if (Count <= 0) return 0;
  6058. *Start = Page;
  6059. memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count);
  6060. return Count;
  6061. }
  6062. /*
  6063. DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command.
  6064. */
  6065. static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset,
  6066. int Count, int *EOF, void *Data)
  6067. {
  6068. DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
  6069. int BytesAvailable = Controller->UserStatusLength - Offset;
  6070. if (Count >= BytesAvailable)
  6071. {
  6072. Count = BytesAvailable;
  6073. *EOF = true;
  6074. }
  6075. if (Count <= 0) return 0;
  6076. *Start = Page;
  6077. memcpy(Page, &Controller->UserStatusBuffer[Offset], Count);
  6078. return Count;
  6079. }
  6080. /*
  6081. DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command.
  6082. */
  6083. static int DAC960_ProcWriteUserCommand(struct file *file,
  6084. const char __user *Buffer,
  6085. unsigned long Count, void *Data)
  6086. {
  6087. DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data;
  6088. unsigned char CommandBuffer[80];
  6089. int Length;
  6090. if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
  6091. if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
  6092. CommandBuffer[Count] = '\0';
  6093. Length = strlen(CommandBuffer);
  6094. if (CommandBuffer[Length-1] == '\n')
  6095. CommandBuffer[--Length] = '\0';
  6096. if (Controller->FirmwareType == DAC960_V1_Controller)
  6097. return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
  6098. ? Count : -EBUSY);
  6099. else
  6100. return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
  6101. ? Count : -EBUSY);
  6102. }
  6103. /*
  6104. DAC960_CreateProcEntries creates the /proc/rd/... entries for the
  6105. DAC960 Driver.
  6106. */
  6107. static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
  6108. {
  6109. struct proc_dir_entry *StatusProcEntry;
  6110. struct proc_dir_entry *ControllerProcEntry;
  6111. struct proc_dir_entry *UserCommandProcEntry;
  6112. if (DAC960_ProcDirectoryEntry == NULL) {
  6113. DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
  6114. StatusProcEntry = create_proc_read_entry("status", 0,
  6115. DAC960_ProcDirectoryEntry,
  6116. DAC960_ProcReadStatus, NULL);
  6117. }
  6118. sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
  6119. ControllerProcEntry = proc_mkdir(Controller->ControllerName,
  6120. DAC960_ProcDirectoryEntry);
  6121. create_proc_read_entry("initial_status", 0, ControllerProcEntry,
  6122. DAC960_ProcReadInitialStatus, Controller);
  6123. create_proc_read_entry("current_status", 0, ControllerProcEntry,
  6124. DAC960_ProcReadCurrentStatus, Controller);
  6125. UserCommandProcEntry =
  6126. create_proc_read_entry("user_command", S_IWUSR | S_IRUSR,
  6127. ControllerProcEntry, DAC960_ProcReadUserCommand,
  6128. Controller);
  6129. UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand;
  6130. Controller->ControllerProcEntry = ControllerProcEntry;
  6131. }
  6132. /*
  6133. DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
  6134. DAC960 Driver.
  6135. */
  6136. static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
  6137. {
  6138. if (Controller->ControllerProcEntry == NULL)
  6139. return;
  6140. remove_proc_entry("initial_status", Controller->ControllerProcEntry);
  6141. remove_proc_entry("current_status", Controller->ControllerProcEntry);
  6142. remove_proc_entry("user_command", Controller->ControllerProcEntry);
  6143. remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
  6144. Controller->ControllerProcEntry = NULL;
  6145. }
  6146. #ifdef DAC960_GAM_MINOR
  6147. /*
  6148. * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
  6149. */
  6150. static int DAC960_gam_ioctl(struct inode *inode, struct file *file,
  6151. unsigned int Request, unsigned long Argument)
  6152. {
  6153. int ErrorCode = 0;
  6154. if (!capable(CAP_SYS_ADMIN)) return -EACCES;
  6155. switch (Request)
  6156. {
  6157. case DAC960_IOCTL_GET_CONTROLLER_COUNT:
  6158. return DAC960_ControllerCount;
  6159. case DAC960_IOCTL_GET_CONTROLLER_INFO:
  6160. {
  6161. DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
  6162. (DAC960_ControllerInfo_T __user *) Argument;
  6163. DAC960_ControllerInfo_T ControllerInfo;
  6164. DAC960_Controller_T *Controller;
  6165. int ControllerNumber;
  6166. if (UserSpaceControllerInfo == NULL) return -EINVAL;
  6167. ErrorCode = get_user(ControllerNumber,
  6168. &UserSpaceControllerInfo->ControllerNumber);
  6169. if (ErrorCode != 0) return ErrorCode;
  6170. if (ControllerNumber < 0 ||
  6171. ControllerNumber > DAC960_ControllerCount - 1)
  6172. return -ENXIO;
  6173. Controller = DAC960_Controllers[ControllerNumber];
  6174. if (Controller == NULL) return -ENXIO;
  6175. memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
  6176. ControllerInfo.ControllerNumber = ControllerNumber;
  6177. ControllerInfo.FirmwareType = Controller->FirmwareType;
  6178. ControllerInfo.Channels = Controller->Channels;
  6179. ControllerInfo.Targets = Controller->Targets;
  6180. ControllerInfo.PCI_Bus = Controller->Bus;
  6181. ControllerInfo.PCI_Device = Controller->Device;
  6182. ControllerInfo.PCI_Function = Controller->Function;
  6183. ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
  6184. ControllerInfo.PCI_Address = Controller->PCI_Address;
  6185. strcpy(ControllerInfo.ModelName, Controller->ModelName);
  6186. strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
  6187. return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
  6188. sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
  6189. }
  6190. case DAC960_IOCTL_V1_EXECUTE_COMMAND:
  6191. {
  6192. DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
  6193. (DAC960_V1_UserCommand_T __user *) Argument;
  6194. DAC960_V1_UserCommand_T UserCommand;
  6195. DAC960_Controller_T *Controller;
  6196. DAC960_Command_T *Command = NULL;
  6197. DAC960_V1_CommandOpcode_T CommandOpcode;
  6198. DAC960_V1_CommandStatus_T CommandStatus;
  6199. DAC960_V1_DCDB_T DCDB;
  6200. DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
  6201. dma_addr_t DCDB_IOBUFDMA;
  6202. unsigned long flags;
  6203. int ControllerNumber, DataTransferLength;
  6204. unsigned char *DataTransferBuffer = NULL;
  6205. dma_addr_t DataTransferBufferDMA;
  6206. if (UserSpaceUserCommand == NULL) return -EINVAL;
  6207. if (copy_from_user(&UserCommand, UserSpaceUserCommand,
  6208. sizeof(DAC960_V1_UserCommand_T))) {
  6209. ErrorCode = -EFAULT;
  6210. goto Failure1a;
  6211. }
  6212. ControllerNumber = UserCommand.ControllerNumber;
  6213. if (ControllerNumber < 0 ||
  6214. ControllerNumber > DAC960_ControllerCount - 1)
  6215. return -ENXIO;
  6216. Controller = DAC960_Controllers[ControllerNumber];
  6217. if (Controller == NULL) return -ENXIO;
  6218. if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL;
  6219. CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
  6220. DataTransferLength = UserCommand.DataTransferLength;
  6221. if (CommandOpcode & 0x80) return -EINVAL;
  6222. if (CommandOpcode == DAC960_V1_DCDB)
  6223. {
  6224. if (copy_from_user(&DCDB, UserCommand.DCDB,
  6225. sizeof(DAC960_V1_DCDB_T))) {
  6226. ErrorCode = -EFAULT;
  6227. goto Failure1a;
  6228. }
  6229. if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL;
  6230. if (!((DataTransferLength == 0 &&
  6231. DCDB.Direction
  6232. == DAC960_V1_DCDB_NoDataTransfer) ||
  6233. (DataTransferLength > 0 &&
  6234. DCDB.Direction
  6235. == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
  6236. (DataTransferLength < 0 &&
  6237. DCDB.Direction
  6238. == DAC960_V1_DCDB_DataTransferSystemToDevice)))
  6239. return -EINVAL;
  6240. if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
  6241. != abs(DataTransferLength))
  6242. return -EINVAL;
  6243. DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
  6244. sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
  6245. if (DCDB_IOBUF == NULL)
  6246. return -ENOMEM;
  6247. }
  6248. if (DataTransferLength > 0)
  6249. {
  6250. DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
  6251. DataTransferLength, &DataTransferBufferDMA);
  6252. if (DataTransferBuffer == NULL) {
  6253. ErrorCode = -ENOMEM;
  6254. goto Failure1;
  6255. }
  6256. memset(DataTransferBuffer, 0, DataTransferLength);
  6257. }
  6258. else if (DataTransferLength < 0)
  6259. {
  6260. DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
  6261. -DataTransferLength, &DataTransferBufferDMA);
  6262. if (DataTransferBuffer == NULL) {
  6263. ErrorCode = -ENOMEM;
  6264. goto Failure1;
  6265. }
  6266. if (copy_from_user(DataTransferBuffer,
  6267. UserCommand.DataTransferBuffer,
  6268. -DataTransferLength)) {
  6269. ErrorCode = -EFAULT;
  6270. goto Failure1;
  6271. }
  6272. }
  6273. if (CommandOpcode == DAC960_V1_DCDB)
  6274. {
  6275. spin_lock_irqsave(&Controller->queue_lock, flags);
  6276. while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
  6277. DAC960_WaitForCommand(Controller);
  6278. while (Controller->V1.DirectCommandActive[DCDB.Channel]
  6279. [DCDB.TargetID])
  6280. {
  6281. spin_unlock_irq(&Controller->queue_lock);
  6282. __wait_event(Controller->CommandWaitQueue,
  6283. !Controller->V1.DirectCommandActive
  6284. [DCDB.Channel][DCDB.TargetID]);
  6285. spin_lock_irq(&Controller->queue_lock);
  6286. }
  6287. Controller->V1.DirectCommandActive[DCDB.Channel]
  6288. [DCDB.TargetID] = true;
  6289. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  6290. DAC960_V1_ClearCommand(Command);
  6291. Command->CommandType = DAC960_ImmediateCommand;
  6292. memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
  6293. sizeof(DAC960_V1_CommandMailbox_T));
  6294. Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
  6295. DCDB.BusAddress = DataTransferBufferDMA;
  6296. memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
  6297. }
  6298. else
  6299. {
  6300. spin_lock_irqsave(&Controller->queue_lock, flags);
  6301. while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
  6302. DAC960_WaitForCommand(Controller);
  6303. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  6304. DAC960_V1_ClearCommand(Command);
  6305. Command->CommandType = DAC960_ImmediateCommand;
  6306. memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
  6307. sizeof(DAC960_V1_CommandMailbox_T));
  6308. if (DataTransferBuffer != NULL)
  6309. Command->V1.CommandMailbox.Type3.BusAddress =
  6310. DataTransferBufferDMA;
  6311. }
  6312. DAC960_ExecuteCommand(Command);
  6313. CommandStatus = Command->V1.CommandStatus;
  6314. spin_lock_irqsave(&Controller->queue_lock, flags);
  6315. DAC960_DeallocateCommand(Command);
  6316. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  6317. if (DataTransferLength > 0)
  6318. {
  6319. if (copy_to_user(UserCommand.DataTransferBuffer,
  6320. DataTransferBuffer, DataTransferLength)) {
  6321. ErrorCode = -EFAULT;
  6322. goto Failure1;
  6323. }
  6324. }
  6325. if (CommandOpcode == DAC960_V1_DCDB)
  6326. {
  6327. /*
  6328. I don't believe Target or Channel in the DCDB_IOBUF
  6329. should be any different from the contents of DCDB.
  6330. */
  6331. Controller->V1.DirectCommandActive[DCDB.Channel]
  6332. [DCDB.TargetID] = false;
  6333. if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
  6334. sizeof(DAC960_V1_DCDB_T))) {
  6335. ErrorCode = -EFAULT;
  6336. goto Failure1;
  6337. }
  6338. }
  6339. ErrorCode = CommandStatus;
  6340. Failure1:
  6341. if (DataTransferBuffer != NULL)
  6342. pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
  6343. DataTransferBuffer, DataTransferBufferDMA);
  6344. if (DCDB_IOBUF != NULL)
  6345. pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
  6346. DCDB_IOBUF, DCDB_IOBUFDMA);
  6347. Failure1a:
  6348. return ErrorCode;
  6349. }
  6350. case DAC960_IOCTL_V2_EXECUTE_COMMAND:
  6351. {
  6352. DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
  6353. (DAC960_V2_UserCommand_T __user *) Argument;
  6354. DAC960_V2_UserCommand_T UserCommand;
  6355. DAC960_Controller_T *Controller;
  6356. DAC960_Command_T *Command = NULL;
  6357. DAC960_V2_CommandMailbox_T *CommandMailbox;
  6358. DAC960_V2_CommandStatus_T CommandStatus;
  6359. unsigned long flags;
  6360. int ControllerNumber, DataTransferLength;
  6361. int DataTransferResidue, RequestSenseLength;
  6362. unsigned char *DataTransferBuffer = NULL;
  6363. dma_addr_t DataTransferBufferDMA;
  6364. unsigned char *RequestSenseBuffer = NULL;
  6365. dma_addr_t RequestSenseBufferDMA;
  6366. if (UserSpaceUserCommand == NULL) return -EINVAL;
  6367. if (copy_from_user(&UserCommand, UserSpaceUserCommand,
  6368. sizeof(DAC960_V2_UserCommand_T))) {
  6369. ErrorCode = -EFAULT;
  6370. goto Failure2a;
  6371. }
  6372. ControllerNumber = UserCommand.ControllerNumber;
  6373. if (ControllerNumber < 0 ||
  6374. ControllerNumber > DAC960_ControllerCount - 1)
  6375. return -ENXIO;
  6376. Controller = DAC960_Controllers[ControllerNumber];
  6377. if (Controller == NULL) return -ENXIO;
  6378. if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
  6379. DataTransferLength = UserCommand.DataTransferLength;
  6380. if (DataTransferLength > 0)
  6381. {
  6382. DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
  6383. DataTransferLength, &DataTransferBufferDMA);
  6384. if (DataTransferBuffer == NULL) return -ENOMEM;
  6385. memset(DataTransferBuffer, 0, DataTransferLength);
  6386. }
  6387. else if (DataTransferLength < 0)
  6388. {
  6389. DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
  6390. -DataTransferLength, &DataTransferBufferDMA);
  6391. if (DataTransferBuffer == NULL) return -ENOMEM;
  6392. if (copy_from_user(DataTransferBuffer,
  6393. UserCommand.DataTransferBuffer,
  6394. -DataTransferLength)) {
  6395. ErrorCode = -EFAULT;
  6396. goto Failure2;
  6397. }
  6398. }
  6399. RequestSenseLength = UserCommand.RequestSenseLength;
  6400. if (RequestSenseLength > 0)
  6401. {
  6402. RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
  6403. RequestSenseLength, &RequestSenseBufferDMA);
  6404. if (RequestSenseBuffer == NULL)
  6405. {
  6406. ErrorCode = -ENOMEM;
  6407. goto Failure2;
  6408. }
  6409. memset(RequestSenseBuffer, 0, RequestSenseLength);
  6410. }
  6411. spin_lock_irqsave(&Controller->queue_lock, flags);
  6412. while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
  6413. DAC960_WaitForCommand(Controller);
  6414. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  6415. DAC960_V2_ClearCommand(Command);
  6416. Command->CommandType = DAC960_ImmediateCommand;
  6417. CommandMailbox = &Command->V2.CommandMailbox;
  6418. memcpy(CommandMailbox, &UserCommand.CommandMailbox,
  6419. sizeof(DAC960_V2_CommandMailbox_T));
  6420. CommandMailbox->Common.CommandControlBits
  6421. .AdditionalScatterGatherListMemory = false;
  6422. CommandMailbox->Common.CommandControlBits
  6423. .NoAutoRequestSense = true;
  6424. CommandMailbox->Common.DataTransferSize = 0;
  6425. CommandMailbox->Common.DataTransferPageNumber = 0;
  6426. memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
  6427. sizeof(DAC960_V2_DataTransferMemoryAddress_T));
  6428. if (DataTransferLength != 0)
  6429. {
  6430. if (DataTransferLength > 0)
  6431. {
  6432. CommandMailbox->Common.CommandControlBits
  6433. .DataTransferControllerToHost = true;
  6434. CommandMailbox->Common.DataTransferSize = DataTransferLength;
  6435. }
  6436. else
  6437. {
  6438. CommandMailbox->Common.CommandControlBits
  6439. .DataTransferControllerToHost = false;
  6440. CommandMailbox->Common.DataTransferSize = -DataTransferLength;
  6441. }
  6442. CommandMailbox->Common.DataTransferMemoryAddress
  6443. .ScatterGatherSegments[0]
  6444. .SegmentDataPointer = DataTransferBufferDMA;
  6445. CommandMailbox->Common.DataTransferMemoryAddress
  6446. .ScatterGatherSegments[0]
  6447. .SegmentByteCount =
  6448. CommandMailbox->Common.DataTransferSize;
  6449. }
  6450. if (RequestSenseLength > 0)
  6451. {
  6452. CommandMailbox->Common.CommandControlBits
  6453. .NoAutoRequestSense = false;
  6454. CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
  6455. CommandMailbox->Common.RequestSenseBusAddress =
  6456. RequestSenseBufferDMA;
  6457. }
  6458. DAC960_ExecuteCommand(Command);
  6459. CommandStatus = Command->V2.CommandStatus;
  6460. RequestSenseLength = Command->V2.RequestSenseLength;
  6461. DataTransferResidue = Command->V2.DataTransferResidue;
  6462. spin_lock_irqsave(&Controller->queue_lock, flags);
  6463. DAC960_DeallocateCommand(Command);
  6464. spin_unlock_irqrestore(&Controller->queue_lock, flags);
  6465. if (RequestSenseLength > UserCommand.RequestSenseLength)
  6466. RequestSenseLength = UserCommand.RequestSenseLength;
  6467. if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
  6468. &DataTransferResidue,
  6469. sizeof(DataTransferResidue))) {
  6470. ErrorCode = -EFAULT;
  6471. goto Failure2;
  6472. }
  6473. if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
  6474. &RequestSenseLength, sizeof(RequestSenseLength))) {
  6475. ErrorCode = -EFAULT;
  6476. goto Failure2;
  6477. }
  6478. if (DataTransferLength > 0)
  6479. {
  6480. if (copy_to_user(UserCommand.DataTransferBuffer,
  6481. DataTransferBuffer, DataTransferLength)) {
  6482. ErrorCode = -EFAULT;
  6483. goto Failure2;
  6484. }
  6485. }
  6486. if (RequestSenseLength > 0)
  6487. {
  6488. if (copy_to_user(UserCommand.RequestSenseBuffer,
  6489. RequestSenseBuffer, RequestSenseLength)) {
  6490. ErrorCode = -EFAULT;
  6491. goto Failure2;
  6492. }
  6493. }
  6494. ErrorCode = CommandStatus;
  6495. Failure2:
  6496. pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
  6497. DataTransferBuffer, DataTransferBufferDMA);
  6498. if (RequestSenseBuffer != NULL)
  6499. pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
  6500. RequestSenseBuffer, RequestSenseBufferDMA);
  6501. Failure2a:
  6502. return ErrorCode;
  6503. }
  6504. case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
  6505. {
  6506. DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
  6507. (DAC960_V2_GetHealthStatus_T __user *) Argument;
  6508. DAC960_V2_GetHealthStatus_T GetHealthStatus;
  6509. DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
  6510. DAC960_Controller_T *Controller;
  6511. int ControllerNumber;
  6512. if (UserSpaceGetHealthStatus == NULL) return -EINVAL;
  6513. if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
  6514. sizeof(DAC960_V2_GetHealthStatus_T)))
  6515. return -EFAULT;
  6516. ControllerNumber = GetHealthStatus.ControllerNumber;
  6517. if (ControllerNumber < 0 ||
  6518. ControllerNumber > DAC960_ControllerCount - 1)
  6519. return -ENXIO;
  6520. Controller = DAC960_Controllers[ControllerNumber];
  6521. if (Controller == NULL) return -ENXIO;
  6522. if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL;
  6523. if (copy_from_user(&HealthStatusBuffer,
  6524. GetHealthStatus.HealthStatusBuffer,
  6525. sizeof(DAC960_V2_HealthStatusBuffer_T)))
  6526. return -EFAULT;
  6527. while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
  6528. == HealthStatusBuffer.StatusChangeCounter &&
  6529. Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
  6530. == HealthStatusBuffer.NextEventSequenceNumber)
  6531. {
  6532. interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
  6533. DAC960_MonitoringTimerInterval);
  6534. if (signal_pending(current)) return -EINTR;
  6535. }
  6536. if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
  6537. Controller->V2.HealthStatusBuffer,
  6538. sizeof(DAC960_V2_HealthStatusBuffer_T)))
  6539. return -EFAULT;
  6540. return 0;
  6541. }
  6542. }
  6543. return -EINVAL;
  6544. }
  6545. static struct file_operations DAC960_gam_fops = {
  6546. .owner = THIS_MODULE,
  6547. .ioctl = DAC960_gam_ioctl
  6548. };
  6549. static struct miscdevice DAC960_gam_dev = {
  6550. DAC960_GAM_MINOR,
  6551. "dac960_gam",
  6552. &DAC960_gam_fops
  6553. };
  6554. static int DAC960_gam_init(void)
  6555. {
  6556. int ret;
  6557. ret = misc_register(&DAC960_gam_dev);
  6558. if (ret)
  6559. printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
  6560. return ret;
  6561. }
  6562. static void DAC960_gam_cleanup(void)
  6563. {
  6564. misc_deregister(&DAC960_gam_dev);
  6565. }
  6566. #endif /* DAC960_GAM_MINOR */
  6567. static struct DAC960_privdata DAC960_GEM_privdata = {
  6568. .HardwareType = DAC960_GEM_Controller,
  6569. .FirmwareType = DAC960_V2_Controller,
  6570. .InterruptHandler = DAC960_GEM_InterruptHandler,
  6571. .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
  6572. };
  6573. static struct DAC960_privdata DAC960_BA_privdata = {
  6574. .HardwareType = DAC960_BA_Controller,
  6575. .FirmwareType = DAC960_V2_Controller,
  6576. .InterruptHandler = DAC960_BA_InterruptHandler,
  6577. .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
  6578. };
  6579. static struct DAC960_privdata DAC960_LP_privdata = {
  6580. .HardwareType = DAC960_LP_Controller,
  6581. .FirmwareType = DAC960_LP_Controller,
  6582. .InterruptHandler = DAC960_LP_InterruptHandler,
  6583. .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
  6584. };
  6585. static struct DAC960_privdata DAC960_LA_privdata = {
  6586. .HardwareType = DAC960_LA_Controller,
  6587. .FirmwareType = DAC960_V1_Controller,
  6588. .InterruptHandler = DAC960_LA_InterruptHandler,
  6589. .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
  6590. };
  6591. static struct DAC960_privdata DAC960_PG_privdata = {
  6592. .HardwareType = DAC960_PG_Controller,
  6593. .FirmwareType = DAC960_V1_Controller,
  6594. .InterruptHandler = DAC960_PG_InterruptHandler,
  6595. .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
  6596. };
  6597. static struct DAC960_privdata DAC960_PD_privdata = {
  6598. .HardwareType = DAC960_PD_Controller,
  6599. .FirmwareType = DAC960_V1_Controller,
  6600. .InterruptHandler = DAC960_PD_InterruptHandler,
  6601. .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
  6602. };
  6603. static struct DAC960_privdata DAC960_P_privdata = {
  6604. .HardwareType = DAC960_P_Controller,
  6605. .FirmwareType = DAC960_V1_Controller,
  6606. .InterruptHandler = DAC960_P_InterruptHandler,
  6607. .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
  6608. };
  6609. static struct pci_device_id DAC960_id_table[] = {
  6610. {
  6611. .vendor = PCI_VENDOR_ID_MYLEX,
  6612. .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
  6613. .subvendor = PCI_ANY_ID,
  6614. .subdevice = PCI_ANY_ID,
  6615. .driver_data = (unsigned long) &DAC960_GEM_privdata,
  6616. },
  6617. {
  6618. .vendor = PCI_VENDOR_ID_MYLEX,
  6619. .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
  6620. .subvendor = PCI_ANY_ID,
  6621. .subdevice = PCI_ANY_ID,
  6622. .driver_data = (unsigned long) &DAC960_BA_privdata,
  6623. },
  6624. {
  6625. .vendor = PCI_VENDOR_ID_MYLEX,
  6626. .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
  6627. .subvendor = PCI_ANY_ID,
  6628. .subdevice = PCI_ANY_ID,
  6629. .driver_data = (unsigned long) &DAC960_LP_privdata,
  6630. },
  6631. {
  6632. .vendor = PCI_VENDOR_ID_DEC,
  6633. .device = PCI_DEVICE_ID_DEC_21285,
  6634. .subvendor = PCI_VENDOR_ID_MYLEX,
  6635. .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
  6636. .driver_data = (unsigned long) &DAC960_LA_privdata,
  6637. },
  6638. {
  6639. .vendor = PCI_VENDOR_ID_MYLEX,
  6640. .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
  6641. .subvendor = PCI_ANY_ID,
  6642. .subdevice = PCI_ANY_ID,
  6643. .driver_data = (unsigned long) &DAC960_PG_privdata,
  6644. },
  6645. {
  6646. .vendor = PCI_VENDOR_ID_MYLEX,
  6647. .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
  6648. .subvendor = PCI_ANY_ID,
  6649. .subdevice = PCI_ANY_ID,
  6650. .driver_data = (unsigned long) &DAC960_PD_privdata,
  6651. },
  6652. {
  6653. .vendor = PCI_VENDOR_ID_MYLEX,
  6654. .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
  6655. .subvendor = PCI_ANY_ID,
  6656. .subdevice = PCI_ANY_ID,
  6657. .driver_data = (unsigned long) &DAC960_P_privdata,
  6658. },
  6659. {0, },
  6660. };
  6661. MODULE_DEVICE_TABLE(pci, DAC960_id_table);
  6662. static struct pci_driver DAC960_pci_driver = {
  6663. .name = "DAC960",
  6664. .id_table = DAC960_id_table,
  6665. .probe = DAC960_Probe,
  6666. .remove = DAC960_Remove,
  6667. };
  6668. static int DAC960_init_module(void)
  6669. {
  6670. int ret;
  6671. ret = pci_module_init(&DAC960_pci_driver);
  6672. #ifdef DAC960_GAM_MINOR
  6673. if (!ret)
  6674. DAC960_gam_init();
  6675. #endif
  6676. return ret;
  6677. }
  6678. static void DAC960_cleanup_module(void)
  6679. {
  6680. int i;
  6681. #ifdef DAC960_GAM_MINOR
  6682. DAC960_gam_cleanup();
  6683. #endif
  6684. for (i = 0; i < DAC960_ControllerCount; i++) {
  6685. DAC960_Controller_T *Controller = DAC960_Controllers[i];
  6686. if (Controller == NULL)
  6687. continue;
  6688. DAC960_FinalizeController(Controller);
  6689. }
  6690. if (DAC960_ProcDirectoryEntry != NULL) {
  6691. remove_proc_entry("rd/status", NULL);
  6692. remove_proc_entry("rd", NULL);
  6693. }
  6694. DAC960_ControllerCount = 0;
  6695. pci_unregister_driver(&DAC960_pci_driver);
  6696. }
  6697. module_init(DAC960_init_module);
  6698. module_exit(DAC960_cleanup_module);
  6699. MODULE_LICENSE("GPL");