msr.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279
  1. /* ----------------------------------------------------------------------- *
  2. *
  3. * Copyright 2000 H. Peter Anvin - All Rights Reserved
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
  8. * USA; either version 2 of the License, or (at your option) any later
  9. * version; incorporated herein by reference.
  10. *
  11. * ----------------------------------------------------------------------- */
  12. /*
  13. * msr.c
  14. *
  15. * x86 MSR access device
  16. *
  17. * This device is accessed by lseek() to the appropriate register number
  18. * and then read/write in chunks of 8 bytes. A larger size means multiple
  19. * reads or writes of the same register.
  20. *
  21. * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
  22. * an SMP box will direct the access to CPU %d.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/config.h>
  26. #include <linux/types.h>
  27. #include <linux/errno.h>
  28. #include <linux/fcntl.h>
  29. #include <linux/init.h>
  30. #include <linux/poll.h>
  31. #include <linux/smp.h>
  32. #include <linux/smp_lock.h>
  33. #include <linux/major.h>
  34. #include <linux/fs.h>
  35. #include <asm/processor.h>
  36. #include <asm/msr.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/system.h>
  39. /* Note: "err" is handled in a funny way below. Otherwise one version
  40. of gcc or another breaks. */
  41. static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx)
  42. {
  43. int err;
  44. asm volatile ("1: wrmsr\n"
  45. "2:\n"
  46. ".section .fixup,\"ax\"\n"
  47. "3: movl %4,%0\n"
  48. " jmp 2b\n"
  49. ".previous\n"
  50. ".section __ex_table,\"a\"\n"
  51. " .align 8\n" " .quad 1b,3b\n" ".previous":"=&bDS" (err)
  52. :"a"(eax), "d"(edx), "c"(reg), "i"(-EIO), "0"(0));
  53. return err;
  54. }
  55. static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx)
  56. {
  57. int err;
  58. asm volatile ("1: rdmsr\n"
  59. "2:\n"
  60. ".section .fixup,\"ax\"\n"
  61. "3: movl %4,%0\n"
  62. " jmp 2b\n"
  63. ".previous\n"
  64. ".section __ex_table,\"a\"\n"
  65. " .align 8\n"
  66. " .quad 1b,3b\n"
  67. ".previous":"=&bDS" (err), "=a"(*eax), "=d"(*edx)
  68. :"c"(reg), "i"(-EIO), "0"(0));
  69. return err;
  70. }
  71. #ifdef CONFIG_SMP
  72. struct msr_command {
  73. int cpu;
  74. int err;
  75. u32 reg;
  76. u32 data[2];
  77. };
  78. static void msr_smp_wrmsr(void *cmd_block)
  79. {
  80. struct msr_command *cmd = (struct msr_command *)cmd_block;
  81. if (cmd->cpu == smp_processor_id())
  82. cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]);
  83. }
  84. static void msr_smp_rdmsr(void *cmd_block)
  85. {
  86. struct msr_command *cmd = (struct msr_command *)cmd_block;
  87. if (cmd->cpu == smp_processor_id())
  88. cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]);
  89. }
  90. static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
  91. {
  92. struct msr_command cmd;
  93. int ret;
  94. preempt_disable();
  95. if (cpu == smp_processor_id()) {
  96. ret = wrmsr_eio(reg, eax, edx);
  97. } else {
  98. cmd.cpu = cpu;
  99. cmd.reg = reg;
  100. cmd.data[0] = eax;
  101. cmd.data[1] = edx;
  102. smp_call_function(msr_smp_wrmsr, &cmd, 1, 1);
  103. ret = cmd.err;
  104. }
  105. preempt_enable();
  106. return ret;
  107. }
  108. static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx)
  109. {
  110. struct msr_command cmd;
  111. int ret;
  112. preempt_disable();
  113. if (cpu == smp_processor_id()) {
  114. ret = rdmsr_eio(reg, eax, edx);
  115. } else {
  116. cmd.cpu = cpu;
  117. cmd.reg = reg;
  118. smp_call_function(msr_smp_rdmsr, &cmd, 1, 1);
  119. *eax = cmd.data[0];
  120. *edx = cmd.data[1];
  121. ret = cmd.err;
  122. }
  123. preempt_enable();
  124. return ret;
  125. }
  126. #else /* ! CONFIG_SMP */
  127. static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
  128. {
  129. return wrmsr_eio(reg, eax, edx);
  130. }
  131. static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx)
  132. {
  133. return rdmsr_eio(reg, eax, edx);
  134. }
  135. #endif /* ! CONFIG_SMP */
  136. static loff_t msr_seek(struct file *file, loff_t offset, int orig)
  137. {
  138. loff_t ret = -EINVAL;
  139. lock_kernel();
  140. switch (orig) {
  141. case 0:
  142. file->f_pos = offset;
  143. ret = file->f_pos;
  144. break;
  145. case 1:
  146. file->f_pos += offset;
  147. ret = file->f_pos;
  148. }
  149. unlock_kernel();
  150. return ret;
  151. }
  152. static ssize_t msr_read(struct file *file, char __user * buf,
  153. size_t count, loff_t * ppos)
  154. {
  155. u32 __user *tmp = (u32 __user *) buf;
  156. u32 data[2];
  157. size_t rv;
  158. u32 reg = *ppos;
  159. int cpu = iminor(file->f_dentry->d_inode);
  160. int err;
  161. if (count % 8)
  162. return -EINVAL; /* Invalid chunk size */
  163. for (rv = 0; count; count -= 8) {
  164. err = do_rdmsr(cpu, reg, &data[0], &data[1]);
  165. if (err)
  166. return err;
  167. if (copy_to_user(tmp, &data, 8))
  168. return -EFAULT;
  169. tmp += 2;
  170. }
  171. return ((char __user *)tmp) - buf;
  172. }
  173. static ssize_t msr_write(struct file *file, const char __user *buf,
  174. size_t count, loff_t *ppos)
  175. {
  176. const u32 __user *tmp = (const u32 __user *)buf;
  177. u32 data[2];
  178. size_t rv;
  179. u32 reg = *ppos;
  180. int cpu = iminor(file->f_dentry->d_inode);
  181. int err;
  182. if (count % 8)
  183. return -EINVAL; /* Invalid chunk size */
  184. for (rv = 0; count; count -= 8) {
  185. if (copy_from_user(&data, tmp, 8))
  186. return -EFAULT;
  187. err = do_wrmsr(cpu, reg, data[0], data[1]);
  188. if (err)
  189. return err;
  190. tmp += 2;
  191. }
  192. return ((char __user *)tmp) - buf;
  193. }
  194. static int msr_open(struct inode *inode, struct file *file)
  195. {
  196. unsigned int cpu = iminor(file->f_dentry->d_inode);
  197. struct cpuinfo_x86 *c = &(cpu_data)[cpu];
  198. if (cpu >= NR_CPUS || !cpu_online(cpu))
  199. return -ENXIO; /* No such CPU */
  200. if (!cpu_has(c, X86_FEATURE_MSR))
  201. return -EIO; /* MSR not supported */
  202. return 0;
  203. }
  204. /*
  205. * File operations we support
  206. */
  207. static struct file_operations msr_fops = {
  208. .owner = THIS_MODULE,
  209. .llseek = msr_seek,
  210. .read = msr_read,
  211. .write = msr_write,
  212. .open = msr_open,
  213. };
  214. static int __init msr_init(void)
  215. {
  216. if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) {
  217. printk(KERN_ERR "msr: unable to get major %d for msr\n",
  218. MSR_MAJOR);
  219. return -EBUSY;
  220. }
  221. return 0;
  222. }
  223. static void __exit msr_exit(void)
  224. {
  225. unregister_chrdev(MSR_MAJOR, "cpu/msr");
  226. }
  227. module_init(msr_init);
  228. module_exit(msr_exit)
  229. MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
  230. MODULE_DESCRIPTION("x86 generic MSR driver");
  231. MODULE_LICENSE("GPL");