winfixup.S 12 KB

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  1. /* $Id: winfixup.S,v 1.30 2002/02/09 19:49:30 davem Exp $
  2. *
  3. * winfixup.S: Handle cases where user stack pointer is found to be bogus.
  4. *
  5. * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
  6. */
  7. #include <asm/asi.h>
  8. #include <asm/head.h>
  9. #include <asm/page.h>
  10. #include <asm/ptrace.h>
  11. #include <asm/processor.h>
  12. #include <asm/spitfire.h>
  13. #include <asm/thread_info.h>
  14. .text
  15. set_pcontext:
  16. cplus_winfixup_insn_1:
  17. sethi %hi(0), %l1
  18. mov PRIMARY_CONTEXT, %g1
  19. sllx %l1, 32, %l1
  20. cplus_winfixup_insn_2:
  21. sethi %hi(0), %g2
  22. or %l1, %g2, %l1
  23. stxa %l1, [%g1] ASI_DMMU
  24. flush %g6
  25. retl
  26. nop
  27. cplus_wfinsn_1:
  28. sethi %uhi(CTX_CHEETAH_PLUS_NUC), %l1
  29. cplus_wfinsn_2:
  30. sethi %hi(CTX_CHEETAH_PLUS_CTX0), %g2
  31. .align 32
  32. /* Here are the rules, pay attention.
  33. *
  34. * The kernel is disallowed from touching user space while
  35. * the trap level is greater than zero, except for from within
  36. * the window spill/fill handlers. This must be followed
  37. * so that we can easily detect the case where we tried to
  38. * spill/fill with a bogus (or unmapped) user stack pointer.
  39. *
  40. * These are layed out in a special way for cache reasons,
  41. * don't touch...
  42. */
  43. .globl fill_fixup, spill_fixup
  44. fill_fixup:
  45. rdpr %tstate, %g1
  46. andcc %g1, TSTATE_PRIV, %g0
  47. or %g4, FAULT_CODE_WINFIXUP, %g4
  48. be,pt %xcc, window_scheisse_from_user_common
  49. and %g1, TSTATE_CWP, %g1
  50. /* This is the extremely complex case, but it does happen from
  51. * time to time if things are just right. Essentially the restore
  52. * done in rtrap right before going back to user mode, with tl=1
  53. * and that levels trap stack registers all setup, took a fill trap,
  54. * the user stack was not mapped in the tlb, and tlb miss occurred,
  55. * the pte found was not valid, and a simple ref bit watch update
  56. * could not satisfy the miss, so we got here.
  57. *
  58. * We must carefully unwind the state so we get back to tl=0, preserve
  59. * all the register values we were going to give to the user. Luckily
  60. * most things are where they need to be, we also have the address
  61. * which triggered the fault handy as well.
  62. *
  63. * Also note that we must preserve %l5 and %l6. If the user was
  64. * returning from a system call, we must make it look this way
  65. * after we process the fill fault on the users stack.
  66. *
  67. * First, get into the window where the original restore was executed.
  68. */
  69. rdpr %wstate, %g2 ! Grab user mode wstate.
  70. wrpr %g1, %cwp ! Get into the right window.
  71. sll %g2, 3, %g2 ! NORMAL-->OTHER
  72. wrpr %g0, 0x0, %canrestore ! Standard etrap stuff.
  73. wrpr %g2, 0x0, %wstate ! This must be consistent.
  74. wrpr %g0, 0x0, %otherwin ! We know this.
  75. call set_pcontext ! Change contexts...
  76. nop
  77. rdpr %pstate, %l1 ! Prepare to change globals.
  78. mov %g6, %o7 ! Get current.
  79. andn %l1, PSTATE_MM, %l1 ! We want to be in RMO
  80. stb %g4, [%g6 + TI_FAULT_CODE]
  81. stx %g5, [%g6 + TI_FAULT_ADDR]
  82. wrpr %g0, 0x0, %tl ! Out of trap levels.
  83. wrpr %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
  84. mov %o7, %g6
  85. ldx [%g6 + TI_TASK], %g4
  86. #ifdef CONFIG_SMP
  87. mov TSB_REG, %g1
  88. ldxa [%g1] ASI_IMMU, %g5
  89. #endif
  90. /* This is the same as below, except we handle this a bit special
  91. * since we must preserve %l5 and %l6, see comment above.
  92. */
  93. call do_sparc64_fault
  94. add %sp, PTREGS_OFF, %o0
  95. ba,pt %xcc, rtrap
  96. nop ! yes, nop is correct
  97. /* Be very careful about usage of the alternate globals here.
  98. * You cannot touch %g4/%g5 as that has the fault information
  99. * should this be from usermode. Also be careful for the case
  100. * where we get here from the save instruction in etrap.S when
  101. * coming from either user or kernel (does not matter which, it
  102. * is the same problem in both cases). Essentially this means
  103. * do not touch %g7 or %g2 so we handle the two cases fine.
  104. */
  105. spill_fixup:
  106. ldx [%g6 + TI_FLAGS], %g1
  107. andcc %g1, _TIF_32BIT, %g0
  108. ldub [%g6 + TI_WSAVED], %g1
  109. sll %g1, 3, %g3
  110. add %g6, %g3, %g3
  111. stx %sp, [%g3 + TI_RWIN_SPTRS]
  112. sll %g1, 7, %g3
  113. bne,pt %xcc, 1f
  114. add %g6, %g3, %g3
  115. stx %l0, [%g3 + TI_REG_WINDOW + 0x00]
  116. stx %l1, [%g3 + TI_REG_WINDOW + 0x08]
  117. stx %l2, [%g3 + TI_REG_WINDOW + 0x10]
  118. stx %l3, [%g3 + TI_REG_WINDOW + 0x18]
  119. stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
  120. stx %l5, [%g3 + TI_REG_WINDOW + 0x28]
  121. stx %l6, [%g3 + TI_REG_WINDOW + 0x30]
  122. stx %l7, [%g3 + TI_REG_WINDOW + 0x38]
  123. stx %i0, [%g3 + TI_REG_WINDOW + 0x40]
  124. stx %i1, [%g3 + TI_REG_WINDOW + 0x48]
  125. stx %i2, [%g3 + TI_REG_WINDOW + 0x50]
  126. stx %i3, [%g3 + TI_REG_WINDOW + 0x58]
  127. stx %i4, [%g3 + TI_REG_WINDOW + 0x60]
  128. stx %i5, [%g3 + TI_REG_WINDOW + 0x68]
  129. stx %i6, [%g3 + TI_REG_WINDOW + 0x70]
  130. b,pt %xcc, 2f
  131. stx %i7, [%g3 + TI_REG_WINDOW + 0x78]
  132. 1: stw %l0, [%g3 + TI_REG_WINDOW + 0x00]
  133. stw %l1, [%g3 + TI_REG_WINDOW + 0x04]
  134. stw %l2, [%g3 + TI_REG_WINDOW + 0x08]
  135. stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]
  136. stw %l4, [%g3 + TI_REG_WINDOW + 0x10]
  137. stw %l5, [%g3 + TI_REG_WINDOW + 0x14]
  138. stw %l6, [%g3 + TI_REG_WINDOW + 0x18]
  139. stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]
  140. stw %i0, [%g3 + TI_REG_WINDOW + 0x20]
  141. stw %i1, [%g3 + TI_REG_WINDOW + 0x24]
  142. stw %i2, [%g3 + TI_REG_WINDOW + 0x28]
  143. stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]
  144. stw %i4, [%g3 + TI_REG_WINDOW + 0x30]
  145. stw %i5, [%g3 + TI_REG_WINDOW + 0x34]
  146. stw %i6, [%g3 + TI_REG_WINDOW + 0x38]
  147. stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]
  148. 2: add %g1, 1, %g1
  149. stb %g1, [%g6 + TI_WSAVED]
  150. rdpr %tstate, %g1
  151. andcc %g1, TSTATE_PRIV, %g0
  152. saved
  153. and %g1, TSTATE_CWP, %g1
  154. be,pn %xcc, window_scheisse_from_user_common
  155. mov FAULT_CODE_WRITE | FAULT_CODE_DTLB | FAULT_CODE_WINFIXUP, %g4
  156. retry
  157. window_scheisse_from_user_common:
  158. stb %g4, [%g6 + TI_FAULT_CODE]
  159. stx %g5, [%g6 + TI_FAULT_ADDR]
  160. wrpr %g1, %cwp
  161. ba,pt %xcc, etrap
  162. rd %pc, %g7
  163. call do_sparc64_fault
  164. add %sp, PTREGS_OFF, %o0
  165. ba,a,pt %xcc, rtrap_clr_l6
  166. .globl winfix_mna, fill_fixup_mna, spill_fixup_mna
  167. winfix_mna:
  168. andn %g3, 0x7f, %g3
  169. add %g3, 0x78, %g3
  170. wrpr %g3, %tnpc
  171. done
  172. fill_fixup_mna:
  173. rdpr %tstate, %g1
  174. andcc %g1, TSTATE_PRIV, %g0
  175. be,pt %xcc, window_mna_from_user_common
  176. and %g1, TSTATE_CWP, %g1
  177. /* Please, see fill_fixup commentary about why we must preserve
  178. * %l5 and %l6 to preserve absolute correct semantics.
  179. */
  180. rdpr %wstate, %g2 ! Grab user mode wstate.
  181. wrpr %g1, %cwp ! Get into the right window.
  182. sll %g2, 3, %g2 ! NORMAL-->OTHER
  183. wrpr %g0, 0x0, %canrestore ! Standard etrap stuff.
  184. wrpr %g2, 0x0, %wstate ! This must be consistent.
  185. wrpr %g0, 0x0, %otherwin ! We know this.
  186. call set_pcontext ! Change contexts...
  187. nop
  188. rdpr %pstate, %l1 ! Prepare to change globals.
  189. mov %g4, %o2 ! Setup args for
  190. mov %g5, %o1 ! final call to mem_address_unaligned.
  191. andn %l1, PSTATE_MM, %l1 ! We want to be in RMO
  192. mov %g6, %o7 ! Stash away current.
  193. wrpr %g0, 0x0, %tl ! Out of trap levels.
  194. wrpr %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
  195. mov %o7, %g6 ! Get current back.
  196. ldx [%g6 + TI_TASK], %g4 ! Finish it.
  197. #ifdef CONFIG_SMP
  198. mov TSB_REG, %g1
  199. ldxa [%g1] ASI_IMMU, %g5
  200. #endif
  201. call mem_address_unaligned
  202. add %sp, PTREGS_OFF, %o0
  203. b,pt %xcc, rtrap
  204. nop ! yes, the nop is correct
  205. spill_fixup_mna:
  206. ldx [%g6 + TI_FLAGS], %g1
  207. andcc %g1, _TIF_32BIT, %g0
  208. ldub [%g6 + TI_WSAVED], %g1
  209. sll %g1, 3, %g3
  210. add %g6, %g3, %g3
  211. stx %sp, [%g3 + TI_RWIN_SPTRS]
  212. sll %g1, 7, %g3
  213. bne,pt %xcc, 1f
  214. add %g6, %g3, %g3
  215. stx %l0, [%g3 + TI_REG_WINDOW + 0x00]
  216. stx %l1, [%g3 + TI_REG_WINDOW + 0x08]
  217. stx %l2, [%g3 + TI_REG_WINDOW + 0x10]
  218. stx %l3, [%g3 + TI_REG_WINDOW + 0x18]
  219. stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
  220. stx %l5, [%g3 + TI_REG_WINDOW + 0x28]
  221. stx %l6, [%g3 + TI_REG_WINDOW + 0x30]
  222. stx %l7, [%g3 + TI_REG_WINDOW + 0x38]
  223. stx %i0, [%g3 + TI_REG_WINDOW + 0x40]
  224. stx %i1, [%g3 + TI_REG_WINDOW + 0x48]
  225. stx %i2, [%g3 + TI_REG_WINDOW + 0x50]
  226. stx %i3, [%g3 + TI_REG_WINDOW + 0x58]
  227. stx %i4, [%g3 + TI_REG_WINDOW + 0x60]
  228. stx %i5, [%g3 + TI_REG_WINDOW + 0x68]
  229. stx %i6, [%g3 + TI_REG_WINDOW + 0x70]
  230. stx %i7, [%g3 + TI_REG_WINDOW + 0x78]
  231. b,pt %xcc, 2f
  232. add %g1, 1, %g1
  233. 1: std %l0, [%g3 + TI_REG_WINDOW + 0x00]
  234. std %l2, [%g3 + TI_REG_WINDOW + 0x08]
  235. std %l4, [%g3 + TI_REG_WINDOW + 0x10]
  236. std %l6, [%g3 + TI_REG_WINDOW + 0x18]
  237. std %i0, [%g3 + TI_REG_WINDOW + 0x20]
  238. std %i2, [%g3 + TI_REG_WINDOW + 0x28]
  239. std %i4, [%g3 + TI_REG_WINDOW + 0x30]
  240. std %i6, [%g3 + TI_REG_WINDOW + 0x38]
  241. add %g1, 1, %g1
  242. 2: stb %g1, [%g6 + TI_WSAVED]
  243. rdpr %tstate, %g1
  244. andcc %g1, TSTATE_PRIV, %g0
  245. saved
  246. be,pn %xcc, window_mna_from_user_common
  247. and %g1, TSTATE_CWP, %g1
  248. retry
  249. window_mna_from_user_common:
  250. wrpr %g1, %cwp
  251. sethi %hi(109f), %g7
  252. ba,pt %xcc, etrap
  253. 109: or %g7, %lo(109b), %g7
  254. mov %l4, %o2
  255. mov %l5, %o1
  256. call mem_address_unaligned
  257. add %sp, PTREGS_OFF, %o0
  258. ba,pt %xcc, rtrap
  259. clr %l6
  260. /* These are only needed for 64-bit mode processes which
  261. * put their stack pointer into the VPTE area and there
  262. * happens to be a VPTE tlb entry mapped there during
  263. * a spill/fill trap to that stack frame.
  264. */
  265. .globl winfix_dax, fill_fixup_dax, spill_fixup_dax
  266. winfix_dax:
  267. andn %g3, 0x7f, %g3
  268. add %g3, 0x74, %g3
  269. wrpr %g3, %tnpc
  270. done
  271. fill_fixup_dax:
  272. rdpr %tstate, %g1
  273. andcc %g1, TSTATE_PRIV, %g0
  274. be,pt %xcc, window_dax_from_user_common
  275. and %g1, TSTATE_CWP, %g1
  276. /* Please, see fill_fixup commentary about why we must preserve
  277. * %l5 and %l6 to preserve absolute correct semantics.
  278. */
  279. rdpr %wstate, %g2 ! Grab user mode wstate.
  280. wrpr %g1, %cwp ! Get into the right window.
  281. sll %g2, 3, %g2 ! NORMAL-->OTHER
  282. wrpr %g0, 0x0, %canrestore ! Standard etrap stuff.
  283. wrpr %g2, 0x0, %wstate ! This must be consistent.
  284. wrpr %g0, 0x0, %otherwin ! We know this.
  285. call set_pcontext ! Change contexts...
  286. nop
  287. rdpr %pstate, %l1 ! Prepare to change globals.
  288. mov %g4, %o1 ! Setup args for
  289. mov %g5, %o2 ! final call to spitfire_data_access_exception.
  290. andn %l1, PSTATE_MM, %l1 ! We want to be in RMO
  291. mov %g6, %o7 ! Stash away current.
  292. wrpr %g0, 0x0, %tl ! Out of trap levels.
  293. wrpr %l1, (PSTATE_IE | PSTATE_AG | PSTATE_RMO), %pstate
  294. mov %o7, %g6 ! Get current back.
  295. ldx [%g6 + TI_TASK], %g4 ! Finish it.
  296. #ifdef CONFIG_SMP
  297. mov TSB_REG, %g1
  298. ldxa [%g1] ASI_IMMU, %g5
  299. #endif
  300. call spitfire_data_access_exception
  301. add %sp, PTREGS_OFF, %o0
  302. b,pt %xcc, rtrap
  303. nop ! yes, the nop is correct
  304. spill_fixup_dax:
  305. ldx [%g6 + TI_FLAGS], %g1
  306. andcc %g1, _TIF_32BIT, %g0
  307. ldub [%g6 + TI_WSAVED], %g1
  308. sll %g1, 3, %g3
  309. add %g6, %g3, %g3
  310. stx %sp, [%g3 + TI_RWIN_SPTRS]
  311. sll %g1, 7, %g3
  312. bne,pt %xcc, 1f
  313. add %g6, %g3, %g3
  314. stx %l0, [%g3 + TI_REG_WINDOW + 0x00]
  315. stx %l1, [%g3 + TI_REG_WINDOW + 0x08]
  316. stx %l2, [%g3 + TI_REG_WINDOW + 0x10]
  317. stx %l3, [%g3 + TI_REG_WINDOW + 0x18]
  318. stx %l4, [%g3 + TI_REG_WINDOW + 0x20]
  319. stx %l5, [%g3 + TI_REG_WINDOW + 0x28]
  320. stx %l6, [%g3 + TI_REG_WINDOW + 0x30]
  321. stx %l7, [%g3 + TI_REG_WINDOW + 0x38]
  322. stx %i0, [%g3 + TI_REG_WINDOW + 0x40]
  323. stx %i1, [%g3 + TI_REG_WINDOW + 0x48]
  324. stx %i2, [%g3 + TI_REG_WINDOW + 0x50]
  325. stx %i3, [%g3 + TI_REG_WINDOW + 0x58]
  326. stx %i4, [%g3 + TI_REG_WINDOW + 0x60]
  327. stx %i5, [%g3 + TI_REG_WINDOW + 0x68]
  328. stx %i6, [%g3 + TI_REG_WINDOW + 0x70]
  329. stx %i7, [%g3 + TI_REG_WINDOW + 0x78]
  330. b,pt %xcc, 2f
  331. add %g1, 1, %g1
  332. 1: std %l0, [%g3 + TI_REG_WINDOW + 0x00]
  333. std %l2, [%g3 + TI_REG_WINDOW + 0x08]
  334. std %l4, [%g3 + TI_REG_WINDOW + 0x10]
  335. std %l6, [%g3 + TI_REG_WINDOW + 0x18]
  336. std %i0, [%g3 + TI_REG_WINDOW + 0x20]
  337. std %i2, [%g3 + TI_REG_WINDOW + 0x28]
  338. std %i4, [%g3 + TI_REG_WINDOW + 0x30]
  339. std %i6, [%g3 + TI_REG_WINDOW + 0x38]
  340. add %g1, 1, %g1
  341. 2: stb %g1, [%g6 + TI_WSAVED]
  342. rdpr %tstate, %g1
  343. andcc %g1, TSTATE_PRIV, %g0
  344. saved
  345. be,pn %xcc, window_dax_from_user_common
  346. and %g1, TSTATE_CWP, %g1
  347. retry
  348. window_dax_from_user_common:
  349. wrpr %g1, %cwp
  350. sethi %hi(109f), %g7
  351. ba,pt %xcc, etrap
  352. 109: or %g7, %lo(109b), %g7
  353. mov %l4, %o1
  354. mov %l5, %o2
  355. call spitfire_data_access_exception
  356. add %sp, PTREGS_OFF, %o0
  357. ba,pt %xcc, rtrap
  358. clr %l6
  359. .globl cheetah_plus_patch_winfixup
  360. cheetah_plus_patch_winfixup:
  361. sethi %hi(cplus_wfinsn_1), %o0
  362. sethi %hi(cplus_winfixup_insn_1), %o2
  363. lduw [%o0 + %lo(cplus_wfinsn_1)], %o1
  364. or %o2, %lo(cplus_winfixup_insn_1), %o2
  365. stw %o1, [%o2]
  366. flush %o2
  367. sethi %hi(cplus_wfinsn_2), %o0
  368. sethi %hi(cplus_winfixup_insn_2), %o2
  369. lduw [%o0 + %lo(cplus_wfinsn_2)], %o1
  370. or %o2, %lo(cplus_winfixup_insn_2), %o2
  371. stw %o1, [%o2]
  372. flush %o2
  373. retl
  374. nop