kprobes.c 11 KB

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  1. /* arch/sparc64/kernel/kprobes.c
  2. *
  3. * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
  4. */
  5. #include <linux/config.h>
  6. #include <linux/kernel.h>
  7. #include <linux/kprobes.h>
  8. #include <asm/kdebug.h>
  9. #include <asm/signal.h>
  10. #include <asm/cacheflush.h>
  11. /* We do not have hardware single-stepping on sparc64.
  12. * So we implement software single-stepping with breakpoint
  13. * traps. The top-level scheme is similar to that used
  14. * in the x86 kprobes implementation.
  15. *
  16. * In the kprobe->ainsn.insn[] array we store the original
  17. * instruction at index zero and a break instruction at
  18. * index one.
  19. *
  20. * When we hit a kprobe we:
  21. * - Run the pre-handler
  22. * - Remember "regs->tnpc" and interrupt level stored in
  23. * "regs->tstate" so we can restore them later
  24. * - Disable PIL interrupts
  25. * - Set regs->tpc to point to kprobe->ainsn.insn[0]
  26. * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
  27. * - Mark that we are actively in a kprobe
  28. *
  29. * At this point we wait for the second breakpoint at
  30. * kprobe->ainsn.insn[1] to hit. When it does we:
  31. * - Run the post-handler
  32. * - Set regs->tpc to "remembered" regs->tnpc stored above,
  33. * restore the PIL interrupt level in "regs->tstate" as well
  34. * - Make any adjustments necessary to regs->tnpc in order
  35. * to handle relative branches correctly. See below.
  36. * - Mark that we are no longer actively in a kprobe.
  37. */
  38. int __kprobes arch_prepare_kprobe(struct kprobe *p)
  39. {
  40. return 0;
  41. }
  42. void __kprobes arch_copy_kprobe(struct kprobe *p)
  43. {
  44. p->ainsn.insn[0] = *p->addr;
  45. p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
  46. p->opcode = *p->addr;
  47. }
  48. void __kprobes arch_arm_kprobe(struct kprobe *p)
  49. {
  50. *p->addr = BREAKPOINT_INSTRUCTION;
  51. flushi(p->addr);
  52. }
  53. void __kprobes arch_disarm_kprobe(struct kprobe *p)
  54. {
  55. *p->addr = p->opcode;
  56. flushi(p->addr);
  57. }
  58. void __kprobes arch_remove_kprobe(struct kprobe *p)
  59. {
  60. }
  61. static struct kprobe *current_kprobe;
  62. static unsigned long current_kprobe_orig_tnpc;
  63. static unsigned long current_kprobe_orig_tstate_pil;
  64. static unsigned int kprobe_status;
  65. static struct kprobe *kprobe_prev;
  66. static unsigned long kprobe_orig_tnpc_prev;
  67. static unsigned long kprobe_orig_tstate_pil_prev;
  68. static unsigned int kprobe_status_prev;
  69. static inline void save_previous_kprobe(void)
  70. {
  71. kprobe_status_prev = kprobe_status;
  72. kprobe_orig_tnpc_prev = current_kprobe_orig_tnpc;
  73. kprobe_orig_tstate_pil_prev = current_kprobe_orig_tstate_pil;
  74. kprobe_prev = current_kprobe;
  75. }
  76. static inline void restore_previous_kprobe(void)
  77. {
  78. kprobe_status = kprobe_status_prev;
  79. current_kprobe_orig_tnpc = kprobe_orig_tnpc_prev;
  80. current_kprobe_orig_tstate_pil = kprobe_orig_tstate_pil_prev;
  81. current_kprobe = kprobe_prev;
  82. }
  83. static inline void set_current_kprobe(struct kprobe *p, struct pt_regs *regs)
  84. {
  85. current_kprobe_orig_tnpc = regs->tnpc;
  86. current_kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
  87. current_kprobe = p;
  88. }
  89. static inline void prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
  90. {
  91. regs->tstate |= TSTATE_PIL;
  92. /*single step inline, if it a breakpoint instruction*/
  93. if (p->opcode == BREAKPOINT_INSTRUCTION) {
  94. regs->tpc = (unsigned long) p->addr;
  95. regs->tnpc = current_kprobe_orig_tnpc;
  96. } else {
  97. regs->tpc = (unsigned long) &p->ainsn.insn[0];
  98. regs->tnpc = (unsigned long) &p->ainsn.insn[1];
  99. }
  100. }
  101. static int __kprobes kprobe_handler(struct pt_regs *regs)
  102. {
  103. struct kprobe *p;
  104. void *addr = (void *) regs->tpc;
  105. int ret = 0;
  106. preempt_disable();
  107. if (kprobe_running()) {
  108. /* We *are* holding lock here, so this is safe.
  109. * Disarm the probe we just hit, and ignore it.
  110. */
  111. p = get_kprobe(addr);
  112. if (p) {
  113. if (kprobe_status == KPROBE_HIT_SS) {
  114. regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
  115. current_kprobe_orig_tstate_pil);
  116. unlock_kprobes();
  117. goto no_kprobe;
  118. }
  119. /* We have reentered the kprobe_handler(), since
  120. * another probe was hit while within the handler.
  121. * We here save the original kprobes variables and
  122. * just single step on the instruction of the new probe
  123. * without calling any user handlers.
  124. */
  125. save_previous_kprobe();
  126. set_current_kprobe(p, regs);
  127. p->nmissed++;
  128. kprobe_status = KPROBE_REENTER;
  129. prepare_singlestep(p, regs);
  130. return 1;
  131. } else {
  132. p = current_kprobe;
  133. if (p->break_handler && p->break_handler(p, regs))
  134. goto ss_probe;
  135. }
  136. /* If it's not ours, can't be delete race, (we hold lock). */
  137. goto no_kprobe;
  138. }
  139. lock_kprobes();
  140. p = get_kprobe(addr);
  141. if (!p) {
  142. unlock_kprobes();
  143. if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
  144. /*
  145. * The breakpoint instruction was removed right
  146. * after we hit it. Another cpu has removed
  147. * either a probepoint or a debugger breakpoint
  148. * at this address. In either case, no further
  149. * handling of this interrupt is appropriate.
  150. */
  151. ret = 1;
  152. }
  153. /* Not one of ours: let kernel handle it */
  154. goto no_kprobe;
  155. }
  156. set_current_kprobe(p, regs);
  157. kprobe_status = KPROBE_HIT_ACTIVE;
  158. if (p->pre_handler && p->pre_handler(p, regs))
  159. return 1;
  160. ss_probe:
  161. prepare_singlestep(p, regs);
  162. kprobe_status = KPROBE_HIT_SS;
  163. return 1;
  164. no_kprobe:
  165. preempt_enable_no_resched();
  166. return ret;
  167. }
  168. /* If INSN is a relative control transfer instruction,
  169. * return the corrected branch destination value.
  170. *
  171. * The original INSN location was REAL_PC, it actually
  172. * executed at PC and produced destination address NPC.
  173. */
  174. static unsigned long __kprobes relbranch_fixup(u32 insn, unsigned long real_pc,
  175. unsigned long pc,
  176. unsigned long npc)
  177. {
  178. /* Branch not taken, no mods necessary. */
  179. if (npc == pc + 0x4UL)
  180. return real_pc + 0x4UL;
  181. /* The three cases are call, branch w/prediction,
  182. * and traditional branch.
  183. */
  184. if ((insn & 0xc0000000) == 0x40000000 ||
  185. (insn & 0xc1c00000) == 0x00400000 ||
  186. (insn & 0xc1c00000) == 0x00800000) {
  187. /* The instruction did all the work for us
  188. * already, just apply the offset to the correct
  189. * instruction location.
  190. */
  191. return (real_pc + (npc - pc));
  192. }
  193. return real_pc + 0x4UL;
  194. }
  195. /* If INSN is an instruction which writes it's PC location
  196. * into a destination register, fix that up.
  197. */
  198. static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
  199. unsigned long real_pc)
  200. {
  201. unsigned long *slot = NULL;
  202. /* Simplest cast is call, which always uses %o7 */
  203. if ((insn & 0xc0000000) == 0x40000000) {
  204. slot = &regs->u_regs[UREG_I7];
  205. }
  206. /* Jmpl encodes the register inside of the opcode */
  207. if ((insn & 0xc1f80000) == 0x81c00000) {
  208. unsigned long rd = ((insn >> 25) & 0x1f);
  209. if (rd <= 15) {
  210. slot = &regs->u_regs[rd];
  211. } else {
  212. /* Hard case, it goes onto the stack. */
  213. flushw_all();
  214. rd -= 16;
  215. slot = (unsigned long *)
  216. (regs->u_regs[UREG_FP] + STACK_BIAS);
  217. slot += rd;
  218. }
  219. }
  220. if (slot != NULL)
  221. *slot = real_pc;
  222. }
  223. /*
  224. * Called after single-stepping. p->addr is the address of the
  225. * instruction whose first byte has been replaced by the breakpoint
  226. * instruction. To avoid the SMP problems that can occur when we
  227. * temporarily put back the original opcode to single-step, we
  228. * single-stepped a copy of the instruction. The address of this
  229. * copy is p->ainsn.insn.
  230. *
  231. * This function prepares to return from the post-single-step
  232. * breakpoint trap.
  233. */
  234. static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
  235. {
  236. u32 insn = p->ainsn.insn[0];
  237. regs->tpc = current_kprobe_orig_tnpc;
  238. regs->tnpc = relbranch_fixup(insn,
  239. (unsigned long) p->addr,
  240. (unsigned long) &p->ainsn.insn[0],
  241. regs->tnpc);
  242. retpc_fixup(regs, insn, (unsigned long) p->addr);
  243. regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
  244. current_kprobe_orig_tstate_pil);
  245. }
  246. static inline int post_kprobe_handler(struct pt_regs *regs)
  247. {
  248. if (!kprobe_running())
  249. return 0;
  250. if ((kprobe_status != KPROBE_REENTER) && current_kprobe->post_handler) {
  251. kprobe_status = KPROBE_HIT_SSDONE;
  252. current_kprobe->post_handler(current_kprobe, regs, 0);
  253. }
  254. resume_execution(current_kprobe, regs);
  255. /*Restore back the original saved kprobes variables and continue. */
  256. if (kprobe_status == KPROBE_REENTER) {
  257. restore_previous_kprobe();
  258. goto out;
  259. }
  260. unlock_kprobes();
  261. out:
  262. preempt_enable_no_resched();
  263. return 1;
  264. }
  265. /* Interrupts disabled, kprobe_lock held. */
  266. static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
  267. {
  268. if (current_kprobe->fault_handler
  269. && current_kprobe->fault_handler(current_kprobe, regs, trapnr))
  270. return 1;
  271. if (kprobe_status & KPROBE_HIT_SS) {
  272. resume_execution(current_kprobe, regs);
  273. unlock_kprobes();
  274. preempt_enable_no_resched();
  275. }
  276. return 0;
  277. }
  278. /*
  279. * Wrapper routine to for handling exceptions.
  280. */
  281. int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
  282. unsigned long val, void *data)
  283. {
  284. struct die_args *args = (struct die_args *)data;
  285. switch (val) {
  286. case DIE_DEBUG:
  287. if (kprobe_handler(args->regs))
  288. return NOTIFY_STOP;
  289. break;
  290. case DIE_DEBUG_2:
  291. if (post_kprobe_handler(args->regs))
  292. return NOTIFY_STOP;
  293. break;
  294. case DIE_GPF:
  295. if (kprobe_running() &&
  296. kprobe_fault_handler(args->regs, args->trapnr))
  297. return NOTIFY_STOP;
  298. break;
  299. case DIE_PAGE_FAULT:
  300. if (kprobe_running() &&
  301. kprobe_fault_handler(args->regs, args->trapnr))
  302. return NOTIFY_STOP;
  303. break;
  304. default:
  305. break;
  306. }
  307. return NOTIFY_DONE;
  308. }
  309. asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
  310. struct pt_regs *regs)
  311. {
  312. BUG_ON(trap_level != 0x170 && trap_level != 0x171);
  313. if (user_mode(regs)) {
  314. local_irq_enable();
  315. bad_trap(regs, trap_level);
  316. return;
  317. }
  318. /* trap_level == 0x170 --> ta 0x70
  319. * trap_level == 0x171 --> ta 0x71
  320. */
  321. if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
  322. (trap_level == 0x170) ? "debug" : "debug_2",
  323. regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
  324. bad_trap(regs, trap_level);
  325. }
  326. /* Jprobes support. */
  327. static struct pt_regs jprobe_saved_regs;
  328. static struct pt_regs *jprobe_saved_regs_location;
  329. static struct sparc_stackf jprobe_saved_stack;
  330. int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
  331. {
  332. struct jprobe *jp = container_of(p, struct jprobe, kp);
  333. jprobe_saved_regs_location = regs;
  334. memcpy(&jprobe_saved_regs, regs, sizeof(*regs));
  335. /* Save a whole stack frame, this gets arguments
  336. * pushed onto the stack after using up all the
  337. * arg registers.
  338. */
  339. memcpy(&jprobe_saved_stack,
  340. (char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
  341. sizeof(jprobe_saved_stack));
  342. regs->tpc = (unsigned long) jp->entry;
  343. regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
  344. regs->tstate |= TSTATE_PIL;
  345. return 1;
  346. }
  347. void __kprobes jprobe_return(void)
  348. {
  349. preempt_enable_no_resched();
  350. __asm__ __volatile__(
  351. ".globl jprobe_return_trap_instruction\n"
  352. "jprobe_return_trap_instruction:\n\t"
  353. "ta 0x70");
  354. }
  355. extern void jprobe_return_trap_instruction(void);
  356. extern void __show_regs(struct pt_regs * regs);
  357. int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
  358. {
  359. u32 *addr = (u32 *) regs->tpc;
  360. if (addr == (u32 *) jprobe_return_trap_instruction) {
  361. if (jprobe_saved_regs_location != regs) {
  362. printk("JPROBE: Current regs (%p) does not match "
  363. "saved regs (%p).\n",
  364. regs, jprobe_saved_regs_location);
  365. printk("JPROBE: Saved registers\n");
  366. __show_regs(jprobe_saved_regs_location);
  367. printk("JPROBE: Current registers\n");
  368. __show_regs(regs);
  369. BUG();
  370. }
  371. /* Restore old register state. Do pt_regs
  372. * first so that UREG_FP is the original one for
  373. * the stack frame restore.
  374. */
  375. memcpy(regs, &jprobe_saved_regs, sizeof(*regs));
  376. memcpy((char *) (regs->u_regs[UREG_FP] + STACK_BIAS),
  377. &jprobe_saved_stack,
  378. sizeof(jprobe_saved_stack));
  379. return 1;
  380. }
  381. return 0;
  382. }
  383. /* architecture specific initialization */
  384. int arch_init_kprobes(void)
  385. {
  386. return 0;
  387. }