sun4d_smp.c 13 KB

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  1. /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
  2. *
  3. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  4. *
  5. * Based on sun4m's smp.c, which is:
  6. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  7. */
  8. #include <asm/head.h>
  9. #include <linux/kernel.h>
  10. #include <linux/sched.h>
  11. #include <linux/threads.h>
  12. #include <linux/smp.h>
  13. #include <linux/smp_lock.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel_stat.h>
  16. #include <linux/init.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/mm.h>
  19. #include <linux/swap.h>
  20. #include <linux/profile.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/atomic.h>
  23. #include <asm/delay.h>
  24. #include <asm/irq.h>
  25. #include <asm/page.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/oplib.h>
  29. #include <asm/sbus.h>
  30. #include <asm/sbi.h>
  31. #include <asm/tlbflush.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/cpudata.h>
  34. #define IRQ_CROSS_CALL 15
  35. extern ctxd_t *srmmu_ctx_table_phys;
  36. extern void calibrate_delay(void);
  37. extern volatile int smp_processors_ready;
  38. extern int smp_num_cpus;
  39. static int smp_highest_cpu;
  40. extern volatile unsigned long cpu_callin_map[NR_CPUS];
  41. extern struct cpuinfo_sparc cpu_data[NR_CPUS];
  42. extern unsigned char boot_cpu_id;
  43. extern int smp_activated;
  44. extern volatile int __cpu_number_map[NR_CPUS];
  45. extern volatile int __cpu_logical_map[NR_CPUS];
  46. extern volatile unsigned long ipi_count;
  47. extern volatile int smp_process_available;
  48. extern volatile int smp_commenced;
  49. extern int __smp4d_processor_id(void);
  50. /* #define SMP_DEBUG */
  51. #ifdef SMP_DEBUG
  52. #define SMP_PRINTK(x) printk x
  53. #else
  54. #define SMP_PRINTK(x)
  55. #endif
  56. static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  57. {
  58. __asm__ __volatile__("swap [%1], %0\n\t" :
  59. "=&r" (val), "=&r" (ptr) :
  60. "0" (val), "1" (ptr));
  61. return val;
  62. }
  63. static void smp_setup_percpu_timer(void);
  64. extern void cpu_probe(void);
  65. extern void sun4d_distribute_irqs(void);
  66. void __init smp4d_callin(void)
  67. {
  68. int cpuid = hard_smp4d_processor_id();
  69. extern spinlock_t sun4d_imsk_lock;
  70. unsigned long flags;
  71. /* Show we are alive */
  72. cpu_leds[cpuid] = 0x6;
  73. show_leds(cpuid);
  74. /* Enable level15 interrupt, disable level14 interrupt for now */
  75. cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
  76. local_flush_cache_all();
  77. local_flush_tlb_all();
  78. /*
  79. * Unblock the master CPU _only_ when the scheduler state
  80. * of all secondary CPUs will be up-to-date, so after
  81. * the SMP initialization the master will be just allowed
  82. * to call the scheduler code.
  83. */
  84. /* Get our local ticker going. */
  85. smp_setup_percpu_timer();
  86. calibrate_delay();
  87. smp_store_cpu_info(cpuid);
  88. local_flush_cache_all();
  89. local_flush_tlb_all();
  90. /* Allow master to continue. */
  91. swap((unsigned long *)&cpu_callin_map[cpuid], 1);
  92. local_flush_cache_all();
  93. local_flush_tlb_all();
  94. cpu_probe();
  95. while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
  96. barrier();
  97. while(current_set[cpuid]->cpu != cpuid)
  98. barrier();
  99. /* Fix idle thread fields. */
  100. __asm__ __volatile__("ld [%0], %%g6\n\t"
  101. : : "r" (&current_set[cpuid])
  102. : "memory" /* paranoid */);
  103. cpu_leds[cpuid] = 0x9;
  104. show_leds(cpuid);
  105. /* Attach to the address space of init_task. */
  106. atomic_inc(&init_mm.mm_count);
  107. current->active_mm = &init_mm;
  108. local_flush_cache_all();
  109. local_flush_tlb_all();
  110. local_irq_enable(); /* We don't allow PIL 14 yet */
  111. while(!smp_commenced)
  112. barrier();
  113. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  114. cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
  115. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  116. }
  117. extern void init_IRQ(void);
  118. extern void cpu_panic(void);
  119. /*
  120. * Cycle through the processors asking the PROM to start each one.
  121. */
  122. extern struct linux_prom_registers smp_penguin_ctable;
  123. extern unsigned long trapbase_cpu1[];
  124. extern unsigned long trapbase_cpu2[];
  125. extern unsigned long trapbase_cpu3[];
  126. void __init smp4d_boot_cpus(void)
  127. {
  128. int cpucount = 0;
  129. int i, mid;
  130. printk("Entering SMP Mode...\n");
  131. if (boot_cpu_id)
  132. current_set[0] = NULL;
  133. local_irq_enable();
  134. cpus_clear(cpu_present_map);
  135. /* XXX This whole thing has to go. See sparc64. */
  136. for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++)
  137. cpu_set(mid, cpu_present_map);
  138. SMP_PRINTK(("cpu_present_map %08lx\n", cpus_addr(cpu_present_map)[0]));
  139. for(i=0; i < NR_CPUS; i++)
  140. __cpu_number_map[i] = -1;
  141. for(i=0; i < NR_CPUS; i++)
  142. __cpu_logical_map[i] = -1;
  143. __cpu_number_map[boot_cpu_id] = 0;
  144. __cpu_logical_map[0] = boot_cpu_id;
  145. current_thread_info()->cpu = boot_cpu_id;
  146. smp_store_cpu_info(boot_cpu_id);
  147. smp_setup_percpu_timer();
  148. local_flush_cache_all();
  149. if (cpu_find_by_instance(1, NULL, NULL))
  150. return; /* Not an MP box. */
  151. SMP_PRINTK(("Iterating over CPUs\n"));
  152. for(i = 0; i < NR_CPUS; i++) {
  153. if(i == boot_cpu_id)
  154. continue;
  155. if (cpu_isset(i, cpu_present_map)) {
  156. extern unsigned long sun4d_cpu_startup;
  157. unsigned long *entry = &sun4d_cpu_startup;
  158. struct task_struct *p;
  159. int timeout;
  160. int no;
  161. /* Cook up an idler for this guy. */
  162. p = fork_idle(i);
  163. cpucount++;
  164. current_set[i] = p->thread_info;
  165. for (no = 0; !cpu_find_by_instance(no, NULL, &mid)
  166. && mid != i; no++) ;
  167. /*
  168. * Initialize the contexts table
  169. * Since the call to prom_startcpu() trashes the structure,
  170. * we need to re-initialize it for each cpu
  171. */
  172. smp_penguin_ctable.which_io = 0;
  173. smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
  174. smp_penguin_ctable.reg_size = 0;
  175. /* whirrr, whirrr, whirrrrrrrrr... */
  176. SMP_PRINTK(("Starting CPU %d at %p task %d node %08x\n", i, entry, cpucount, cpu_data(no).prom_node));
  177. local_flush_cache_all();
  178. prom_startcpu(cpu_data(no).prom_node,
  179. &smp_penguin_ctable, 0, (char *)entry);
  180. SMP_PRINTK(("prom_startcpu returned :)\n"));
  181. /* wheee... it's going... */
  182. for(timeout = 0; timeout < 10000; timeout++) {
  183. if(cpu_callin_map[i])
  184. break;
  185. udelay(200);
  186. }
  187. if(cpu_callin_map[i]) {
  188. /* Another "Red Snapper". */
  189. __cpu_number_map[i] = cpucount;
  190. __cpu_logical_map[cpucount] = i;
  191. } else {
  192. cpucount--;
  193. printk("Processor %d is stuck.\n", i);
  194. }
  195. }
  196. if(!(cpu_callin_map[i])) {
  197. cpu_clear(i, cpu_present_map);
  198. __cpu_number_map[i] = -1;
  199. }
  200. }
  201. local_flush_cache_all();
  202. if(cpucount == 0) {
  203. printk("Error: only one Processor found.\n");
  204. cpu_present_map = cpumask_of_cpu(hard_smp4d_processor_id());
  205. } else {
  206. unsigned long bogosum = 0;
  207. for(i = 0; i < NR_CPUS; i++) {
  208. if (cpu_isset(i, cpu_present_map)) {
  209. bogosum += cpu_data(i).udelay_val;
  210. smp_highest_cpu = i;
  211. }
  212. }
  213. SMP_PRINTK(("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n", cpucount + 1, bogosum/(500000/HZ), (bogosum/(5000/HZ))%100));
  214. printk("Total of %d Processors activated (%lu.%02lu BogoMIPS).\n",
  215. cpucount + 1,
  216. bogosum/(500000/HZ),
  217. (bogosum/(5000/HZ))%100);
  218. smp_activated = 1;
  219. smp_num_cpus = cpucount + 1;
  220. }
  221. /* Free unneeded trap tables */
  222. ClearPageReserved(virt_to_page(trapbase_cpu1));
  223. set_page_count(virt_to_page(trapbase_cpu1), 1);
  224. free_page((unsigned long)trapbase_cpu1);
  225. totalram_pages++;
  226. num_physpages++;
  227. ClearPageReserved(virt_to_page(trapbase_cpu2));
  228. set_page_count(virt_to_page(trapbase_cpu2), 1);
  229. free_page((unsigned long)trapbase_cpu2);
  230. totalram_pages++;
  231. num_physpages++;
  232. ClearPageReserved(virt_to_page(trapbase_cpu3));
  233. set_page_count(virt_to_page(trapbase_cpu3), 1);
  234. free_page((unsigned long)trapbase_cpu3);
  235. totalram_pages++;
  236. num_physpages++;
  237. /* Ok, they are spinning and ready to go. */
  238. smp_processors_ready = 1;
  239. sun4d_distribute_irqs();
  240. }
  241. static struct smp_funcall {
  242. smpfunc_t func;
  243. unsigned long arg1;
  244. unsigned long arg2;
  245. unsigned long arg3;
  246. unsigned long arg4;
  247. unsigned long arg5;
  248. unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
  249. unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
  250. } ccall_info __attribute__((aligned(8)));
  251. static DEFINE_SPINLOCK(cross_call_lock);
  252. /* Cross calls must be serialized, at least currently. */
  253. void smp4d_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
  254. unsigned long arg3, unsigned long arg4, unsigned long arg5)
  255. {
  256. if(smp_processors_ready) {
  257. register int high = smp_highest_cpu;
  258. unsigned long flags;
  259. spin_lock_irqsave(&cross_call_lock, flags);
  260. {
  261. /* If you make changes here, make sure gcc generates proper code... */
  262. register smpfunc_t f asm("i0") = func;
  263. register unsigned long a1 asm("i1") = arg1;
  264. register unsigned long a2 asm("i2") = arg2;
  265. register unsigned long a3 asm("i3") = arg3;
  266. register unsigned long a4 asm("i4") = arg4;
  267. register unsigned long a5 asm("i5") = arg5;
  268. __asm__ __volatile__(
  269. "std %0, [%6]\n\t"
  270. "std %2, [%6 + 8]\n\t"
  271. "std %4, [%6 + 16]\n\t" : :
  272. "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
  273. "r" (&ccall_info.func));
  274. }
  275. /* Init receive/complete mapping, plus fire the IPI's off. */
  276. {
  277. cpumask_t mask;
  278. register int i;
  279. mask = cpumask_of_cpu(hard_smp4d_processor_id());
  280. cpus_andnot(mask, cpu_present_map, mask);
  281. for(i = 0; i <= high; i++) {
  282. if (cpu_isset(i, mask)) {
  283. ccall_info.processors_in[i] = 0;
  284. ccall_info.processors_out[i] = 0;
  285. sun4d_send_ipi(i, IRQ_CROSS_CALL);
  286. }
  287. }
  288. }
  289. {
  290. register int i;
  291. i = 0;
  292. do {
  293. while(!ccall_info.processors_in[i])
  294. barrier();
  295. } while(++i <= high);
  296. i = 0;
  297. do {
  298. while(!ccall_info.processors_out[i])
  299. barrier();
  300. } while(++i <= high);
  301. }
  302. spin_unlock_irqrestore(&cross_call_lock, flags);
  303. }
  304. }
  305. /* Running cross calls. */
  306. void smp4d_cross_call_irq(void)
  307. {
  308. int i = hard_smp4d_processor_id();
  309. ccall_info.processors_in[i] = 1;
  310. ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
  311. ccall_info.arg4, ccall_info.arg5);
  312. ccall_info.processors_out[i] = 1;
  313. }
  314. static int smp4d_stop_cpu_sender;
  315. static void smp4d_stop_cpu(void)
  316. {
  317. int me = hard_smp4d_processor_id();
  318. if (me != smp4d_stop_cpu_sender)
  319. while(1) barrier();
  320. }
  321. /* Cross calls, in order to work efficiently and atomically do all
  322. * the message passing work themselves, only stopcpu and reschedule
  323. * messages come through here.
  324. */
  325. void smp4d_message_pass(int target, int msg, unsigned long data, int wait)
  326. {
  327. int me = hard_smp4d_processor_id();
  328. SMP_PRINTK(("smp4d_message_pass %d %d %08lx %d\n", target, msg, data, wait));
  329. if (msg == MSG_STOP_CPU && target == MSG_ALL_BUT_SELF) {
  330. unsigned long flags;
  331. static DEFINE_SPINLOCK(stop_cpu_lock);
  332. spin_lock_irqsave(&stop_cpu_lock, flags);
  333. smp4d_stop_cpu_sender = me;
  334. smp4d_cross_call((smpfunc_t)smp4d_stop_cpu, 0, 0, 0, 0, 0);
  335. spin_unlock_irqrestore(&stop_cpu_lock, flags);
  336. }
  337. printk("Yeeee, trying to send SMP msg(%d) to %d on cpu %d\n", msg, target, me);
  338. panic("Bogon SMP message pass.");
  339. }
  340. void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
  341. {
  342. int cpu = hard_smp4d_processor_id();
  343. static int cpu_tick[NR_CPUS];
  344. static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
  345. bw_get_prof_limit(cpu);
  346. bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
  347. cpu_tick[cpu]++;
  348. if (!(cpu_tick[cpu] & 15)) {
  349. if (cpu_tick[cpu] == 0x60)
  350. cpu_tick[cpu] = 0;
  351. cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
  352. show_leds(cpu);
  353. }
  354. profile_tick(CPU_PROFILING, regs);
  355. if(!--prof_counter(cpu)) {
  356. int user = user_mode(regs);
  357. irq_enter();
  358. update_process_times(user);
  359. irq_exit();
  360. prof_counter(cpu) = prof_multiplier(cpu);
  361. }
  362. }
  363. extern unsigned int lvl14_resolution;
  364. static void __init smp_setup_percpu_timer(void)
  365. {
  366. int cpu = hard_smp4d_processor_id();
  367. prof_counter(cpu) = prof_multiplier(cpu) = 1;
  368. load_profile_irq(cpu, lvl14_resolution);
  369. }
  370. void __init smp4d_blackbox_id(unsigned *addr)
  371. {
  372. int rd = *addr & 0x3e000000;
  373. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  374. addr[1] = 0x01000000; /* nop */
  375. addr[2] = 0x01000000; /* nop */
  376. }
  377. void __init smp4d_blackbox_current(unsigned *addr)
  378. {
  379. int rd = *addr & 0x3e000000;
  380. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  381. addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
  382. addr[4] = 0x01000000; /* nop */
  383. }
  384. void __init sun4d_init_smp(void)
  385. {
  386. int i;
  387. extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
  388. /* Patch ipi15 trap table */
  389. t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
  390. /* And set btfixup... */
  391. BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
  392. BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
  393. BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
  394. BTFIXUPSET_CALL(smp_message_pass, smp4d_message_pass, BTFIXUPCALL_NORM);
  395. BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
  396. for (i = 0; i < NR_CPUS; i++) {
  397. ccall_info.processors_in[i] = 1;
  398. ccall_info.processors_out[i] = 1;
  399. }
  400. }