tlb-sh3.c 2.2 KB

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  1. /*
  2. * arch/sh/mm/tlb-sh3.c
  3. *
  4. * SH-3 specific TLB operations
  5. *
  6. * Copyright (C) 1999 Niibe Yutaka
  7. * Copyright (C) 2002 Paul Mundt
  8. *
  9. * Released under the terms of the GNU GPL v2.0.
  10. */
  11. #include <linux/signal.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/string.h>
  16. #include <linux/types.h>
  17. #include <linux/ptrace.h>
  18. #include <linux/mman.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/smp_lock.h>
  22. #include <linux/interrupt.h>
  23. #include <asm/system.h>
  24. #include <asm/io.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/mmu_context.h>
  28. #include <asm/cacheflush.h>
  29. void update_mmu_cache(struct vm_area_struct * vma,
  30. unsigned long address, pte_t pte)
  31. {
  32. unsigned long flags;
  33. unsigned long pteval;
  34. unsigned long vpn;
  35. /* Ptrace may call this routine. */
  36. if (vma && current->active_mm != vma->vm_mm)
  37. return;
  38. #if defined(CONFIG_SH7705_CACHE_32KB)
  39. struct page *page;
  40. page = pte_page(pte);
  41. if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) {
  42. unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
  43. __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE);
  44. __set_bit(PG_mapped, &page->flags);
  45. }
  46. #endif
  47. local_irq_save(flags);
  48. /* Set PTEH register */
  49. vpn = (address & MMU_VPN_MASK) | get_asid();
  50. ctrl_outl(vpn, MMU_PTEH);
  51. pteval = pte_val(pte);
  52. /* Set PTEL register */
  53. pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
  54. /* conveniently, we want all the software flags to be 0 anyway */
  55. ctrl_outl(pteval, MMU_PTEL);
  56. /* Load the TLB */
  57. asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
  58. local_irq_restore(flags);
  59. }
  60. void __flush_tlb_page(unsigned long asid, unsigned long page)
  61. {
  62. unsigned long addr, data;
  63. int i, ways = MMU_NTLB_WAYS;
  64. /*
  65. * NOTE: PTEH.ASID should be set to this MM
  66. * _AND_ we need to write ASID to the array.
  67. *
  68. * It would be simple if we didn't need to set PTEH.ASID...
  69. */
  70. addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
  71. data = (page & 0xfffe0000) | asid; /* VALID bit is off */
  72. if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
  73. addr |= MMU_PAGE_ASSOC_BIT;
  74. ways = 1; /* we already know the way .. */
  75. }
  76. for (i = 0; i < ways; i++)
  77. ctrl_outl(data, addr + (i << 8));
  78. }