cache-sh2.c 1.2 KB

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  1. /*
  2. * arch/sh/mm/cache-sh2.c
  3. *
  4. * Copyright (C) 2002 Paul Mundt
  5. *
  6. * Released under the terms of the GNU GPL v2.0.
  7. */
  8. #include <linux/init.h>
  9. #include <linux/mm.h>
  10. #include <asm/cache.h>
  11. #include <asm/addrspace.h>
  12. #include <asm/processor.h>
  13. #include <asm/cacheflush.h>
  14. #include <asm/io.h>
  15. /*
  16. * Calculate the OC address and set the way bit on the SH-2.
  17. *
  18. * We must have already jump_to_P2()'ed prior to calling this
  19. * function, since we rely on CCR manipulation to do the
  20. * Right Thing(tm).
  21. */
  22. unsigned long __get_oc_addr(unsigned long set, unsigned long way)
  23. {
  24. unsigned long ccr;
  25. /*
  26. * On SH-2 the way bit isn't tracked in the address field
  27. * if we're doing address array access .. instead, we need
  28. * to manually switch out the way in the CCR.
  29. */
  30. ccr = ctrl_inl(CCR);
  31. ccr &= ~0x00c0;
  32. ccr |= way << cpu_data->dcache.way_shift;
  33. /*
  34. * Despite the number of sets being halved, we end up losing
  35. * the first 2 ways to OCRAM instead of the last 2 (if we're
  36. * 4-way). As a result, forcibly setting the W1 bit handily
  37. * bumps us up 2 ways.
  38. */
  39. if (ccr & CCR_CACHE_ORA)
  40. ccr |= 1 << (cpu_data->dcache.way_shift + 1);
  41. ctrl_outl(ccr, CCR);
  42. return CACHE_OC_ADDRESS_ARRAY | (set << cpu_data->dcache.entry_shift);
  43. }