dma-sh.h 1.3 KB

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  1. /*
  2. * arch/sh/drivers/dma/dma-sh.h
  3. *
  4. * Copyright (C) 2000 Takashi YOSHII
  5. * Copyright (C) 2003 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #ifndef __DMA_SH_H
  12. #define __DMA_SH_H
  13. /* Definitions for the SuperH DMAC */
  14. #define REQ_L 0x00000000
  15. #define REQ_E 0x00080000
  16. #define RACK_H 0x00000000
  17. #define RACK_L 0x00040000
  18. #define ACK_R 0x00000000
  19. #define ACK_W 0x00020000
  20. #define ACK_H 0x00000000
  21. #define ACK_L 0x00010000
  22. #define DM_INC 0x00004000
  23. #define DM_DEC 0x00008000
  24. #define SM_INC 0x00001000
  25. #define SM_DEC 0x00002000
  26. #define RS_IN 0x00000200
  27. #define RS_OUT 0x00000300
  28. #define TM_BURST 0x0000080
  29. #define TS_8 0x00000010
  30. #define TS_16 0x00000020
  31. #define TS_32 0x00000030
  32. #define TS_64 0x00000000
  33. #define TS_BLK 0x00000040
  34. #define CHCR_DE 0x00000001
  35. #define CHCR_TE 0x00000002
  36. #define CHCR_IE 0x00000004
  37. /* Define the default configuration for dual address memory-memory transfer.
  38. * The 0x400 value represents auto-request, external->external.
  39. */
  40. #define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
  41. #define DMAOR_COD 0x00000008
  42. #define DMAOR_AE 0x00000004
  43. #define DMAOR_NMIF 0x00000002
  44. #define DMAOR_DME 0x00000001
  45. #define MAX_DMAC_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
  46. #endif /* __DMA_SH_H */