dma-g2.c 4.1 KB

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  1. /*
  2. * arch/sh/drivers/dma/dma-g2.c
  3. *
  4. * G2 bus DMA support
  5. *
  6. * Copyright (C) 2003, 2004 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <asm/mach/sysasic.h>
  17. #include <asm/mach/dma.h>
  18. #include <asm/dma.h>
  19. struct g2_channel {
  20. unsigned long g2_addr; /* G2 bus address */
  21. unsigned long root_addr; /* Root bus (SH-4) address */
  22. unsigned long size; /* Size (in bytes), 32-byte aligned */
  23. unsigned long direction; /* Transfer direction */
  24. unsigned long ctrl; /* Transfer control */
  25. unsigned long chan_enable; /* Channel enable */
  26. unsigned long xfer_enable; /* Transfer enable */
  27. unsigned long xfer_stat; /* Transfer status */
  28. } __attribute__ ((aligned(32)));
  29. struct g2_status {
  30. unsigned long g2_addr;
  31. unsigned long root_addr;
  32. unsigned long size;
  33. unsigned long status;
  34. } __attribute__ ((aligned(16)));
  35. struct g2_dma_info {
  36. struct g2_channel channel[G2_NR_DMA_CHANNELS];
  37. unsigned long pad1[G2_NR_DMA_CHANNELS];
  38. unsigned long wait_state;
  39. unsigned long pad2[10];
  40. unsigned long magic;
  41. struct g2_status status[G2_NR_DMA_CHANNELS];
  42. } __attribute__ ((aligned(256)));
  43. static volatile struct g2_dma_info *g2_dma = (volatile struct g2_dma_info *)0xa05f7800;
  44. static irqreturn_t g2_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  45. {
  46. /* FIXME: Do some meaningful completion work here.. */
  47. return IRQ_HANDLED;
  48. }
  49. static struct irqaction g2_dma_irq = {
  50. .name = "g2 DMA handler",
  51. .handler = g2_dma_interrupt,
  52. .flags = SA_INTERRUPT,
  53. };
  54. static int g2_enable_dma(struct dma_channel *chan)
  55. {
  56. unsigned int chan_nr = chan->chan;
  57. g2_dma->channel[chan_nr].chan_enable = 1;
  58. g2_dma->channel[chan_nr].xfer_enable = 1;
  59. return 0;
  60. }
  61. static int g2_disable_dma(struct dma_channel *chan)
  62. {
  63. unsigned int chan_nr = chan->chan;
  64. g2_dma->channel[chan_nr].chan_enable = 0;
  65. g2_dma->channel[chan_nr].xfer_enable = 0;
  66. return 0;
  67. }
  68. static int g2_xfer_dma(struct dma_channel *chan)
  69. {
  70. unsigned int chan_nr = chan->chan;
  71. if (chan->sar & 31) {
  72. printk("g2dma: unaligned source 0x%lx\n", chan->sar);
  73. return -EINVAL;
  74. }
  75. if (chan->dar & 31) {
  76. printk("g2dma: unaligned dest 0x%lx\n", chan->dar);
  77. return -EINVAL;
  78. }
  79. /* Align the count */
  80. if (chan->count & 31)
  81. chan->count = (chan->count + (32 - 1)) & ~(32 - 1);
  82. /* Fixup destination */
  83. chan->dar += 0xa0800000;
  84. /* Fixup direction */
  85. chan->mode = !chan->mode;
  86. flush_icache_range((unsigned long)chan->sar, chan->count);
  87. g2_disable_dma(chan);
  88. g2_dma->channel[chan_nr].g2_addr = chan->dar & 0x1fffffe0;
  89. g2_dma->channel[chan_nr].root_addr = chan->sar & 0x1fffffe0;
  90. g2_dma->channel[chan_nr].size = (chan->count & ~31) | 0x80000000;
  91. g2_dma->channel[chan_nr].direction = chan->mode;
  92. /*
  93. * bit 0 - ???
  94. * bit 1 - if set, generate a hardware event on transfer completion
  95. * bit 2 - ??? something to do with suspend?
  96. */
  97. g2_dma->channel[chan_nr].ctrl = 5; /* ?? */
  98. g2_enable_dma(chan);
  99. /* debug cruft */
  100. pr_debug("count, sar, dar, mode, ctrl, chan, xfer: %ld, 0x%08lx, "
  101. "0x%08lx, %ld, %ld, %ld, %ld\n",
  102. g2_dma->channel[chan_nr].size,
  103. g2_dma->channel[chan_nr].root_addr,
  104. g2_dma->channel[chan_nr].g2_addr,
  105. g2_dma->channel[chan_nr].direction,
  106. g2_dma->channel[chan_nr].ctrl,
  107. g2_dma->channel[chan_nr].chan_enable,
  108. g2_dma->channel[chan_nr].xfer_enable);
  109. return 0;
  110. }
  111. static struct dma_ops g2_dma_ops = {
  112. .xfer = g2_xfer_dma,
  113. };
  114. static struct dma_info g2_dma_info = {
  115. .name = "G2 DMA",
  116. .nr_channels = 4,
  117. .ops = &g2_dma_ops,
  118. .flags = DMAC_CHANNELS_TEI_CAPABLE,
  119. };
  120. static int __init g2_dma_init(void)
  121. {
  122. setup_irq(HW_EVENT_G2_DMA, &g2_dma_irq);
  123. /* Magic */
  124. g2_dma->wait_state = 27;
  125. g2_dma->magic = 0x4659404f;
  126. return register_dmac(&g2_dma_info);
  127. }
  128. static void __exit g2_dma_exit(void)
  129. {
  130. free_irq(HW_EVENT_G2_DMA, 0);
  131. }
  132. subsys_initcall(g2_dma_init);
  133. module_exit(g2_dma_exit);
  134. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
  135. MODULE_DESCRIPTION("G2 bus DMA driver");
  136. MODULE_LICENSE("GPL");