cacheflush.S 1.5 KB

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  1. /*
  2. * vDSO provided cache flush routines
  3. *
  4. * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org),
  5. * IBM Corp.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <asm/processor.h>
  14. #include <asm/ppc_asm.h>
  15. #include <asm/vdso.h>
  16. #include <asm/offsets.h>
  17. .text
  18. /*
  19. * Default "generic" version of __kernel_sync_dicache.
  20. *
  21. * void __kernel_sync_dicache(unsigned long start, unsigned long end)
  22. *
  23. * Flushes the data cache & invalidate the instruction cache for the
  24. * provided range [start, end[
  25. *
  26. * Note: all CPUs supported by this kernel have a 128 bytes cache
  27. * line size so we don't have to peek that info from the datapage
  28. */
  29. V_FUNCTION_BEGIN(__kernel_sync_dicache)
  30. .cfi_startproc
  31. li r5,127
  32. andc r6,r3,r5 /* round low to line bdy */
  33. subf r8,r6,r4 /* compute length */
  34. add r8,r8,r5 /* ensure we get enough */
  35. srwi. r8,r8,7 /* compute line count */
  36. beqlr /* nothing to do? */
  37. mtctr r8
  38. mr r3,r6
  39. 1: dcbst 0,r3
  40. addi r3,r3,128
  41. bdnz 1b
  42. sync
  43. mtctr r8
  44. 1: icbi 0,r6
  45. addi r6,r6,128
  46. bdnz 1b
  47. isync
  48. li r3,0
  49. blr
  50. .cfi_endproc
  51. V_FUNCTION_END(__kernel_sync_dicache)
  52. /*
  53. * POWER5 version of __kernel_sync_dicache
  54. */
  55. V_FUNCTION_BEGIN(__kernel_sync_dicache_p5)
  56. .cfi_startproc
  57. sync
  58. isync
  59. li r3,0
  60. blr
  61. .cfi_endproc
  62. V_FUNCTION_END(__kernel_sync_dicache_p5)