rtas_pci.c 12 KB

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  1. /*
  2. * arch/ppc64/kernel/rtas_pci.c
  3. *
  4. * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
  5. * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
  6. *
  7. * RTAS specific routines for PCI.
  8. *
  9. * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/threads.h>
  27. #include <linux/pci.h>
  28. #include <linux/string.h>
  29. #include <linux/init.h>
  30. #include <linux/bootmem.h>
  31. #include <asm/io.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/irq.h>
  34. #include <asm/prom.h>
  35. #include <asm/machdep.h>
  36. #include <asm/pci-bridge.h>
  37. #include <asm/iommu.h>
  38. #include <asm/rtas.h>
  39. #include "mpic.h"
  40. #include "pci.h"
  41. /* RTAS tokens */
  42. static int read_pci_config;
  43. static int write_pci_config;
  44. static int ibm_read_pci_config;
  45. static int ibm_write_pci_config;
  46. static int config_access_valid(struct device_node *dn, int where)
  47. {
  48. if (where < 256)
  49. return 1;
  50. if (where < 4096 && dn->pci_ext_config_space)
  51. return 1;
  52. return 0;
  53. }
  54. static int of_device_available(struct device_node * dn)
  55. {
  56. char * status;
  57. status = get_property(dn, "status", NULL);
  58. if (!status)
  59. return 1;
  60. if (!strcmp(status, "okay"))
  61. return 1;
  62. return 0;
  63. }
  64. static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val)
  65. {
  66. int returnval = -1;
  67. unsigned long buid, addr;
  68. int ret;
  69. if (!dn)
  70. return PCIBIOS_DEVICE_NOT_FOUND;
  71. if (!config_access_valid(dn, where))
  72. return PCIBIOS_BAD_REGISTER_NUMBER;
  73. addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
  74. (dn->devfn << 8) | (where & 0xff);
  75. buid = dn->phb->buid;
  76. if (buid) {
  77. ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
  78. addr, buid >> 32, buid & 0xffffffff, size);
  79. } else {
  80. ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
  81. }
  82. *val = returnval;
  83. if (ret)
  84. return PCIBIOS_DEVICE_NOT_FOUND;
  85. if (returnval == EEH_IO_ERROR_VALUE(size)
  86. && eeh_dn_check_failure (dn, NULL))
  87. return PCIBIOS_DEVICE_NOT_FOUND;
  88. return PCIBIOS_SUCCESSFUL;
  89. }
  90. static int rtas_pci_read_config(struct pci_bus *bus,
  91. unsigned int devfn,
  92. int where, int size, u32 *val)
  93. {
  94. struct device_node *busdn, *dn;
  95. if (bus->self)
  96. busdn = pci_device_to_OF_node(bus->self);
  97. else
  98. busdn = bus->sysdata; /* must be a phb */
  99. /* Search only direct children of the bus */
  100. for (dn = busdn->child; dn; dn = dn->sibling)
  101. if (dn->devfn == devfn && of_device_available(dn))
  102. return rtas_read_config(dn, where, size, val);
  103. return PCIBIOS_DEVICE_NOT_FOUND;
  104. }
  105. static int rtas_write_config(struct device_node *dn, int where, int size, u32 val)
  106. {
  107. unsigned long buid, addr;
  108. int ret;
  109. if (!dn)
  110. return PCIBIOS_DEVICE_NOT_FOUND;
  111. if (!config_access_valid(dn, where))
  112. return PCIBIOS_BAD_REGISTER_NUMBER;
  113. addr = ((where & 0xf00) << 20) | (dn->busno << 16) |
  114. (dn->devfn << 8) | (where & 0xff);
  115. buid = dn->phb->buid;
  116. if (buid) {
  117. ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr, buid >> 32, buid & 0xffffffff, size, (ulong) val);
  118. } else {
  119. ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
  120. }
  121. if (ret)
  122. return PCIBIOS_DEVICE_NOT_FOUND;
  123. return PCIBIOS_SUCCESSFUL;
  124. }
  125. static int rtas_pci_write_config(struct pci_bus *bus,
  126. unsigned int devfn,
  127. int where, int size, u32 val)
  128. {
  129. struct device_node *busdn, *dn;
  130. if (bus->self)
  131. busdn = pci_device_to_OF_node(bus->self);
  132. else
  133. busdn = bus->sysdata; /* must be a phb */
  134. /* Search only direct children of the bus */
  135. for (dn = busdn->child; dn; dn = dn->sibling)
  136. if (dn->devfn == devfn && of_device_available(dn))
  137. return rtas_write_config(dn, where, size, val);
  138. return PCIBIOS_DEVICE_NOT_FOUND;
  139. }
  140. struct pci_ops rtas_pci_ops = {
  141. rtas_pci_read_config,
  142. rtas_pci_write_config
  143. };
  144. int is_python(struct device_node *dev)
  145. {
  146. char *model = (char *)get_property(dev, "model", NULL);
  147. if (model && strstr(model, "Python"))
  148. return 1;
  149. return 0;
  150. }
  151. static int get_phb_reg_prop(struct device_node *dev,
  152. unsigned int addr_size_words,
  153. struct reg_property64 *reg)
  154. {
  155. unsigned int *ui_ptr = NULL, len;
  156. /* Found a PHB, now figure out where his registers are mapped. */
  157. ui_ptr = (unsigned int *)get_property(dev, "reg", &len);
  158. if (ui_ptr == NULL)
  159. return 1;
  160. if (addr_size_words == 1) {
  161. reg->address = ((struct reg_property32 *)ui_ptr)->address;
  162. reg->size = ((struct reg_property32 *)ui_ptr)->size;
  163. } else {
  164. *reg = *((struct reg_property64 *)ui_ptr);
  165. }
  166. return 0;
  167. }
  168. static void python_countermeasures(struct device_node *dev,
  169. unsigned int addr_size_words)
  170. {
  171. struct reg_property64 reg_struct;
  172. void __iomem *chip_regs;
  173. volatile u32 val;
  174. if (get_phb_reg_prop(dev, addr_size_words, &reg_struct))
  175. return;
  176. /* Python's register file is 1 MB in size. */
  177. chip_regs = ioremap(reg_struct.address & ~(0xfffffUL), 0x100000);
  178. /*
  179. * Firmware doesn't always clear this bit which is critical
  180. * for good performance - Anton
  181. */
  182. #define PRG_CL_RESET_VALID 0x00010000
  183. val = in_be32(chip_regs + 0xf6030);
  184. if (val & PRG_CL_RESET_VALID) {
  185. printk(KERN_INFO "Python workaround: ");
  186. val &= ~PRG_CL_RESET_VALID;
  187. out_be32(chip_regs + 0xf6030, val);
  188. /*
  189. * We must read it back for changes to
  190. * take effect
  191. */
  192. val = in_be32(chip_regs + 0xf6030);
  193. printk("reg0: %x\n", val);
  194. }
  195. iounmap(chip_regs);
  196. }
  197. void __init init_pci_config_tokens (void)
  198. {
  199. read_pci_config = rtas_token("read-pci-config");
  200. write_pci_config = rtas_token("write-pci-config");
  201. ibm_read_pci_config = rtas_token("ibm,read-pci-config");
  202. ibm_write_pci_config = rtas_token("ibm,write-pci-config");
  203. }
  204. unsigned long __devinit get_phb_buid (struct device_node *phb)
  205. {
  206. int addr_cells;
  207. unsigned int *buid_vals;
  208. unsigned int len;
  209. unsigned long buid;
  210. if (ibm_read_pci_config == -1) return 0;
  211. /* PHB's will always be children of the root node,
  212. * or so it is promised by the current firmware. */
  213. if (phb->parent == NULL)
  214. return 0;
  215. if (phb->parent->parent)
  216. return 0;
  217. buid_vals = (unsigned int *) get_property(phb, "reg", &len);
  218. if (buid_vals == NULL)
  219. return 0;
  220. addr_cells = prom_n_addr_cells(phb);
  221. if (addr_cells == 1) {
  222. buid = (unsigned long) buid_vals[0];
  223. } else {
  224. buid = (((unsigned long)buid_vals[0]) << 32UL) |
  225. (((unsigned long)buid_vals[1]) & 0xffffffff);
  226. }
  227. return buid;
  228. }
  229. static int phb_set_bus_ranges(struct device_node *dev,
  230. struct pci_controller *phb)
  231. {
  232. int *bus_range;
  233. unsigned int len;
  234. bus_range = (int *) get_property(dev, "bus-range", &len);
  235. if (bus_range == NULL || len < 2 * sizeof(int)) {
  236. return 1;
  237. }
  238. phb->first_busno = bus_range[0];
  239. phb->last_busno = bus_range[1];
  240. return 0;
  241. }
  242. static int __devinit setup_phb(struct device_node *dev,
  243. struct pci_controller *phb,
  244. unsigned int addr_size_words)
  245. {
  246. pci_setup_pci_controller(phb);
  247. if (is_python(dev))
  248. python_countermeasures(dev, addr_size_words);
  249. if (phb_set_bus_ranges(dev, phb))
  250. return 1;
  251. phb->arch_data = dev;
  252. phb->ops = &rtas_pci_ops;
  253. phb->buid = get_phb_buid(dev);
  254. return 0;
  255. }
  256. static void __devinit add_linux_pci_domain(struct device_node *dev,
  257. struct pci_controller *phb,
  258. struct property *of_prop)
  259. {
  260. memset(of_prop, 0, sizeof(struct property));
  261. of_prop->name = "linux,pci-domain";
  262. of_prop->length = sizeof(phb->global_number);
  263. of_prop->value = (unsigned char *)&of_prop[1];
  264. memcpy(of_prop->value, &phb->global_number, sizeof(phb->global_number));
  265. prom_add_property(dev, of_prop);
  266. }
  267. static struct pci_controller * __init alloc_phb(struct device_node *dev,
  268. unsigned int addr_size_words)
  269. {
  270. struct pci_controller *phb;
  271. struct property *of_prop;
  272. phb = alloc_bootmem(sizeof(struct pci_controller));
  273. if (phb == NULL)
  274. return NULL;
  275. of_prop = alloc_bootmem(sizeof(struct property) +
  276. sizeof(phb->global_number));
  277. if (!of_prop)
  278. return NULL;
  279. if (setup_phb(dev, phb, addr_size_words))
  280. return NULL;
  281. add_linux_pci_domain(dev, phb, of_prop);
  282. return phb;
  283. }
  284. static struct pci_controller * __devinit alloc_phb_dynamic(struct device_node *dev, unsigned int addr_size_words)
  285. {
  286. struct pci_controller *phb;
  287. phb = (struct pci_controller *)kmalloc(sizeof(struct pci_controller),
  288. GFP_KERNEL);
  289. if (phb == NULL)
  290. return NULL;
  291. if (setup_phb(dev, phb, addr_size_words))
  292. return NULL;
  293. phb->is_dynamic = 1;
  294. /* TODO: linux,pci-domain? */
  295. return phb;
  296. }
  297. unsigned long __init find_and_init_phbs(void)
  298. {
  299. struct device_node *node;
  300. struct pci_controller *phb;
  301. unsigned int root_size_cells = 0;
  302. unsigned int index;
  303. unsigned int *opprop = NULL;
  304. struct device_node *root = of_find_node_by_path("/");
  305. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  306. opprop = (unsigned int *)get_property(root,
  307. "platform-open-pic", NULL);
  308. }
  309. root_size_cells = prom_n_size_cells(root);
  310. index = 0;
  311. for (node = of_get_next_child(root, NULL);
  312. node != NULL;
  313. node = of_get_next_child(root, node)) {
  314. if (node->type == NULL || strcmp(node->type, "pci") != 0)
  315. continue;
  316. phb = alloc_phb(node, root_size_cells);
  317. if (!phb)
  318. continue;
  319. pci_process_bridge_OF_ranges(phb, node);
  320. pci_setup_phb_io(phb, index == 0);
  321. #ifdef CONFIG_PPC_PSERIES
  322. if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
  323. int addr = root_size_cells * (index + 2) - 1;
  324. mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
  325. }
  326. #endif
  327. index++;
  328. }
  329. of_node_put(root);
  330. pci_devs_phb_init();
  331. /*
  332. * pci_probe_only and pci_assign_all_buses can be set via properties
  333. * in chosen.
  334. */
  335. if (of_chosen) {
  336. int *prop;
  337. prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
  338. NULL);
  339. if (prop)
  340. pci_probe_only = *prop;
  341. prop = (int *)get_property(of_chosen,
  342. "linux,pci-assign-all-buses", NULL);
  343. if (prop)
  344. pci_assign_all_buses = *prop;
  345. }
  346. return 0;
  347. }
  348. struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
  349. {
  350. struct device_node *root = of_find_node_by_path("/");
  351. unsigned int root_size_cells = 0;
  352. struct pci_controller *phb;
  353. struct pci_bus *bus;
  354. int primary;
  355. root_size_cells = prom_n_size_cells(root);
  356. primary = list_empty(&hose_list);
  357. phb = alloc_phb_dynamic(dn, root_size_cells);
  358. if (!phb)
  359. return NULL;
  360. pci_process_bridge_OF_ranges(phb, dn);
  361. pci_setup_phb_io_dynamic(phb, primary);
  362. of_node_put(root);
  363. pci_devs_phb_init_dynamic(phb);
  364. phb->last_busno = 0xff;
  365. bus = pci_scan_bus(phb->first_busno, phb->ops, phb->arch_data);
  366. phb->bus = bus;
  367. phb->last_busno = bus->subordinate;
  368. return phb;
  369. }
  370. EXPORT_SYMBOL(init_phb_dynamic);
  371. /* RPA-specific bits for removing PHBs */
  372. int pcibios_remove_root_bus(struct pci_controller *phb)
  373. {
  374. struct pci_bus *b = phb->bus;
  375. struct resource *res;
  376. int rc, i;
  377. res = b->resource[0];
  378. if (!res->flags) {
  379. printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
  380. b->name);
  381. return 1;
  382. }
  383. rc = unmap_bus_range(b);
  384. if (rc) {
  385. printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
  386. __FUNCTION__, b->name);
  387. return 1;
  388. }
  389. if (release_resource(res)) {
  390. printk(KERN_ERR "%s: failed to release IO on bus %s\n",
  391. __FUNCTION__, b->name);
  392. return 1;
  393. }
  394. for (i = 1; i < 3; ++i) {
  395. res = b->resource[i];
  396. if (!res->flags && i == 0) {
  397. printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
  398. __FUNCTION__, b->name);
  399. return 1;
  400. }
  401. if (res->flags && release_resource(res)) {
  402. printk(KERN_ERR
  403. "%s: failed to release IO %d on bus %s\n",
  404. __FUNCTION__, i, b->name);
  405. return 1;
  406. }
  407. }
  408. list_del(&phb->list_node);
  409. if (phb->is_dynamic)
  410. kfree(phb);
  411. return 0;
  412. }
  413. EXPORT_SYMBOL(pcibios_remove_root_bus);