ras.c 10 KB

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  1. /*
  2. * ras.c
  3. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /* Change Activity:
  20. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  21. * End Change Activity
  22. */
  23. #include <linux/errno.h>
  24. #include <linux/threads.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/signal.h>
  27. #include <linux/sched.h>
  28. #include <linux/ioport.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/timex.h>
  31. #include <linux/init.h>
  32. #include <linux/slab.h>
  33. #include <linux/pci.h>
  34. #include <linux/delay.h>
  35. #include <linux/irq.h>
  36. #include <linux/random.h>
  37. #include <linux/sysrq.h>
  38. #include <linux/bitops.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/irq.h>
  44. #include <asm/cache.h>
  45. #include <asm/prom.h>
  46. #include <asm/ptrace.h>
  47. #include <asm/machdep.h>
  48. #include <asm/rtas.h>
  49. #include <asm/ppcdebug.h>
  50. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  51. static DEFINE_SPINLOCK(ras_log_buf_lock);
  52. char mce_data_buf[RTAS_ERROR_LOG_MAX]
  53. ;
  54. /* This is true if we are using the firmware NMI handler (typically LPAR) */
  55. extern int fwnmi_active;
  56. extern void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
  57. static int ras_get_sensor_state_token;
  58. static int ras_check_exception_token;
  59. #define EPOW_SENSOR_TOKEN 9
  60. #define EPOW_SENSOR_INDEX 0
  61. #define RAS_VECTOR_OFFSET 0x500
  62. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
  63. struct pt_regs * regs);
  64. static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
  65. struct pt_regs * regs);
  66. /* #define DEBUG */
  67. static void request_ras_irqs(struct device_node *np, char *propname,
  68. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  69. const char *name)
  70. {
  71. unsigned int *ireg, len, i;
  72. int virq, n_intr;
  73. ireg = (unsigned int *)get_property(np, propname, &len);
  74. if (ireg == NULL)
  75. return;
  76. n_intr = prom_n_intr_cells(np);
  77. len /= n_intr * sizeof(*ireg);
  78. for (i = 0; i < len; i++) {
  79. virq = virt_irq_create_mapping(*ireg);
  80. if (virq == NO_IRQ) {
  81. printk(KERN_ERR "Unable to allocate interrupt "
  82. "number for %s\n", np->full_name);
  83. return;
  84. }
  85. if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) {
  86. printk(KERN_ERR "Unable to request interrupt %d for "
  87. "%s\n", irq_offset_up(virq), np->full_name);
  88. return;
  89. }
  90. ireg += n_intr;
  91. }
  92. }
  93. /*
  94. * Initialize handlers for the set of interrupts caused by hardware errors
  95. * and power system events.
  96. */
  97. static int __init init_ras_IRQ(void)
  98. {
  99. struct device_node *np;
  100. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  101. ras_check_exception_token = rtas_token("check-exception");
  102. /* Internal Errors */
  103. np = of_find_node_by_path("/event-sources/internal-errors");
  104. if (np != NULL) {
  105. request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt,
  106. "RAS_ERROR");
  107. request_ras_irqs(np, "interrupts", ras_error_interrupt,
  108. "RAS_ERROR");
  109. of_node_put(np);
  110. }
  111. /* EPOW Events */
  112. np = of_find_node_by_path("/event-sources/epow-events");
  113. if (np != NULL) {
  114. request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt,
  115. "RAS_EPOW");
  116. request_ras_irqs(np, "interrupts", ras_epow_interrupt,
  117. "RAS_EPOW");
  118. of_node_put(np);
  119. }
  120. return 1;
  121. }
  122. __initcall(init_ras_IRQ);
  123. /*
  124. * Handle power subsystem events (EPOW).
  125. *
  126. * Presently we just log the event has occurred. This should be fixed
  127. * to examine the type of power failure and take appropriate action where
  128. * the time horizon permits something useful to be done.
  129. */
  130. static irqreturn_t
  131. ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  132. {
  133. int status = 0xdeadbeef;
  134. int state = 0;
  135. int critical;
  136. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  137. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  138. if (state > 3)
  139. critical = 1; /* Time Critical */
  140. else
  141. critical = 0;
  142. spin_lock(&ras_log_buf_lock);
  143. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  144. RAS_VECTOR_OFFSET,
  145. virt_irq_to_real(irq_offset_down(irq)),
  146. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  147. critical, __pa(&ras_log_buf),
  148. rtas_get_error_log_max());
  149. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  150. *((unsigned long *)&ras_log_buf), status, state);
  151. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  152. *((unsigned long *)&ras_log_buf), status, state);
  153. /* format and print the extended information */
  154. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  155. spin_unlock(&ras_log_buf_lock);
  156. return IRQ_HANDLED;
  157. }
  158. /*
  159. * Handle hardware error interrupts.
  160. *
  161. * RTAS check-exception is called to collect data on the exception. If
  162. * the error is deemed recoverable, we log a warning and return.
  163. * For nonrecoverable errors, an error is logged and we stop all processing
  164. * as quickly as possible in order to prevent propagation of the failure.
  165. */
  166. static irqreturn_t
  167. ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  168. {
  169. struct rtas_error_log *rtas_elog;
  170. int status = 0xdeadbeef;
  171. int fatal;
  172. spin_lock(&ras_log_buf_lock);
  173. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  174. RAS_VECTOR_OFFSET,
  175. virt_irq_to_real(irq_offset_down(irq)),
  176. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  177. __pa(&ras_log_buf),
  178. rtas_get_error_log_max());
  179. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  180. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  181. fatal = 1;
  182. else
  183. fatal = 0;
  184. /* format and print the extended information */
  185. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  186. if (fatal) {
  187. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  188. *((unsigned long *)&ras_log_buf), status);
  189. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  190. *((unsigned long *)&ras_log_buf), status);
  191. #ifndef DEBUG
  192. /* Don't actually power off when debugging so we can test
  193. * without actually failing while injecting errors.
  194. * Error data will not be logged to syslog.
  195. */
  196. ppc_md.power_off();
  197. #endif
  198. } else {
  199. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  200. *((unsigned long *)&ras_log_buf), status);
  201. printk(KERN_WARNING
  202. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  203. *((unsigned long *)&ras_log_buf), status);
  204. }
  205. spin_unlock(&ras_log_buf_lock);
  206. return IRQ_HANDLED;
  207. }
  208. /* Get the error information for errors coming through the
  209. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  210. * the actual r3 if possible, and a ptr to the error log entry
  211. * will be returned if found.
  212. *
  213. * The mce_data_buf does not have any locks or protection around it,
  214. * if a second machine check comes in, or a system reset is done
  215. * before we have logged the error, then we will get corruption in the
  216. * error log. This is preferable over holding off on calling
  217. * ibm,nmi-interlock which would result in us checkstopping if a
  218. * second machine check did come in.
  219. */
  220. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  221. {
  222. unsigned long errdata = regs->gpr[3];
  223. struct rtas_error_log *errhdr = NULL;
  224. unsigned long *savep;
  225. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  226. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  227. savep = __va(errdata);
  228. regs->gpr[3] = savep[0]; /* restore original r3 */
  229. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  230. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  231. errhdr = (struct rtas_error_log *)mce_data_buf;
  232. } else {
  233. printk("FWNMI: corrupt r3\n");
  234. }
  235. return errhdr;
  236. }
  237. /* Call this when done with the data returned by FWNMI_get_errinfo.
  238. * It will release the saved data area for other CPUs in the
  239. * partition to receive FWNMI errors.
  240. */
  241. static void fwnmi_release_errinfo(void)
  242. {
  243. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  244. if (ret != 0)
  245. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  246. }
  247. void pSeries_system_reset_exception(struct pt_regs *regs)
  248. {
  249. if (fwnmi_active) {
  250. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  251. if (errhdr) {
  252. /* XXX Should look at FWNMI information */
  253. }
  254. fwnmi_release_errinfo();
  255. }
  256. }
  257. /*
  258. * See if we can recover from a machine check exception.
  259. * This is only called on power4 (or above) and only via
  260. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  261. * which provides the error analysis for us.
  262. *
  263. * Return 1 if corrected (or delivered a signal).
  264. * Return 0 if there is nothing we can do.
  265. */
  266. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  267. {
  268. int nonfatal = 0;
  269. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  270. /* Platform corrected itself */
  271. nonfatal = 1;
  272. } else if ((regs->msr & MSR_RI) &&
  273. user_mode(regs) &&
  274. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  275. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  276. err->target == RTAS_TARGET_MEMORY &&
  277. err->type == RTAS_TYPE_ECC_UNCORR &&
  278. !(current->pid == 0 || current->pid == 1)) {
  279. /* Kill off a user process with an ECC error */
  280. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  281. current->pid);
  282. /* XXX something better for ECC error? */
  283. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  284. nonfatal = 1;
  285. }
  286. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  287. return nonfatal;
  288. }
  289. /*
  290. * Handle a machine check.
  291. *
  292. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  293. * should be present. If so the handler which called us tells us if the
  294. * error was recovered (never true if RI=0).
  295. *
  296. * On hardware prior to Power 4 these exceptions were asynchronous which
  297. * means we can't tell exactly where it occurred and so we can't recover.
  298. */
  299. int pSeries_machine_check_exception(struct pt_regs *regs)
  300. {
  301. struct rtas_error_log *errp;
  302. if (fwnmi_active) {
  303. errp = fwnmi_get_errinfo(regs);
  304. fwnmi_release_errinfo();
  305. if (errp && recover_mce(regs, errp))
  306. return 1;
  307. }
  308. return 0;
  309. }