iSeries_irq.c 10 KB

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  1. /*
  2. * This module supports the iSeries PCI bus interrupt handling
  3. * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
  4. * Copyright (C) 2004-2005 IBM Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the:
  18. * Free Software Foundation, Inc.,
  19. * 59 Temple Place, Suite 330,
  20. * Boston, MA 02111-1307 USA
  21. *
  22. * Change Activity:
  23. * Created, December 13, 2000 by Wayne Holm
  24. * End Change Activity
  25. */
  26. #include <linux/config.h>
  27. #include <linux/pci.h>
  28. #include <linux/init.h>
  29. #include <linux/threads.h>
  30. #include <linux/smp.h>
  31. #include <linux/param.h>
  32. #include <linux/string.h>
  33. #include <linux/bootmem.h>
  34. #include <linux/ide.h>
  35. #include <linux/irq.h>
  36. #include <linux/spinlock.h>
  37. #include <asm/ppcdebug.h>
  38. #include <asm/iSeries/HvTypes.h>
  39. #include <asm/iSeries/HvLpEvent.h>
  40. #include <asm/iSeries/HvCallPci.h>
  41. #include <asm/iSeries/HvCallXm.h>
  42. #include <asm/iSeries/iSeries_irq.h>
  43. /* This maps virtual irq numbers to real irqs */
  44. unsigned int virt_irq_to_real_map[NR_IRQS];
  45. /* The next available virtual irq number */
  46. /* Note: the pcnet32 driver assumes irq numbers < 2 aren't valid. :( */
  47. static int next_virtual_irq = 2;
  48. static long Pci_Interrupt_Count;
  49. static long Pci_Event_Count;
  50. enum XmPciLpEvent_Subtype {
  51. XmPciLpEvent_BusCreated = 0, // PHB has been created
  52. XmPciLpEvent_BusError = 1, // PHB has failed
  53. XmPciLpEvent_BusFailed = 2, // Msg to Secondary, Primary failed bus
  54. XmPciLpEvent_NodeFailed = 4, // Multi-adapter bridge has failed
  55. XmPciLpEvent_NodeRecovered = 5, // Multi-adapter bridge has recovered
  56. XmPciLpEvent_BusRecovered = 12, // PHB has been recovered
  57. XmPciLpEvent_UnQuiesceBus = 18, // Secondary bus unqiescing
  58. XmPciLpEvent_BridgeError = 21, // Bridge Error
  59. XmPciLpEvent_SlotInterrupt = 22 // Slot interrupt
  60. };
  61. struct XmPciLpEvent_BusInterrupt {
  62. HvBusNumber busNumber;
  63. HvSubBusNumber subBusNumber;
  64. };
  65. struct XmPciLpEvent_NodeInterrupt {
  66. HvBusNumber busNumber;
  67. HvSubBusNumber subBusNumber;
  68. HvAgentId deviceId;
  69. };
  70. struct XmPciLpEvent {
  71. struct HvLpEvent hvLpEvent;
  72. union {
  73. u64 alignData; // Align on an 8-byte boundary
  74. struct {
  75. u32 fisr;
  76. HvBusNumber busNumber;
  77. HvSubBusNumber subBusNumber;
  78. HvAgentId deviceId;
  79. } slotInterrupt;
  80. struct XmPciLpEvent_BusInterrupt busFailed;
  81. struct XmPciLpEvent_BusInterrupt busRecovered;
  82. struct XmPciLpEvent_BusInterrupt busCreated;
  83. struct XmPciLpEvent_NodeInterrupt nodeFailed;
  84. struct XmPciLpEvent_NodeInterrupt nodeRecovered;
  85. } eventData;
  86. };
  87. static void intReceived(struct XmPciLpEvent *eventParm,
  88. struct pt_regs *regsParm)
  89. {
  90. int irq;
  91. ++Pci_Interrupt_Count;
  92. switch (eventParm->hvLpEvent.xSubtype) {
  93. case XmPciLpEvent_SlotInterrupt:
  94. irq = eventParm->hvLpEvent.xCorrelationToken;
  95. /* Dispatch the interrupt handlers for this irq */
  96. ppc_irq_dispatch_handler(regsParm, irq);
  97. HvCallPci_eoi(eventParm->eventData.slotInterrupt.busNumber,
  98. eventParm->eventData.slotInterrupt.subBusNumber,
  99. eventParm->eventData.slotInterrupt.deviceId);
  100. break;
  101. /* Ignore error recovery events for now */
  102. case XmPciLpEvent_BusCreated:
  103. printk(KERN_INFO "intReceived: system bus %d created\n",
  104. eventParm->eventData.busCreated.busNumber);
  105. break;
  106. case XmPciLpEvent_BusError:
  107. case XmPciLpEvent_BusFailed:
  108. printk(KERN_INFO "intReceived: system bus %d failed\n",
  109. eventParm->eventData.busFailed.busNumber);
  110. break;
  111. case XmPciLpEvent_BusRecovered:
  112. case XmPciLpEvent_UnQuiesceBus:
  113. printk(KERN_INFO "intReceived: system bus %d recovered\n",
  114. eventParm->eventData.busRecovered.busNumber);
  115. break;
  116. case XmPciLpEvent_NodeFailed:
  117. case XmPciLpEvent_BridgeError:
  118. printk(KERN_INFO
  119. "intReceived: multi-adapter bridge %d/%d/%d failed\n",
  120. eventParm->eventData.nodeFailed.busNumber,
  121. eventParm->eventData.nodeFailed.subBusNumber,
  122. eventParm->eventData.nodeFailed.deviceId);
  123. break;
  124. case XmPciLpEvent_NodeRecovered:
  125. printk(KERN_INFO
  126. "intReceived: multi-adapter bridge %d/%d/%d recovered\n",
  127. eventParm->eventData.nodeRecovered.busNumber,
  128. eventParm->eventData.nodeRecovered.subBusNumber,
  129. eventParm->eventData.nodeRecovered.deviceId);
  130. break;
  131. default:
  132. printk(KERN_ERR
  133. "intReceived: unrecognized event subtype 0x%x\n",
  134. eventParm->hvLpEvent.xSubtype);
  135. break;
  136. }
  137. }
  138. static void XmPciLpEvent_handler(struct HvLpEvent *eventParm,
  139. struct pt_regs *regsParm)
  140. {
  141. #ifdef CONFIG_PCI
  142. ++Pci_Event_Count;
  143. if (eventParm && (eventParm->xType == HvLpEvent_Type_PciIo)) {
  144. switch (eventParm->xFlags.xFunction) {
  145. case HvLpEvent_Function_Int:
  146. intReceived((struct XmPciLpEvent *)eventParm, regsParm);
  147. break;
  148. case HvLpEvent_Function_Ack:
  149. printk(KERN_ERR
  150. "XmPciLpEvent_handler: unexpected ack received\n");
  151. break;
  152. default:
  153. printk(KERN_ERR
  154. "XmPciLpEvent_handler: unexpected event function %d\n",
  155. (int)eventParm->xFlags.xFunction);
  156. break;
  157. }
  158. } else if (eventParm)
  159. printk(KERN_ERR
  160. "XmPciLpEvent_handler: Unrecognized PCI event type 0x%x\n",
  161. (int)eventParm->xType);
  162. else
  163. printk(KERN_ERR "XmPciLpEvent_handler: NULL event received\n");
  164. #endif
  165. }
  166. /*
  167. * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
  168. * It must be called before the bus walk.
  169. */
  170. void __init iSeries_init_IRQ(void)
  171. {
  172. /* Register PCI event handler and open an event path */
  173. int xRc;
  174. xRc = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
  175. &XmPciLpEvent_handler);
  176. if (xRc == 0) {
  177. xRc = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
  178. if (xRc != 0)
  179. printk(KERN_ERR "iSeries_init_IRQ: open event path "
  180. "failed with rc 0x%x\n", xRc);
  181. } else
  182. printk(KERN_ERR "iSeries_init_IRQ: register handler "
  183. "failed with rc 0x%x\n", xRc);
  184. }
  185. #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
  186. #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
  187. #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
  188. /*
  189. * This will be called by device drivers (via enable_IRQ)
  190. * to enable INTA in the bridge interrupt status register.
  191. */
  192. static void iSeries_enable_IRQ(unsigned int irq)
  193. {
  194. u32 bus, deviceId, function, mask;
  195. const u32 subBus = 0;
  196. unsigned int rirq = virt_irq_to_real_map[irq];
  197. /* The IRQ has already been locked by the caller */
  198. bus = REAL_IRQ_TO_BUS(rirq);
  199. function = REAL_IRQ_TO_FUNC(rirq);
  200. deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  201. /* Unmask secondary INTA */
  202. mask = 0x80000000;
  203. HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
  204. PPCDBG(PPCDBG_BUSWALK, "iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
  205. bus, subBus, deviceId, irq);
  206. }
  207. /* This is called by iSeries_activate_IRQs */
  208. static unsigned int iSeries_startup_IRQ(unsigned int irq)
  209. {
  210. u32 bus, deviceId, function, mask;
  211. const u32 subBus = 0;
  212. unsigned int rirq = virt_irq_to_real_map[irq];
  213. bus = REAL_IRQ_TO_BUS(rirq);
  214. function = REAL_IRQ_TO_FUNC(rirq);
  215. deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  216. /* Link the IRQ number to the bridge */
  217. HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
  218. /* Unmask bridge interrupts in the FISR */
  219. mask = 0x01010000 << function;
  220. HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
  221. iSeries_enable_IRQ(irq);
  222. return 0;
  223. }
  224. /*
  225. * This is called out of iSeries_fixup to activate interrupt
  226. * generation for usable slots
  227. */
  228. void __init iSeries_activate_IRQs()
  229. {
  230. int irq;
  231. unsigned long flags;
  232. for_each_irq (irq) {
  233. irq_desc_t *desc = get_irq_desc(irq);
  234. if (desc && desc->handler && desc->handler->startup) {
  235. spin_lock_irqsave(&desc->lock, flags);
  236. desc->handler->startup(irq);
  237. spin_unlock_irqrestore(&desc->lock, flags);
  238. }
  239. }
  240. }
  241. /* this is not called anywhere currently */
  242. static void iSeries_shutdown_IRQ(unsigned int irq)
  243. {
  244. u32 bus, deviceId, function, mask;
  245. const u32 subBus = 0;
  246. unsigned int rirq = virt_irq_to_real_map[irq];
  247. /* irq should be locked by the caller */
  248. bus = REAL_IRQ_TO_BUS(rirq);
  249. function = REAL_IRQ_TO_FUNC(rirq);
  250. deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  251. /* Invalidate the IRQ number in the bridge */
  252. HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
  253. /* Mask bridge interrupts in the FISR */
  254. mask = 0x01010000 << function;
  255. HvCallPci_maskFisr(bus, subBus, deviceId, mask);
  256. }
  257. /*
  258. * This will be called by device drivers (via disable_IRQ)
  259. * to disable INTA in the bridge interrupt status register.
  260. */
  261. static void iSeries_disable_IRQ(unsigned int irq)
  262. {
  263. u32 bus, deviceId, function, mask;
  264. const u32 subBus = 0;
  265. unsigned int rirq = virt_irq_to_real_map[irq];
  266. /* The IRQ has already been locked by the caller */
  267. bus = REAL_IRQ_TO_BUS(rirq);
  268. function = REAL_IRQ_TO_FUNC(rirq);
  269. deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  270. /* Mask secondary INTA */
  271. mask = 0x80000000;
  272. HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
  273. PPCDBG(PPCDBG_BUSWALK, "iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
  274. bus, subBus, deviceId, irq);
  275. }
  276. /*
  277. * Need to define this so ppc_irq_dispatch_handler will NOT call
  278. * enable_IRQ at the end of interrupt handling. However, this does
  279. * nothing because there is not enough information provided to do
  280. * the EOI HvCall. This is done by XmPciLpEvent.c
  281. */
  282. static void iSeries_end_IRQ(unsigned int irq)
  283. {
  284. }
  285. static hw_irq_controller iSeries_IRQ_handler = {
  286. .typename = "iSeries irq controller",
  287. .startup = iSeries_startup_IRQ,
  288. .shutdown = iSeries_shutdown_IRQ,
  289. .enable = iSeries_enable_IRQ,
  290. .disable = iSeries_disable_IRQ,
  291. .end = iSeries_end_IRQ
  292. };
  293. /*
  294. * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
  295. * It calculates the irq value for the slot.
  296. * Note that subBusNumber is always 0 (at the moment at least).
  297. */
  298. int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
  299. HvSubBusNumber subBusNumber, HvAgentId deviceId)
  300. {
  301. unsigned int realirq, virtirq;
  302. u8 idsel = (deviceId >> 4);
  303. u8 function = deviceId & 7;
  304. virtirq = next_virtual_irq++;
  305. realirq = ((busNumber - 1) << 6) + ((idsel - 1) << 3) + function;
  306. virt_irq_to_real_map[virtirq] = realirq;
  307. irq_desc[virtirq].handler = &iSeries_IRQ_handler;
  308. return virtirq;
  309. }