bpa_iic.c 5.9 KB

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  1. /*
  2. * BPA Internal Interrupt Controller
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/config.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/percpu.h>
  26. #include <linux/types.h>
  27. #include <asm/io.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/prom.h>
  30. #include <asm/ptrace.h>
  31. #include "bpa_iic.h"
  32. struct iic_pending_bits {
  33. u32 data;
  34. u8 flags;
  35. u8 class;
  36. u8 source;
  37. u8 prio;
  38. };
  39. enum iic_pending_flags {
  40. IIC_VALID = 0x80,
  41. IIC_IPI = 0x40,
  42. };
  43. struct iic_regs {
  44. struct iic_pending_bits pending;
  45. struct iic_pending_bits pending_destr;
  46. u64 generate;
  47. u64 prio;
  48. };
  49. struct iic {
  50. struct iic_regs __iomem *regs;
  51. };
  52. static DEFINE_PER_CPU(struct iic, iic);
  53. void iic_local_enable(void)
  54. {
  55. out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
  56. }
  57. void iic_local_disable(void)
  58. {
  59. out_be64(&__get_cpu_var(iic).regs->prio, 0x0);
  60. }
  61. static unsigned int iic_startup(unsigned int irq)
  62. {
  63. return 0;
  64. }
  65. static void iic_enable(unsigned int irq)
  66. {
  67. iic_local_enable();
  68. }
  69. static void iic_disable(unsigned int irq)
  70. {
  71. }
  72. static void iic_end(unsigned int irq)
  73. {
  74. iic_local_enable();
  75. }
  76. static struct hw_interrupt_type iic_pic = {
  77. .typename = " BPA-IIC ",
  78. .startup = iic_startup,
  79. .enable = iic_enable,
  80. .disable = iic_disable,
  81. .end = iic_end,
  82. };
  83. static int iic_external_get_irq(struct iic_pending_bits pending)
  84. {
  85. int irq;
  86. unsigned char node, unit;
  87. node = pending.source >> 4;
  88. unit = pending.source & 0xf;
  89. irq = -1;
  90. /*
  91. * This mapping is specific to the Broadband
  92. * Engine. We might need to get the numbers
  93. * from the device tree to support future CPUs.
  94. */
  95. switch (unit) {
  96. case 0x00:
  97. case 0x0b:
  98. /*
  99. * One of these units can be connected
  100. * to an external interrupt controller.
  101. */
  102. if (pending.prio > 0x3f ||
  103. pending.class != 2)
  104. break;
  105. irq = IIC_EXT_OFFSET
  106. + spider_get_irq(pending.prio + node * IIC_NODE_STRIDE)
  107. + node * IIC_NODE_STRIDE;
  108. break;
  109. case 0x01 ... 0x04:
  110. case 0x07 ... 0x0a:
  111. /*
  112. * These units are connected to the SPEs
  113. */
  114. if (pending.class > 2)
  115. break;
  116. irq = IIC_SPE_OFFSET
  117. + pending.class * IIC_CLASS_STRIDE
  118. + node * IIC_NODE_STRIDE
  119. + unit;
  120. break;
  121. }
  122. if (irq == -1)
  123. printk(KERN_WARNING "Unexpected interrupt class %02x, "
  124. "source %02x, prio %02x, cpu %02x\n", pending.class,
  125. pending.source, pending.prio, smp_processor_id());
  126. return irq;
  127. }
  128. /* Get an IRQ number from the pending state register of the IIC */
  129. int iic_get_irq(struct pt_regs *regs)
  130. {
  131. struct iic *iic;
  132. int irq;
  133. struct iic_pending_bits pending;
  134. iic = &__get_cpu_var(iic);
  135. *(unsigned long *) &pending =
  136. in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
  137. irq = -1;
  138. if (pending.flags & IIC_VALID) {
  139. if (pending.flags & IIC_IPI) {
  140. irq = IIC_IPI_OFFSET + (pending.prio >> 4);
  141. /*
  142. if (irq > 0x80)
  143. printk(KERN_WARNING "Unexpected IPI prio %02x"
  144. "on CPU %02x\n", pending.prio,
  145. smp_processor_id());
  146. */
  147. } else {
  148. irq = iic_external_get_irq(pending);
  149. }
  150. }
  151. return irq;
  152. }
  153. static struct iic_regs __iomem *find_iic(int cpu)
  154. {
  155. struct device_node *np;
  156. int nodeid = cpu / 2;
  157. unsigned long regs;
  158. struct iic_regs __iomem *iic_regs;
  159. for (np = of_find_node_by_type(NULL, "cpu");
  160. np;
  161. np = of_find_node_by_type(np, "cpu")) {
  162. if (nodeid == *(int *)get_property(np, "node-id", NULL))
  163. break;
  164. }
  165. if (!np) {
  166. printk(KERN_WARNING "IIC: CPU %d not found\n", cpu);
  167. iic_regs = NULL;
  168. } else {
  169. regs = *(long *)get_property(np, "iic", NULL);
  170. /* hack until we have decided on the devtree info */
  171. regs += 0x400;
  172. if (cpu & 1)
  173. regs += 0x20;
  174. printk(KERN_DEBUG "IIC for CPU %d at %lx\n", cpu, regs);
  175. iic_regs = __ioremap(regs, sizeof(struct iic_regs),
  176. _PAGE_NO_CACHE);
  177. }
  178. return iic_regs;
  179. }
  180. #ifdef CONFIG_SMP
  181. void iic_setup_cpu(void)
  182. {
  183. out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
  184. }
  185. void iic_cause_IPI(int cpu, int mesg)
  186. {
  187. out_be64(&per_cpu(iic, cpu).regs->generate, mesg);
  188. }
  189. static irqreturn_t iic_ipi_action(int irq, void *dev_id, struct pt_regs *regs)
  190. {
  191. smp_message_recv(irq - IIC_IPI_OFFSET, regs);
  192. return IRQ_HANDLED;
  193. }
  194. static void iic_request_ipi(int irq, const char *name)
  195. {
  196. /* IPIs are marked SA_INTERRUPT as they must run with irqs
  197. * disabled */
  198. get_irq_desc(irq)->handler = &iic_pic;
  199. get_irq_desc(irq)->status |= IRQ_PER_CPU;
  200. request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
  201. }
  202. void iic_request_IPIs(void)
  203. {
  204. iic_request_ipi(IIC_IPI_OFFSET + PPC_MSG_CALL_FUNCTION, "IPI-call");
  205. iic_request_ipi(IIC_IPI_OFFSET + PPC_MSG_RESCHEDULE, "IPI-resched");
  206. #ifdef CONFIG_DEBUGGER
  207. iic_request_ipi(IIC_IPI_OFFSET + PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
  208. #endif /* CONFIG_DEBUGGER */
  209. }
  210. #endif /* CONFIG_SMP */
  211. static void iic_setup_spe_handlers(void)
  212. {
  213. int be, isrc;
  214. /* Assume two threads per BE are present */
  215. for (be=0; be < num_present_cpus() / 2; be++) {
  216. for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
  217. int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
  218. get_irq_desc(irq)->handler = &iic_pic;
  219. }
  220. }
  221. }
  222. void iic_init_IRQ(void)
  223. {
  224. int cpu, irq_offset;
  225. struct iic *iic;
  226. irq_offset = 0;
  227. for_each_cpu(cpu) {
  228. iic = &per_cpu(iic, cpu);
  229. iic->regs = find_iic(cpu);
  230. if (iic->regs)
  231. out_be64(&iic->regs->prio, 0xff);
  232. }
  233. iic_setup_spe_handlers();
  234. }