ppc403_pic.c 2.5 KB

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  1. /*
  2. *
  3. * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
  4. *
  5. * Module name: ppc403_pic.c
  6. *
  7. * Description:
  8. * Interrupt controller driver for PowerPC 403-based processors.
  9. */
  10. /*
  11. * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has
  12. * 32 possible interrupts, a majority of which are not implemented on
  13. * all cores. There are six configurable, external interrupt pins and
  14. * there are eight internal interrupts for the on-chip serial port
  15. * (SPU), DMA controller, and JTAG controller.
  16. *
  17. */
  18. #include <linux/init.h>
  19. #include <linux/sched.h>
  20. #include <linux/signal.h>
  21. #include <linux/stddef.h>
  22. #include <asm/processor.h>
  23. #include <asm/system.h>
  24. #include <asm/irq.h>
  25. #include <asm/ppc4xx_pic.h>
  26. /* Function Prototypes */
  27. static void ppc403_aic_enable(unsigned int irq);
  28. static void ppc403_aic_disable(unsigned int irq);
  29. static void ppc403_aic_disable_and_ack(unsigned int irq);
  30. static struct hw_interrupt_type ppc403_aic = {
  31. "403GC AIC",
  32. NULL,
  33. NULL,
  34. ppc403_aic_enable,
  35. ppc403_aic_disable,
  36. ppc403_aic_disable_and_ack,
  37. 0
  38. };
  39. int
  40. ppc403_pic_get_irq(struct pt_regs *regs)
  41. {
  42. int irq;
  43. unsigned long bits;
  44. /*
  45. * Only report the status of those interrupts that are actually
  46. * enabled.
  47. */
  48. bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER);
  49. /*
  50. * Walk through the interrupts from highest priority to lowest, and
  51. * report the first pending interrupt found.
  52. * We want PPC, not C bit numbering, so just subtract the ffs()
  53. * result from 32.
  54. */
  55. irq = 32 - ffs(bits);
  56. if (irq == NR_AIC_IRQS)
  57. irq = -1;
  58. return (irq);
  59. }
  60. static void
  61. ppc403_aic_enable(unsigned int irq)
  62. {
  63. int bit, word;
  64. bit = irq & 0x1f;
  65. word = irq >> 5;
  66. ppc_cached_irq_mask[word] |= (1 << (31 - bit));
  67. mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
  68. }
  69. static void
  70. ppc403_aic_disable(unsigned int irq)
  71. {
  72. int bit, word;
  73. bit = irq & 0x1f;
  74. word = irq >> 5;
  75. ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
  76. mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
  77. }
  78. static void
  79. ppc403_aic_disable_and_ack(unsigned int irq)
  80. {
  81. int bit, word;
  82. bit = irq & 0x1f;
  83. word = irq >> 5;
  84. ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
  85. mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
  86. mtdcr(DCRN_EXISR, (1 << (31 - bit)));
  87. }
  88. void __init
  89. ppc4xx_pic_init(void)
  90. {
  91. int i;
  92. /*
  93. * Disable all external interrupts until they are
  94. * explicity requested.
  95. */
  96. ppc_cached_irq_mask[0] = 0;
  97. mtdcr(DCRN_EXIER, ppc_cached_irq_mask[0]);
  98. ppc_md.get_irq = ppc403_pic_get_irq;
  99. for (i = 0; i < NR_IRQS; i++)
  100. irq_desc[i].handler = &ppc403_aic;
  101. }