indirect_pci.c 3.1 KB

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  1. /*
  2. * Support for indirect PCI bridges.
  3. *
  4. * Copyright (C) 1998 Gabriel Paubert.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include <linux/string.h>
  15. #include <linux/init.h>
  16. #include <asm/io.h>
  17. #include <asm/prom.h>
  18. #include <asm/pci-bridge.h>
  19. #include <asm/machdep.h>
  20. #ifdef CONFIG_PPC_INDIRECT_PCI_BE
  21. #define PCI_CFG_OUT out_be32
  22. #else
  23. #define PCI_CFG_OUT out_le32
  24. #endif
  25. static int
  26. indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  27. int len, u32 *val)
  28. {
  29. struct pci_controller *hose = bus->sysdata;
  30. volatile void __iomem *cfg_data;
  31. u8 cfg_type = 0;
  32. if (ppc_md.pci_exclude_device)
  33. if (ppc_md.pci_exclude_device(bus->number, devfn))
  34. return PCIBIOS_DEVICE_NOT_FOUND;
  35. if (hose->set_cfg_type)
  36. if (bus->number != hose->first_busno)
  37. cfg_type = 1;
  38. PCI_CFG_OUT(hose->cfg_addr,
  39. (0x80000000 | ((bus->number - hose->bus_offset) << 16)
  40. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  41. /*
  42. * Note: the caller has already checked that offset is
  43. * suitably aligned and that len is 1, 2 or 4.
  44. */
  45. cfg_data = hose->cfg_data + (offset & 3);
  46. switch (len) {
  47. case 1:
  48. *val = in_8(cfg_data);
  49. break;
  50. case 2:
  51. *val = in_le16(cfg_data);
  52. break;
  53. default:
  54. *val = in_le32(cfg_data);
  55. break;
  56. }
  57. return PCIBIOS_SUCCESSFUL;
  58. }
  59. static int
  60. indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
  61. int len, u32 val)
  62. {
  63. struct pci_controller *hose = bus->sysdata;
  64. volatile void __iomem *cfg_data;
  65. u8 cfg_type = 0;
  66. if (ppc_md.pci_exclude_device)
  67. if (ppc_md.pci_exclude_device(bus->number, devfn))
  68. return PCIBIOS_DEVICE_NOT_FOUND;
  69. if (hose->set_cfg_type)
  70. if (bus->number != hose->first_busno)
  71. cfg_type = 1;
  72. PCI_CFG_OUT(hose->cfg_addr,
  73. (0x80000000 | ((bus->number - hose->bus_offset) << 16)
  74. | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
  75. /*
  76. * Note: the caller has already checked that offset is
  77. * suitably aligned and that len is 1, 2 or 4.
  78. */
  79. cfg_data = hose->cfg_data + (offset & 3);
  80. switch (len) {
  81. case 1:
  82. out_8(cfg_data, val);
  83. break;
  84. case 2:
  85. out_le16(cfg_data, val);
  86. break;
  87. default:
  88. out_le32(cfg_data, val);
  89. break;
  90. }
  91. return PCIBIOS_SUCCESSFUL;
  92. }
  93. static struct pci_ops indirect_pci_ops =
  94. {
  95. indirect_read_config,
  96. indirect_write_config
  97. };
  98. void __init
  99. setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
  100. void __iomem * cfg_data)
  101. {
  102. hose->cfg_addr = cfg_addr;
  103. hose->cfg_data = cfg_data;
  104. hose->ops = &indirect_pci_ops;
  105. }
  106. void __init
  107. setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
  108. {
  109. unsigned long base = cfg_addr & PAGE_MASK;
  110. void __iomem *mbase, *addr, *data;
  111. mbase = ioremap(base, PAGE_SIZE);
  112. addr = mbase + (cfg_addr & ~PAGE_MASK);
  113. if ((cfg_data & PAGE_MASK) != base)
  114. mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
  115. data = mbase + (cfg_data & ~PAGE_MASK);
  116. setup_indirect_pci_nomap(hose, addr, data);
  117. }