ibm440gp_common.c 1.7 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576
  1. /*
  2. * arch/ppc/syslib/ibm440gp_common.c
  3. *
  4. * PPC440GP system library
  5. *
  6. * Matt Porter <mporter@mvista.com>
  7. * Copyright 2002-2003 MontaVista Software Inc.
  8. *
  9. * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  10. * Copyright (c) 2003 Zultys Technologies
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #include <linux/config.h>
  19. #include <linux/types.h>
  20. #include <asm/reg.h>
  21. #include <asm/ibm44x.h>
  22. #include <asm/mmu.h>
  23. /*
  24. * Calculate 440GP clocks
  25. */
  26. void __init ibm440gp_get_clocks(struct ibm44x_clocks* p,
  27. unsigned int sys_clk,
  28. unsigned int ser_clk)
  29. {
  30. u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0);
  31. u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0);
  32. u32 opdv = ((cpc0_sys0 >> 10) & 0x3) + 1;
  33. u32 epdv = ((cpc0_sys0 >> 8) & 0x3) + 1;
  34. if (cpc0_sys0 & 0x2){
  35. /* Bypass system PLL */
  36. p->cpu = p->plb = sys_clk;
  37. }
  38. else {
  39. u32 fbdv, fwdva, fwdvb, m, vco;
  40. fbdv = (cpc0_sys0 >> 18) & 0x0f;
  41. if (!fbdv)
  42. fbdv = 16;
  43. fwdva = 8 - ((cpc0_sys0 >> 15) & 0x7);
  44. fwdvb = 8 - ((cpc0_sys0 >> 12) & 0x7);
  45. /* Feedback path */
  46. if (cpc0_sys0 & 0x00000080){
  47. /* PerClk */
  48. m = fwdvb * opdv * epdv;
  49. }
  50. else {
  51. /* CPU clock */
  52. m = fbdv * fwdva;
  53. }
  54. vco = sys_clk * m;
  55. p->cpu = vco / fwdva;
  56. p->plb = vco / fwdvb;
  57. }
  58. p->opb = p->plb / opdv;
  59. p->ebc = p->opb / epdv;
  60. if (cpc0_cr0 & 0x00400000){
  61. /* External UART clock */
  62. p->uart0 = p->uart1 = ser_clk;
  63. }
  64. else {
  65. /* Internal UART clock */
  66. u32 uart_div = ((cpc0_cr0 >> 16) & 0x1f) + 1;
  67. p->uart0 = p->uart1 = p->plb / uart_div;
  68. }
  69. }