pmac_cpufreq.c 19 KB

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  1. /*
  2. * arch/ppc/platforms/pmac_cpufreq.c
  3. *
  4. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  5. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * TODO: Need a big cleanup here. Basically, we need to have different
  12. * cpufreq_driver structures for the different type of HW instead of the
  13. * current mess. We also need to better deal with the detection of the
  14. * type of machine.
  15. *
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/sched.h>
  24. #include <linux/adb.h>
  25. #include <linux/pmu.h>
  26. #include <linux/slab.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/init.h>
  29. #include <linux/sysdev.h>
  30. #include <linux/i2c.h>
  31. #include <linux/hardirq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/irq.h>
  35. #include <asm/pmac_feature.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/sections.h>
  38. #include <asm/cputable.h>
  39. #include <asm/time.h>
  40. #include <asm/system.h>
  41. #include <asm/open_pic.h>
  42. #include <asm/keylargo.h>
  43. /* WARNING !!! This will cause calibrate_delay() to be called,
  44. * but this is an __init function ! So you MUST go edit
  45. * init/main.c to make it non-init before enabling DEBUG_FREQ
  46. */
  47. #undef DEBUG_FREQ
  48. /*
  49. * There is a problem with the core cpufreq code on SMP kernels,
  50. * it won't recalculate the Bogomips properly
  51. */
  52. #ifdef CONFIG_SMP
  53. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  54. #endif
  55. extern void low_choose_7447a_dfs(int dfs);
  56. extern void low_choose_750fx_pll(int pll);
  57. extern void low_sleep_handler(void);
  58. /*
  59. * Currently, PowerMac cpufreq supports only high & low frequencies
  60. * that are set by the firmware
  61. */
  62. static unsigned int low_freq;
  63. static unsigned int hi_freq;
  64. static unsigned int cur_freq;
  65. static unsigned int sleep_freq;
  66. /*
  67. * Different models uses different mecanisms to switch the frequency
  68. */
  69. static int (*set_speed_proc)(int low_speed);
  70. static unsigned int (*get_speed_proc)(void);
  71. /*
  72. * Some definitions used by the various speedprocs
  73. */
  74. static u32 voltage_gpio;
  75. static u32 frequency_gpio;
  76. static u32 slew_done_gpio;
  77. static int no_schedule;
  78. static int has_cpu_l2lve;
  79. static int is_pmu_based;
  80. /* There are only two frequency states for each processor. Values
  81. * are in kHz for the time being.
  82. */
  83. #define CPUFREQ_HIGH 0
  84. #define CPUFREQ_LOW 1
  85. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  86. {CPUFREQ_HIGH, 0},
  87. {CPUFREQ_LOW, 0},
  88. {0, CPUFREQ_TABLE_END},
  89. };
  90. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  91. &cpufreq_freq_attr_scaling_available_freqs,
  92. NULL,
  93. };
  94. static inline void local_delay(unsigned long ms)
  95. {
  96. if (no_schedule)
  97. mdelay(ms);
  98. else
  99. msleep(ms);
  100. }
  101. static inline void wakeup_decrementer(void)
  102. {
  103. set_dec(tb_ticks_per_jiffy);
  104. /* No currently-supported powerbook has a 601,
  105. * so use get_tbl, not native
  106. */
  107. last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
  108. }
  109. #ifdef DEBUG_FREQ
  110. static inline void debug_calc_bogomips(void)
  111. {
  112. /* This will cause a recalc of bogomips and display the
  113. * result. We backup/restore the value to avoid affecting the
  114. * core cpufreq framework's own calculation.
  115. */
  116. extern void calibrate_delay(void);
  117. unsigned long save_lpj = loops_per_jiffy;
  118. calibrate_delay();
  119. loops_per_jiffy = save_lpj;
  120. }
  121. #endif /* DEBUG_FREQ */
  122. /* Switch CPU speed under 750FX CPU control
  123. */
  124. static int __pmac cpu_750fx_cpu_speed(int low_speed)
  125. {
  126. u32 hid2;
  127. if (low_speed == 0) {
  128. /* ramping up, set voltage first */
  129. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  130. /* Make sure we sleep for at least 1ms */
  131. local_delay(10);
  132. /* tweak L2 for high voltage */
  133. if (has_cpu_l2lve) {
  134. hid2 = mfspr(SPRN_HID2);
  135. hid2 &= ~0x2000;
  136. mtspr(SPRN_HID2, hid2);
  137. }
  138. }
  139. #ifdef CONFIG_6xx
  140. low_choose_750fx_pll(low_speed);
  141. #endif
  142. if (low_speed == 1) {
  143. /* tweak L2 for low voltage */
  144. if (has_cpu_l2lve) {
  145. hid2 = mfspr(SPRN_HID2);
  146. hid2 |= 0x2000;
  147. mtspr(SPRN_HID2, hid2);
  148. }
  149. /* ramping down, set voltage last */
  150. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  151. local_delay(10);
  152. }
  153. return 0;
  154. }
  155. static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
  156. {
  157. if (mfspr(SPRN_HID1) & HID1_PS)
  158. return low_freq;
  159. else
  160. return hi_freq;
  161. }
  162. /* Switch CPU speed using DFS */
  163. static int __pmac dfs_set_cpu_speed(int low_speed)
  164. {
  165. if (low_speed == 0) {
  166. /* ramping up, set voltage first */
  167. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  168. /* Make sure we sleep for at least 1ms */
  169. local_delay(1);
  170. }
  171. /* set frequency */
  172. #ifdef CONFIG_6xx
  173. low_choose_7447a_dfs(low_speed);
  174. #endif
  175. udelay(100);
  176. if (low_speed == 1) {
  177. /* ramping down, set voltage last */
  178. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  179. local_delay(1);
  180. }
  181. return 0;
  182. }
  183. static unsigned int __pmac dfs_get_cpu_speed(void)
  184. {
  185. if (mfspr(SPRN_HID1) & HID1_DFS)
  186. return low_freq;
  187. else
  188. return hi_freq;
  189. }
  190. /* Switch CPU speed using slewing GPIOs
  191. */
  192. static int __pmac gpios_set_cpu_speed(int low_speed)
  193. {
  194. int gpio, timeout = 0;
  195. /* If ramping up, set voltage first */
  196. if (low_speed == 0) {
  197. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  198. /* Delay is way too big but it's ok, we schedule */
  199. local_delay(10);
  200. }
  201. /* Set frequency */
  202. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  203. if (low_speed == ((gpio & 0x01) == 0))
  204. goto skip;
  205. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  206. low_speed ? 0x04 : 0x05);
  207. udelay(200);
  208. do {
  209. if (++timeout > 100)
  210. break;
  211. local_delay(1);
  212. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  213. } while((gpio & 0x02) == 0);
  214. skip:
  215. /* If ramping down, set voltage last */
  216. if (low_speed == 1) {
  217. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  218. /* Delay is way too big but it's ok, we schedule */
  219. local_delay(10);
  220. }
  221. #ifdef DEBUG_FREQ
  222. debug_calc_bogomips();
  223. #endif
  224. return 0;
  225. }
  226. /* Switch CPU speed under PMU control
  227. */
  228. static int __pmac pmu_set_cpu_speed(int low_speed)
  229. {
  230. struct adb_request req;
  231. unsigned long save_l2cr;
  232. unsigned long save_l3cr;
  233. unsigned int pic_prio;
  234. unsigned long flags;
  235. preempt_disable();
  236. #ifdef DEBUG_FREQ
  237. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  238. #endif
  239. pmu_suspend();
  240. /* Disable all interrupt sources on openpic */
  241. pic_prio = openpic_get_priority();
  242. openpic_set_priority(0xf);
  243. /* Make sure the decrementer won't interrupt us */
  244. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  245. /* Make sure any pending DEC interrupt occuring while we did
  246. * the above didn't re-enable the DEC */
  247. mb();
  248. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  249. /* We can now disable MSR_EE */
  250. local_irq_save(flags);
  251. /* Giveup the FPU & vec */
  252. enable_kernel_fp();
  253. #ifdef CONFIG_ALTIVEC
  254. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  255. enable_kernel_altivec();
  256. #endif /* CONFIG_ALTIVEC */
  257. /* Save & disable L2 and L3 caches */
  258. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  259. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  260. /* Send the new speed command. My assumption is that this command
  261. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  262. */
  263. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  264. while (!req.complete)
  265. pmu_poll();
  266. /* Prepare the northbridge for the speed transition */
  267. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  268. /* Call low level code to backup CPU state and recover from
  269. * hardware reset
  270. */
  271. low_sleep_handler();
  272. /* Restore the northbridge */
  273. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  274. /* Restore L2 cache */
  275. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  276. _set_L2CR(save_l2cr);
  277. /* Restore L3 cache */
  278. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  279. _set_L3CR(save_l3cr);
  280. /* Restore userland MMU context */
  281. set_context(current->active_mm->context, current->active_mm->pgd);
  282. #ifdef DEBUG_FREQ
  283. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  284. #endif
  285. /* Restore low level PMU operations */
  286. pmu_unlock();
  287. /* Restore decrementer */
  288. wakeup_decrementer();
  289. /* Restore interrupts */
  290. openpic_set_priority(pic_prio);
  291. /* Let interrupts flow again ... */
  292. local_irq_restore(flags);
  293. #ifdef DEBUG_FREQ
  294. debug_calc_bogomips();
  295. #endif
  296. pmu_resume();
  297. preempt_enable();
  298. return 0;
  299. }
  300. static int __pmac do_set_cpu_speed(int speed_mode, int notify)
  301. {
  302. struct cpufreq_freqs freqs;
  303. unsigned long l3cr;
  304. static unsigned long prev_l3cr;
  305. freqs.old = cur_freq;
  306. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  307. freqs.cpu = smp_processor_id();
  308. if (freqs.old == freqs.new)
  309. return 0;
  310. if (notify)
  311. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  312. if (speed_mode == CPUFREQ_LOW &&
  313. cpu_has_feature(CPU_FTR_L3CR)) {
  314. l3cr = _get_L3CR();
  315. if (l3cr & L3CR_L3E) {
  316. prev_l3cr = l3cr;
  317. _set_L3CR(0);
  318. }
  319. }
  320. set_speed_proc(speed_mode == CPUFREQ_LOW);
  321. if (speed_mode == CPUFREQ_HIGH &&
  322. cpu_has_feature(CPU_FTR_L3CR)) {
  323. l3cr = _get_L3CR();
  324. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  325. _set_L3CR(prev_l3cr);
  326. }
  327. if (notify)
  328. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  329. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  330. return 0;
  331. }
  332. static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
  333. {
  334. return cur_freq;
  335. }
  336. static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
  337. {
  338. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  339. }
  340. static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
  341. unsigned int target_freq,
  342. unsigned int relation)
  343. {
  344. unsigned int newstate = 0;
  345. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  346. target_freq, relation, &newstate))
  347. return -EINVAL;
  348. return do_set_cpu_speed(newstate, 1);
  349. }
  350. unsigned int __pmac pmac_get_one_cpufreq(int i)
  351. {
  352. /* Supports only one CPU for now */
  353. return (i == 0) ? cur_freq : 0;
  354. }
  355. static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  356. {
  357. if (policy->cpu != 0)
  358. return -ENODEV;
  359. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  360. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  361. policy->cur = cur_freq;
  362. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  363. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  364. }
  365. static u32 __pmac read_gpio(struct device_node *np)
  366. {
  367. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  368. u32 offset;
  369. if (reg == NULL)
  370. return 0;
  371. /* That works for all keylargos but shall be fixed properly
  372. * some day... The problem is that it seems we can't rely
  373. * on the "reg" property of the GPIO nodes, they are either
  374. * relative to the base of KeyLargo or to the base of the
  375. * GPIO space, and the device-tree doesn't help.
  376. */
  377. offset = *reg;
  378. if (offset < KEYLARGO_GPIO_LEVELS0)
  379. offset += KEYLARGO_GPIO_LEVELS0;
  380. return offset;
  381. }
  382. static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  383. {
  384. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  385. * always force a speed change to high speed before sleep, to make sure
  386. * we have appropriate voltage and/or bus speed for the wakeup process,
  387. * and to make sure our loops_per_jiffies are "good enough", that is will
  388. * not cause too short delays if we sleep in low speed and wake in high
  389. * speed..
  390. */
  391. no_schedule = 1;
  392. sleep_freq = cur_freq;
  393. if (cur_freq == low_freq && !is_pmu_based)
  394. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  395. return 0;
  396. }
  397. static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
  398. {
  399. /* If we resume, first check if we have a get() function */
  400. if (get_speed_proc)
  401. cur_freq = get_speed_proc();
  402. else
  403. cur_freq = 0;
  404. /* We don't, hrm... we don't really know our speed here, best
  405. * is that we force a switch to whatever it was, which is
  406. * probably high speed due to our suspend() routine
  407. */
  408. do_set_cpu_speed(sleep_freq == low_freq ?
  409. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  410. no_schedule = 0;
  411. return 0;
  412. }
  413. static struct cpufreq_driver pmac_cpufreq_driver = {
  414. .verify = pmac_cpufreq_verify,
  415. .target = pmac_cpufreq_target,
  416. .get = pmac_cpufreq_get_speed,
  417. .init = pmac_cpufreq_cpu_init,
  418. .suspend = pmac_cpufreq_suspend,
  419. .resume = pmac_cpufreq_resume,
  420. .flags = CPUFREQ_PM_NO_WARN,
  421. .attr = pmac_cpu_freqs_attr,
  422. .name = "powermac",
  423. .owner = THIS_MODULE,
  424. };
  425. static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  426. {
  427. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  428. "voltage-gpio");
  429. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  430. "frequency-gpio");
  431. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  432. "slewing-done");
  433. u32 *value;
  434. /*
  435. * Check to see if it's GPIO driven or PMU only
  436. *
  437. * The way we extract the GPIO address is slightly hackish, but it
  438. * works well enough for now. We need to abstract the whole GPIO
  439. * stuff sooner or later anyway
  440. */
  441. if (volt_gpio_np)
  442. voltage_gpio = read_gpio(volt_gpio_np);
  443. if (freq_gpio_np)
  444. frequency_gpio = read_gpio(freq_gpio_np);
  445. if (slew_done_gpio_np)
  446. slew_done_gpio = read_gpio(slew_done_gpio_np);
  447. /* If we use the frequency GPIOs, calculate the min/max speeds based
  448. * on the bus frequencies
  449. */
  450. if (frequency_gpio && slew_done_gpio) {
  451. int lenp, rc;
  452. u32 *freqs, *ratio;
  453. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  454. lenp /= sizeof(u32);
  455. if (freqs == NULL || lenp != 2) {
  456. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  457. return 1;
  458. }
  459. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  460. if (ratio == NULL) {
  461. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  462. return 1;
  463. }
  464. /* Get the min/max bus frequencies */
  465. low_freq = min(freqs[0], freqs[1]);
  466. hi_freq = max(freqs[0], freqs[1]);
  467. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  468. * frequency, it claims it to be around 84Mhz on some models while
  469. * it appears to be approx. 101Mhz on all. Let's hack around here...
  470. * fortunately, we don't need to be too precise
  471. */
  472. if (low_freq < 98000000)
  473. low_freq = 101000000;
  474. /* Convert those to CPU core clocks */
  475. low_freq = (low_freq * (*ratio)) / 2000;
  476. hi_freq = (hi_freq * (*ratio)) / 2000;
  477. /* Now we get the frequencies, we read the GPIO to see what is out current
  478. * speed
  479. */
  480. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  481. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  482. set_speed_proc = gpios_set_cpu_speed;
  483. return 1;
  484. }
  485. /* If we use the PMU, look for the min & max frequencies in the
  486. * device-tree
  487. */
  488. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  489. if (!value)
  490. return 1;
  491. low_freq = (*value) / 1000;
  492. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  493. * here */
  494. if (low_freq < 100000)
  495. low_freq *= 10;
  496. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  497. if (!value)
  498. return 1;
  499. hi_freq = (*value) / 1000;
  500. set_speed_proc = pmu_set_cpu_speed;
  501. is_pmu_based = 1;
  502. return 0;
  503. }
  504. static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
  505. {
  506. struct device_node *volt_gpio_np;
  507. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  508. return 1;
  509. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  510. if (volt_gpio_np)
  511. voltage_gpio = read_gpio(volt_gpio_np);
  512. if (!voltage_gpio){
  513. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  514. return 1;
  515. }
  516. /* OF only reports the high frequency */
  517. hi_freq = cur_freq;
  518. low_freq = cur_freq/2;
  519. /* Read actual frequency from CPU */
  520. cur_freq = dfs_get_cpu_speed();
  521. set_speed_proc = dfs_set_cpu_speed;
  522. get_speed_proc = dfs_get_cpu_speed;
  523. return 0;
  524. }
  525. static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
  526. {
  527. struct device_node *volt_gpio_np;
  528. u32 pvr, *value;
  529. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  530. return 1;
  531. hi_freq = cur_freq;
  532. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  533. if (!value)
  534. return 1;
  535. low_freq = (*value) / 1000;
  536. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  537. if (volt_gpio_np)
  538. voltage_gpio = read_gpio(volt_gpio_np);
  539. pvr = mfspr(SPRN_PVR);
  540. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  541. set_speed_proc = cpu_750fx_cpu_speed;
  542. get_speed_proc = cpu_750fx_get_cpu_speed;
  543. cur_freq = cpu_750fx_get_cpu_speed();
  544. return 0;
  545. }
  546. /* Currently, we support the following machines:
  547. *
  548. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  549. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  550. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  551. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  552. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  553. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  554. * - Recent MacRISC3 laptops
  555. * - All new machines with 7447A CPUs
  556. */
  557. static int __init pmac_cpufreq_setup(void)
  558. {
  559. struct device_node *cpunode;
  560. u32 *value;
  561. if (strstr(cmd_line, "nocpufreq"))
  562. return 0;
  563. /* Assume only one CPU */
  564. cpunode = find_type_devices("cpu");
  565. if (!cpunode)
  566. goto out;
  567. /* Get current cpu clock freq */
  568. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  569. if (!value)
  570. goto out;
  571. cur_freq = (*value) / 1000;
  572. /* Check for 7447A based MacRISC3 */
  573. if (machine_is_compatible("MacRISC3") &&
  574. get_property(cpunode, "dynamic-power-step", NULL) &&
  575. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  576. pmac_cpufreq_init_7447A(cpunode);
  577. /* Check for other MacRISC3 machines */
  578. } else if (machine_is_compatible("PowerBook3,4") ||
  579. machine_is_compatible("PowerBook3,5") ||
  580. machine_is_compatible("MacRISC3")) {
  581. pmac_cpufreq_init_MacRISC3(cpunode);
  582. /* Else check for iBook2 500/600 */
  583. } else if (machine_is_compatible("PowerBook4,1")) {
  584. hi_freq = cur_freq;
  585. low_freq = 400000;
  586. set_speed_proc = pmu_set_cpu_speed;
  587. is_pmu_based = 1;
  588. }
  589. /* Else check for TiPb 400 & 500 */
  590. else if (machine_is_compatible("PowerBook3,2")) {
  591. /* We only know about the 400 MHz and the 500Mhz model
  592. * they both have 300 MHz as low frequency
  593. */
  594. if (cur_freq < 350000 || cur_freq > 550000)
  595. goto out;
  596. hi_freq = cur_freq;
  597. low_freq = 300000;
  598. set_speed_proc = pmu_set_cpu_speed;
  599. is_pmu_based = 1;
  600. }
  601. /* Else check for 750FX */
  602. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  603. pmac_cpufreq_init_750FX(cpunode);
  604. out:
  605. if (set_speed_proc == NULL)
  606. return -ENODEV;
  607. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  608. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  609. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  610. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  611. low_freq/1000, hi_freq/1000, cur_freq/1000);
  612. return cpufreq_register_driver(&pmac_cpufreq_driver);
  613. }
  614. module_init(pmac_cpufreq_setup);