stx_gp3.h 2.0 KB

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  1. /*
  2. * arch/ppc/platforms/stx8560_gp3.h
  3. *
  4. * STx GP3 board definitions
  5. *
  6. * Dan Malek (dan@embeddededge.com)
  7. * Copyright 2004 Embedded Edge, LLC
  8. *
  9. * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
  10. * Copyright 2004-2005 MontaVista Software, Inc.
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #ifndef __MACH_STX_GP3_H
  19. #define __MACH_STX_GP3_H
  20. #include <linux/config.h>
  21. #include <linux/init.h>
  22. #include <linux/seq_file.h>
  23. #include <asm/ppcboot.h>
  24. #define BOARD_CCSRBAR ((uint)0xe0000000)
  25. #define CCSRBAR_SIZE ((uint)1024*1024)
  26. #define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
  27. #define BCSR_ADDR ((uint)0xfc000000)
  28. #define BCSR_SIZE ((uint)(16 * 1024))
  29. #define BCSR_TSEC1_RESET 0x00000080
  30. #define BCSR_TSEC2_RESET 0x00000040
  31. #define BCSR_LED1 0x00000008
  32. #define BCSR_LED2 0x00000004
  33. #define BCSR_LED3 0x00000002
  34. #define BCSR_LED4 0x00000001
  35. extern void mpc85xx_setup_hose(void) __init;
  36. extern void mpc85xx_restart(char *cmd);
  37. extern void mpc85xx_power_off(void);
  38. extern void mpc85xx_halt(void);
  39. extern int mpc85xx_show_cpuinfo(struct seq_file *m);
  40. extern void mpc85xx_init_IRQ(void) __init;
  41. extern unsigned long mpc85xx_find_end_of_memory(void) __init;
  42. extern void mpc85xx_calibrate_decr(void) __init;
  43. #define PCI_CFG_ADDR_OFFSET (0x8000)
  44. #define PCI_CFG_DATA_OFFSET (0x8004)
  45. /* PCI interrupt controller */
  46. #define PIRQA MPC85xx_IRQ_EXT1
  47. #define PIRQB MPC85xx_IRQ_EXT2
  48. #define PIRQC MPC85xx_IRQ_EXT3
  49. #define PIRQD MPC85xx_IRQ_EXT4
  50. #define PCI_MIN_IDSEL 16
  51. #define PCI_MAX_IDSEL 19
  52. #define PCI_IRQ_SLOT 4
  53. #define MPC85XX_PCI1_LOWER_IO 0x00000000
  54. #define MPC85XX_PCI1_UPPER_IO 0x00ffffff
  55. #define MPC85XX_PCI1_LOWER_MEM 0x80000000
  56. #define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
  57. #define MPC85XX_PCI1_IO_BASE 0xe2000000
  58. #define MPC85XX_PCI1_MEM_OFFSET 0x00000000
  59. #define MPC85XX_PCI1_IO_SIZE 0x01000000
  60. #endif /* __MACH_STX_GP3_H */