pci-dma.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578
  1. /*
  2. ** PARISC 1.1 Dynamic DMA mapping support.
  3. ** This implementation is for PA-RISC platforms that do not support
  4. ** I/O TLBs (aka DMA address translation hardware).
  5. ** See Documentation/DMA-mapping.txt for interface definitions.
  6. **
  7. ** (c) Copyright 1999,2000 Hewlett-Packard Company
  8. ** (c) Copyright 2000 Grant Grundler
  9. ** (c) Copyright 2000 Philipp Rumpf <prumpf@tux.org>
  10. ** (c) Copyright 2000 John Marvin
  11. **
  12. ** "leveraged" from 2.3.47: arch/ia64/kernel/pci-dma.c.
  13. ** (I assume it's from David Mosberger-Tang but there was no Copyright)
  14. **
  15. ** AFAIK, all PA7100LC and PA7300LC platforms can use this code.
  16. **
  17. ** - ggg
  18. */
  19. #include <linux/init.h>
  20. #include <linux/mm.h>
  21. #include <linux/pci.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/types.h>
  26. #include <asm/cacheflush.h>
  27. #include <asm/dma.h> /* for DMA_CHUNK_SIZE */
  28. #include <asm/io.h>
  29. #include <asm/page.h> /* get_order */
  30. #include <asm/pgalloc.h>
  31. #include <asm/uaccess.h>
  32. static struct proc_dir_entry * proc_gsc_root = NULL;
  33. static int pcxl_proc_info(char *buffer, char **start, off_t offset, int length);
  34. static unsigned long pcxl_used_bytes = 0;
  35. static unsigned long pcxl_used_pages = 0;
  36. extern unsigned long pcxl_dma_start; /* Start of pcxl dma mapping area */
  37. static spinlock_t pcxl_res_lock;
  38. static char *pcxl_res_map;
  39. static int pcxl_res_hint;
  40. static int pcxl_res_size;
  41. #ifdef DEBUG_PCXL_RESOURCE
  42. #define DBG_RES(x...) printk(x)
  43. #else
  44. #define DBG_RES(x...)
  45. #endif
  46. /*
  47. ** Dump a hex representation of the resource map.
  48. */
  49. #ifdef DUMP_RESMAP
  50. static
  51. void dump_resmap(void)
  52. {
  53. u_long *res_ptr = (unsigned long *)pcxl_res_map;
  54. u_long i = 0;
  55. printk("res_map: ");
  56. for(; i < (pcxl_res_size / sizeof(unsigned long)); ++i, ++res_ptr)
  57. printk("%08lx ", *res_ptr);
  58. printk("\n");
  59. }
  60. #else
  61. static inline void dump_resmap(void) {;}
  62. #endif
  63. static int pa11_dma_supported( struct device *dev, u64 mask)
  64. {
  65. return 1;
  66. }
  67. static inline int map_pte_uncached(pte_t * pte,
  68. unsigned long vaddr,
  69. unsigned long size, unsigned long *paddr_ptr)
  70. {
  71. unsigned long end;
  72. unsigned long orig_vaddr = vaddr;
  73. vaddr &= ~PMD_MASK;
  74. end = vaddr + size;
  75. if (end > PMD_SIZE)
  76. end = PMD_SIZE;
  77. do {
  78. if (!pte_none(*pte))
  79. printk(KERN_ERR "map_pte_uncached: page already exists\n");
  80. set_pte(pte, __mk_pte(*paddr_ptr, PAGE_KERNEL_UNC));
  81. purge_tlb_start();
  82. pdtlb_kernel(orig_vaddr);
  83. purge_tlb_end();
  84. vaddr += PAGE_SIZE;
  85. orig_vaddr += PAGE_SIZE;
  86. (*paddr_ptr) += PAGE_SIZE;
  87. pte++;
  88. } while (vaddr < end);
  89. return 0;
  90. }
  91. static inline int map_pmd_uncached(pmd_t * pmd, unsigned long vaddr,
  92. unsigned long size, unsigned long *paddr_ptr)
  93. {
  94. unsigned long end;
  95. unsigned long orig_vaddr = vaddr;
  96. vaddr &= ~PGDIR_MASK;
  97. end = vaddr + size;
  98. if (end > PGDIR_SIZE)
  99. end = PGDIR_SIZE;
  100. do {
  101. pte_t * pte = pte_alloc_kernel(&init_mm, pmd, vaddr);
  102. if (!pte)
  103. return -ENOMEM;
  104. if (map_pte_uncached(pte, orig_vaddr, end - vaddr, paddr_ptr))
  105. return -ENOMEM;
  106. vaddr = (vaddr + PMD_SIZE) & PMD_MASK;
  107. orig_vaddr += PMD_SIZE;
  108. pmd++;
  109. } while (vaddr < end);
  110. return 0;
  111. }
  112. static inline int map_uncached_pages(unsigned long vaddr, unsigned long size,
  113. unsigned long paddr)
  114. {
  115. pgd_t * dir;
  116. unsigned long end = vaddr + size;
  117. dir = pgd_offset_k(vaddr);
  118. do {
  119. pmd_t *pmd;
  120. pmd = pmd_alloc(NULL, dir, vaddr);
  121. if (!pmd)
  122. return -ENOMEM;
  123. if (map_pmd_uncached(pmd, vaddr, end - vaddr, &paddr))
  124. return -ENOMEM;
  125. vaddr = vaddr + PGDIR_SIZE;
  126. dir++;
  127. } while (vaddr && (vaddr < end));
  128. return 0;
  129. }
  130. static inline void unmap_uncached_pte(pmd_t * pmd, unsigned long vaddr,
  131. unsigned long size)
  132. {
  133. pte_t * pte;
  134. unsigned long end;
  135. unsigned long orig_vaddr = vaddr;
  136. if (pmd_none(*pmd))
  137. return;
  138. if (pmd_bad(*pmd)) {
  139. pmd_ERROR(*pmd);
  140. pmd_clear(pmd);
  141. return;
  142. }
  143. pte = pte_offset_map(pmd, vaddr);
  144. vaddr &= ~PMD_MASK;
  145. end = vaddr + size;
  146. if (end > PMD_SIZE)
  147. end = PMD_SIZE;
  148. do {
  149. pte_t page = *pte;
  150. pte_clear(&init_mm, vaddr, pte);
  151. purge_tlb_start();
  152. pdtlb_kernel(orig_vaddr);
  153. purge_tlb_end();
  154. vaddr += PAGE_SIZE;
  155. orig_vaddr += PAGE_SIZE;
  156. pte++;
  157. if (pte_none(page) || pte_present(page))
  158. continue;
  159. printk(KERN_CRIT "Whee.. Swapped out page in kernel page table\n");
  160. } while (vaddr < end);
  161. }
  162. static inline void unmap_uncached_pmd(pgd_t * dir, unsigned long vaddr,
  163. unsigned long size)
  164. {
  165. pmd_t * pmd;
  166. unsigned long end;
  167. unsigned long orig_vaddr = vaddr;
  168. if (pgd_none(*dir))
  169. return;
  170. if (pgd_bad(*dir)) {
  171. pgd_ERROR(*dir);
  172. pgd_clear(dir);
  173. return;
  174. }
  175. pmd = pmd_offset(dir, vaddr);
  176. vaddr &= ~PGDIR_MASK;
  177. end = vaddr + size;
  178. if (end > PGDIR_SIZE)
  179. end = PGDIR_SIZE;
  180. do {
  181. unmap_uncached_pte(pmd, orig_vaddr, end - vaddr);
  182. vaddr = (vaddr + PMD_SIZE) & PMD_MASK;
  183. orig_vaddr += PMD_SIZE;
  184. pmd++;
  185. } while (vaddr < end);
  186. }
  187. static void unmap_uncached_pages(unsigned long vaddr, unsigned long size)
  188. {
  189. pgd_t * dir;
  190. unsigned long end = vaddr + size;
  191. dir = pgd_offset_k(vaddr);
  192. do {
  193. unmap_uncached_pmd(dir, vaddr, end - vaddr);
  194. vaddr = vaddr + PGDIR_SIZE;
  195. dir++;
  196. } while (vaddr && (vaddr < end));
  197. }
  198. #define PCXL_SEARCH_LOOP(idx, mask, size) \
  199. for(; res_ptr < res_end; ++res_ptr) \
  200. { \
  201. if(0 == ((*res_ptr) & mask)) { \
  202. *res_ptr |= mask; \
  203. idx = (int)((u_long)res_ptr - (u_long)pcxl_res_map); \
  204. pcxl_res_hint = idx + (size >> 3); \
  205. goto resource_found; \
  206. } \
  207. }
  208. #define PCXL_FIND_FREE_MAPPING(idx, mask, size) { \
  209. u##size *res_ptr = (u##size *)&(pcxl_res_map[pcxl_res_hint & ~((size >> 3) - 1)]); \
  210. u##size *res_end = (u##size *)&pcxl_res_map[pcxl_res_size]; \
  211. PCXL_SEARCH_LOOP(idx, mask, size); \
  212. res_ptr = (u##size *)&pcxl_res_map[0]; \
  213. PCXL_SEARCH_LOOP(idx, mask, size); \
  214. }
  215. unsigned long
  216. pcxl_alloc_range(size_t size)
  217. {
  218. int res_idx;
  219. u_long mask, flags;
  220. unsigned int pages_needed = size >> PAGE_SHIFT;
  221. mask = (u_long) -1L;
  222. mask >>= BITS_PER_LONG - pages_needed;
  223. DBG_RES("pcxl_alloc_range() size: %d pages_needed %d pages_mask 0x%08lx\n",
  224. size, pages_needed, mask);
  225. spin_lock_irqsave(&pcxl_res_lock, flags);
  226. if(pages_needed <= 8) {
  227. PCXL_FIND_FREE_MAPPING(res_idx, mask, 8);
  228. } else if(pages_needed <= 16) {
  229. PCXL_FIND_FREE_MAPPING(res_idx, mask, 16);
  230. } else if(pages_needed <= 32) {
  231. PCXL_FIND_FREE_MAPPING(res_idx, mask, 32);
  232. } else {
  233. panic("%s: pcxl_alloc_range() Too many pages to map.\n",
  234. __FILE__);
  235. }
  236. dump_resmap();
  237. panic("%s: pcxl_alloc_range() out of dma mapping resources\n",
  238. __FILE__);
  239. resource_found:
  240. DBG_RES("pcxl_alloc_range() res_idx %d mask 0x%08lx res_hint: %d\n",
  241. res_idx, mask, pcxl_res_hint);
  242. pcxl_used_pages += pages_needed;
  243. pcxl_used_bytes += ((pages_needed >> 3) ? (pages_needed >> 3) : 1);
  244. spin_unlock_irqrestore(&pcxl_res_lock, flags);
  245. dump_resmap();
  246. /*
  247. ** return the corresponding vaddr in the pcxl dma map
  248. */
  249. return (pcxl_dma_start + (res_idx << (PAGE_SHIFT + 3)));
  250. }
  251. #define PCXL_FREE_MAPPINGS(idx, m, size) \
  252. u##size *res_ptr = (u##size *)&(pcxl_res_map[(idx) + (((size >> 3) - 1) & (~((size >> 3) - 1)))]); \
  253. /* BUG_ON((*res_ptr & m) != m); */ \
  254. *res_ptr &= ~m;
  255. /*
  256. ** clear bits in the pcxl resource map
  257. */
  258. static void
  259. pcxl_free_range(unsigned long vaddr, size_t size)
  260. {
  261. u_long mask, flags;
  262. unsigned int res_idx = (vaddr - pcxl_dma_start) >> (PAGE_SHIFT + 3);
  263. unsigned int pages_mapped = size >> PAGE_SHIFT;
  264. mask = (u_long) -1L;
  265. mask >>= BITS_PER_LONG - pages_mapped;
  266. DBG_RES("pcxl_free_range() res_idx: %d size: %d pages_mapped %d mask 0x%08lx\n",
  267. res_idx, size, pages_mapped, mask);
  268. spin_lock_irqsave(&pcxl_res_lock, flags);
  269. if(pages_mapped <= 8) {
  270. PCXL_FREE_MAPPINGS(res_idx, mask, 8);
  271. } else if(pages_mapped <= 16) {
  272. PCXL_FREE_MAPPINGS(res_idx, mask, 16);
  273. } else if(pages_mapped <= 32) {
  274. PCXL_FREE_MAPPINGS(res_idx, mask, 32);
  275. } else {
  276. panic("%s: pcxl_free_range() Too many pages to unmap.\n",
  277. __FILE__);
  278. }
  279. pcxl_used_pages -= (pages_mapped ? pages_mapped : 1);
  280. pcxl_used_bytes -= ((pages_mapped >> 3) ? (pages_mapped >> 3) : 1);
  281. spin_unlock_irqrestore(&pcxl_res_lock, flags);
  282. dump_resmap();
  283. }
  284. static int __init
  285. pcxl_dma_init(void)
  286. {
  287. if (pcxl_dma_start == 0)
  288. return 0;
  289. spin_lock_init(&pcxl_res_lock);
  290. pcxl_res_size = PCXL_DMA_MAP_SIZE >> (PAGE_SHIFT + 3);
  291. pcxl_res_hint = 0;
  292. pcxl_res_map = (char *)__get_free_pages(GFP_KERNEL,
  293. get_order(pcxl_res_size));
  294. memset(pcxl_res_map, 0, pcxl_res_size);
  295. proc_gsc_root = proc_mkdir("gsc", 0);
  296. create_proc_info_entry("dino", 0, proc_gsc_root, pcxl_proc_info);
  297. return 0;
  298. }
  299. __initcall(pcxl_dma_init);
  300. static void * pa11_dma_alloc_consistent (struct device *dev, size_t size, dma_addr_t *dma_handle, int flag)
  301. {
  302. unsigned long vaddr;
  303. unsigned long paddr;
  304. int order;
  305. order = get_order(size);
  306. size = 1 << (order + PAGE_SHIFT);
  307. vaddr = pcxl_alloc_range(size);
  308. paddr = __get_free_pages(flag, order);
  309. flush_kernel_dcache_range(paddr, size);
  310. paddr = __pa(paddr);
  311. map_uncached_pages(vaddr, size, paddr);
  312. *dma_handle = (dma_addr_t) paddr;
  313. #if 0
  314. /* This probably isn't needed to support EISA cards.
  315. ** ISA cards will certainly only support 24-bit DMA addressing.
  316. ** Not clear if we can, want, or need to support ISA.
  317. */
  318. if (!dev || *dev->coherent_dma_mask < 0xffffffff)
  319. gfp |= GFP_DMA;
  320. #endif
  321. return (void *)vaddr;
  322. }
  323. static void pa11_dma_free_consistent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
  324. {
  325. int order;
  326. order = get_order(size);
  327. size = 1 << (order + PAGE_SHIFT);
  328. unmap_uncached_pages((unsigned long)vaddr, size);
  329. pcxl_free_range((unsigned long)vaddr, size);
  330. free_pages((unsigned long)__va(dma_handle), order);
  331. }
  332. static dma_addr_t pa11_dma_map_single(struct device *dev, void *addr, size_t size, enum dma_data_direction direction)
  333. {
  334. if (direction == DMA_NONE) {
  335. printk(KERN_ERR "pa11_dma_map_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
  336. BUG();
  337. }
  338. flush_kernel_dcache_range((unsigned long) addr, size);
  339. return virt_to_phys(addr);
  340. }
  341. static void pa11_dma_unmap_single(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
  342. {
  343. if (direction == DMA_NONE) {
  344. printk(KERN_ERR "pa11_dma_unmap_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
  345. BUG();
  346. }
  347. if (direction == DMA_TO_DEVICE)
  348. return;
  349. /*
  350. * For PCI_DMA_FROMDEVICE this flush is not necessary for the
  351. * simple map/unmap case. However, it IS necessary if if
  352. * pci_dma_sync_single_* has been called and the buffer reused.
  353. */
  354. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle), size);
  355. return;
  356. }
  357. static int pa11_dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  358. {
  359. int i;
  360. if (direction == DMA_NONE)
  361. BUG();
  362. for (i = 0; i < nents; i++, sglist++ ) {
  363. unsigned long vaddr = sg_virt_addr(sglist);
  364. sg_dma_address(sglist) = (dma_addr_t) virt_to_phys(vaddr);
  365. sg_dma_len(sglist) = sglist->length;
  366. flush_kernel_dcache_range(vaddr, sglist->length);
  367. }
  368. return nents;
  369. }
  370. static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  371. {
  372. int i;
  373. if (direction == DMA_NONE)
  374. BUG();
  375. if (direction == DMA_TO_DEVICE)
  376. return;
  377. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  378. for (i = 0; i < nents; i++, sglist++ )
  379. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  380. return;
  381. }
  382. static void pa11_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
  383. {
  384. if (direction == DMA_NONE)
  385. BUG();
  386. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
  387. }
  388. static void pa11_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
  389. {
  390. if (direction == DMA_NONE)
  391. BUG();
  392. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
  393. }
  394. static void pa11_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  395. {
  396. int i;
  397. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  398. for (i = 0; i < nents; i++, sglist++ )
  399. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  400. }
  401. static void pa11_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  402. {
  403. int i;
  404. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  405. for (i = 0; i < nents; i++, sglist++ )
  406. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  407. }
  408. struct hppa_dma_ops pcxl_dma_ops = {
  409. .dma_supported = pa11_dma_supported,
  410. .alloc_consistent = pa11_dma_alloc_consistent,
  411. .alloc_noncoherent = pa11_dma_alloc_consistent,
  412. .free_consistent = pa11_dma_free_consistent,
  413. .map_single = pa11_dma_map_single,
  414. .unmap_single = pa11_dma_unmap_single,
  415. .map_sg = pa11_dma_map_sg,
  416. .unmap_sg = pa11_dma_unmap_sg,
  417. .dma_sync_single_for_cpu = pa11_dma_sync_single_for_cpu,
  418. .dma_sync_single_for_device = pa11_dma_sync_single_for_device,
  419. .dma_sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
  420. .dma_sync_sg_for_device = pa11_dma_sync_sg_for_device,
  421. };
  422. static void *fail_alloc_consistent(struct device *dev, size_t size,
  423. dma_addr_t *dma_handle, int flag)
  424. {
  425. return NULL;
  426. }
  427. static void *pa11_dma_alloc_noncoherent(struct device *dev, size_t size,
  428. dma_addr_t *dma_handle, int flag)
  429. {
  430. void *addr = NULL;
  431. /* rely on kmalloc to be cacheline aligned */
  432. addr = kmalloc(size, flag);
  433. if(addr)
  434. *dma_handle = (dma_addr_t)virt_to_phys(addr);
  435. return addr;
  436. }
  437. static void pa11_dma_free_noncoherent(struct device *dev, size_t size,
  438. void *vaddr, dma_addr_t iova)
  439. {
  440. kfree(vaddr);
  441. return;
  442. }
  443. struct hppa_dma_ops pcx_dma_ops = {
  444. .dma_supported = pa11_dma_supported,
  445. .alloc_consistent = fail_alloc_consistent,
  446. .alloc_noncoherent = pa11_dma_alloc_noncoherent,
  447. .free_consistent = pa11_dma_free_noncoherent,
  448. .map_single = pa11_dma_map_single,
  449. .unmap_single = pa11_dma_unmap_single,
  450. .map_sg = pa11_dma_map_sg,
  451. .unmap_sg = pa11_dma_unmap_sg,
  452. .dma_sync_single_for_cpu = pa11_dma_sync_single_for_cpu,
  453. .dma_sync_single_for_device = pa11_dma_sync_single_for_device,
  454. .dma_sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
  455. .dma_sync_sg_for_device = pa11_dma_sync_sg_for_device,
  456. };
  457. static int pcxl_proc_info(char *buf, char **start, off_t offset, int len)
  458. {
  459. u_long i = 0;
  460. unsigned long *res_ptr = (u_long *)pcxl_res_map;
  461. unsigned long total_pages = pcxl_res_size << 3; /* 8 bits per byte */
  462. sprintf(buf, "\nDMA Mapping Area size : %d bytes (%d pages)\n",
  463. PCXL_DMA_MAP_SIZE,
  464. (pcxl_res_size << 3) ); /* 1 bit per page */
  465. sprintf(buf, "%sResource bitmap : %d bytes (%d pages)\n",
  466. buf, pcxl_res_size, pcxl_res_size << 3); /* 8 bits per byte */
  467. strcat(buf, " total: free: used: % used:\n");
  468. sprintf(buf, "%sblocks %8d %8ld %8ld %8ld%%\n", buf, pcxl_res_size,
  469. pcxl_res_size - pcxl_used_bytes, pcxl_used_bytes,
  470. (pcxl_used_bytes * 100) / pcxl_res_size);
  471. sprintf(buf, "%spages %8ld %8ld %8ld %8ld%%\n", buf, total_pages,
  472. total_pages - pcxl_used_pages, pcxl_used_pages,
  473. (pcxl_used_pages * 100 / total_pages));
  474. strcat(buf, "\nResource bitmap:");
  475. for(; i < (pcxl_res_size / sizeof(u_long)); ++i, ++res_ptr) {
  476. if ((i & 7) == 0)
  477. strcat(buf,"\n ");
  478. sprintf(buf, "%s %08lx", buf, *res_ptr);
  479. }
  480. strcat(buf, "\n");
  481. return strlen(buf);
  482. }