vrc4173.c 13 KB

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  1. /*
  2. * vrc4173.c, NEC VRC4173 base driver for NEC VR4122/VR4131.
  3. *
  4. * Copyright (C) 2001-2003 MontaVista Software Inc.
  5. * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
  6. * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  7. * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/pci.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/types.h>
  30. #include <asm/vr41xx/vr41xx.h>
  31. #include <asm/vr41xx/vrc4173.h>
  32. MODULE_DESCRIPTION("NEC VRC4173 base driver for NEC VR4122/4131");
  33. MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>");
  34. MODULE_LICENSE("GPL");
  35. #define VRC4173_CMUCLKMSK 0x040
  36. #define MSKPIU 0x0001
  37. #define MSKKIU 0x0002
  38. #define MSKAIU 0x0004
  39. #define MSKPS2CH1 0x0008
  40. #define MSKPS2CH2 0x0010
  41. #define MSKUSB 0x0020
  42. #define MSKCARD1 0x0040
  43. #define MSKCARD2 0x0080
  44. #define MSKAC97 0x0100
  45. #define MSK48MUSB 0x0400
  46. #define MSK48MPIN 0x0800
  47. #define MSK48MOSC 0x1000
  48. #define VRC4173_CMUSRST 0x042
  49. #define USBRST 0x0001
  50. #define CARD1RST 0x0002
  51. #define CARD2RST 0x0004
  52. #define AC97RST 0x0008
  53. #define VRC4173_SYSINT1REG 0x060
  54. #define VRC4173_MSYSINT1REG 0x06c
  55. #define VRC4173_MPIUINTREG 0x06e
  56. #define VRC4173_MAIUINTREG 0x070
  57. #define VRC4173_MKIUINTREG 0x072
  58. #define VRC4173_SELECTREG 0x09e
  59. #define SEL3 0x0008
  60. #define SEL2 0x0004
  61. #define SEL1 0x0002
  62. #define SEL0 0x0001
  63. static struct pci_device_id vrc4173_id_table[] __devinitdata = {
  64. { .vendor = PCI_VENDOR_ID_NEC,
  65. .device = PCI_DEVICE_ID_NEC_VRC4173,
  66. .subvendor = PCI_ANY_ID,
  67. .subdevice = PCI_ANY_ID, },
  68. { .vendor = 0, },
  69. };
  70. unsigned long vrc4173_io_offset = 0;
  71. EXPORT_SYMBOL(vrc4173_io_offset);
  72. static int vrc4173_initialized;
  73. static uint16_t vrc4173_cmuclkmsk;
  74. static uint16_t vrc4173_selectreg;
  75. static spinlock_t vrc4173_cmu_lock;
  76. static spinlock_t vrc4173_giu_lock;
  77. static inline void set_cmusrst(uint16_t val)
  78. {
  79. uint16_t cmusrst;
  80. cmusrst = vrc4173_inw(VRC4173_CMUSRST);
  81. cmusrst |= val;
  82. vrc4173_outw(cmusrst, VRC4173_CMUSRST);
  83. }
  84. static inline void clear_cmusrst(uint16_t val)
  85. {
  86. uint16_t cmusrst;
  87. cmusrst = vrc4173_inw(VRC4173_CMUSRST);
  88. cmusrst &= ~val;
  89. vrc4173_outw(cmusrst, VRC4173_CMUSRST);
  90. }
  91. void vrc4173_supply_clock(vrc4173_clock_t clock)
  92. {
  93. if (vrc4173_initialized) {
  94. spin_lock_irq(&vrc4173_cmu_lock);
  95. switch (clock) {
  96. case VRC4173_PIU_CLOCK:
  97. vrc4173_cmuclkmsk |= MSKPIU;
  98. break;
  99. case VRC4173_KIU_CLOCK:
  100. vrc4173_cmuclkmsk |= MSKKIU;
  101. break;
  102. case VRC4173_AIU_CLOCK:
  103. vrc4173_cmuclkmsk |= MSKAIU;
  104. break;
  105. case VRC4173_PS2_CH1_CLOCK:
  106. vrc4173_cmuclkmsk |= MSKPS2CH1;
  107. break;
  108. case VRC4173_PS2_CH2_CLOCK:
  109. vrc4173_cmuclkmsk |= MSKPS2CH2;
  110. break;
  111. case VRC4173_USBU_PCI_CLOCK:
  112. set_cmusrst(USBRST);
  113. vrc4173_cmuclkmsk |= MSKUSB;
  114. break;
  115. case VRC4173_CARDU1_PCI_CLOCK:
  116. set_cmusrst(CARD1RST);
  117. vrc4173_cmuclkmsk |= MSKCARD1;
  118. break;
  119. case VRC4173_CARDU2_PCI_CLOCK:
  120. set_cmusrst(CARD2RST);
  121. vrc4173_cmuclkmsk |= MSKCARD2;
  122. break;
  123. case VRC4173_AC97U_PCI_CLOCK:
  124. set_cmusrst(AC97RST);
  125. vrc4173_cmuclkmsk |= MSKAC97;
  126. break;
  127. case VRC4173_USBU_48MHz_CLOCK:
  128. set_cmusrst(USBRST);
  129. vrc4173_cmuclkmsk |= MSK48MUSB;
  130. break;
  131. case VRC4173_EXT_48MHz_CLOCK:
  132. if (vrc4173_cmuclkmsk & MSK48MOSC)
  133. vrc4173_cmuclkmsk |= MSK48MPIN;
  134. else
  135. printk(KERN_WARNING
  136. "vrc4173_supply_clock: "
  137. "Please supply VRC4173_48MHz_CLOCK first "
  138. "rather than VRC4173_EXT_48MHz_CLOCK.\n");
  139. break;
  140. case VRC4173_48MHz_CLOCK:
  141. vrc4173_cmuclkmsk |= MSK48MOSC;
  142. break;
  143. default:
  144. printk(KERN_WARNING
  145. "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock);
  146. break;
  147. }
  148. vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK);
  149. switch (clock) {
  150. case VRC4173_USBU_PCI_CLOCK:
  151. case VRC4173_USBU_48MHz_CLOCK:
  152. clear_cmusrst(USBRST);
  153. break;
  154. case VRC4173_CARDU1_PCI_CLOCK:
  155. clear_cmusrst(CARD1RST);
  156. break;
  157. case VRC4173_CARDU2_PCI_CLOCK:
  158. clear_cmusrst(CARD2RST);
  159. break;
  160. case VRC4173_AC97U_PCI_CLOCK:
  161. clear_cmusrst(AC97RST);
  162. break;
  163. default:
  164. break;
  165. }
  166. spin_unlock_irq(&vrc4173_cmu_lock);
  167. }
  168. }
  169. EXPORT_SYMBOL(vrc4173_supply_clock);
  170. void vrc4173_mask_clock(vrc4173_clock_t clock)
  171. {
  172. if (vrc4173_initialized) {
  173. spin_lock_irq(&vrc4173_cmu_lock);
  174. switch (clock) {
  175. case VRC4173_PIU_CLOCK:
  176. vrc4173_cmuclkmsk &= ~MSKPIU;
  177. break;
  178. case VRC4173_KIU_CLOCK:
  179. vrc4173_cmuclkmsk &= ~MSKKIU;
  180. break;
  181. case VRC4173_AIU_CLOCK:
  182. vrc4173_cmuclkmsk &= ~MSKAIU;
  183. break;
  184. case VRC4173_PS2_CH1_CLOCK:
  185. vrc4173_cmuclkmsk &= ~MSKPS2CH1;
  186. break;
  187. case VRC4173_PS2_CH2_CLOCK:
  188. vrc4173_cmuclkmsk &= ~MSKPS2CH2;
  189. break;
  190. case VRC4173_USBU_PCI_CLOCK:
  191. set_cmusrst(USBRST);
  192. vrc4173_cmuclkmsk &= ~MSKUSB;
  193. break;
  194. case VRC4173_CARDU1_PCI_CLOCK:
  195. set_cmusrst(CARD1RST);
  196. vrc4173_cmuclkmsk &= ~MSKCARD1;
  197. break;
  198. case VRC4173_CARDU2_PCI_CLOCK:
  199. set_cmusrst(CARD2RST);
  200. vrc4173_cmuclkmsk &= ~MSKCARD2;
  201. break;
  202. case VRC4173_AC97U_PCI_CLOCK:
  203. set_cmusrst(AC97RST);
  204. vrc4173_cmuclkmsk &= ~MSKAC97;
  205. break;
  206. case VRC4173_USBU_48MHz_CLOCK:
  207. set_cmusrst(USBRST);
  208. vrc4173_cmuclkmsk &= ~MSK48MUSB;
  209. break;
  210. case VRC4173_EXT_48MHz_CLOCK:
  211. vrc4173_cmuclkmsk &= ~MSK48MPIN;
  212. break;
  213. case VRC4173_48MHz_CLOCK:
  214. vrc4173_cmuclkmsk &= ~MSK48MOSC;
  215. break;
  216. default:
  217. printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock);
  218. break;
  219. }
  220. vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK);
  221. switch (clock) {
  222. case VRC4173_USBU_PCI_CLOCK:
  223. case VRC4173_USBU_48MHz_CLOCK:
  224. clear_cmusrst(USBRST);
  225. break;
  226. case VRC4173_CARDU1_PCI_CLOCK:
  227. clear_cmusrst(CARD1RST);
  228. break;
  229. case VRC4173_CARDU2_PCI_CLOCK:
  230. clear_cmusrst(CARD2RST);
  231. break;
  232. case VRC4173_AC97U_PCI_CLOCK:
  233. clear_cmusrst(AC97RST);
  234. break;
  235. default:
  236. break;
  237. }
  238. spin_unlock_irq(&vrc4173_cmu_lock);
  239. }
  240. }
  241. EXPORT_SYMBOL(vrc4173_mask_clock);
  242. static inline void vrc4173_cmu_init(void)
  243. {
  244. vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK);
  245. spin_lock_init(&vrc4173_cmu_lock);
  246. }
  247. void vrc4173_select_function(vrc4173_function_t function)
  248. {
  249. if (vrc4173_initialized) {
  250. spin_lock_irq(&vrc4173_giu_lock);
  251. switch(function) {
  252. case PS2_CHANNEL1:
  253. vrc4173_selectreg |= SEL2;
  254. break;
  255. case PS2_CHANNEL2:
  256. vrc4173_selectreg |= SEL1;
  257. break;
  258. case TOUCHPANEL:
  259. vrc4173_selectreg &= SEL2 | SEL1 | SEL0;
  260. break;
  261. case KEYBOARD_8SCANLINES:
  262. vrc4173_selectreg &= SEL3 | SEL2 | SEL1;
  263. break;
  264. case KEYBOARD_10SCANLINES:
  265. vrc4173_selectreg &= SEL3 | SEL2;
  266. break;
  267. case KEYBOARD_12SCANLINES:
  268. vrc4173_selectreg &= SEL3;
  269. break;
  270. case GPIO_0_15PINS:
  271. vrc4173_selectreg |= SEL0;
  272. break;
  273. case GPIO_16_20PINS:
  274. vrc4173_selectreg |= SEL3;
  275. break;
  276. }
  277. vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG);
  278. spin_unlock_irq(&vrc4173_giu_lock);
  279. }
  280. }
  281. EXPORT_SYMBOL(vrc4173_select_function);
  282. static inline void vrc4173_giu_init(void)
  283. {
  284. vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG);
  285. spin_lock_init(&vrc4173_giu_lock);
  286. }
  287. void vrc4173_enable_piuint(uint16_t mask)
  288. {
  289. irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ;
  290. unsigned long flags;
  291. uint16_t val;
  292. spin_lock_irqsave(&desc->lock, flags);
  293. val = vrc4173_inw(VRC4173_MPIUINTREG);
  294. val |= mask;
  295. vrc4173_outw(val, VRC4173_MPIUINTREG);
  296. spin_unlock_irqrestore(&desc->lock, flags);
  297. }
  298. EXPORT_SYMBOL(vrc4173_enable_piuint);
  299. void vrc4173_disable_piuint(uint16_t mask)
  300. {
  301. irq_desc_t *desc = irq_desc + VRC4173_PIU_IRQ;
  302. unsigned long flags;
  303. uint16_t val;
  304. spin_lock_irqsave(&desc->lock, flags);
  305. val = vrc4173_inw(VRC4173_MPIUINTREG);
  306. val &= ~mask;
  307. vrc4173_outw(val, VRC4173_MPIUINTREG);
  308. spin_unlock_irqrestore(&desc->lock, flags);
  309. }
  310. EXPORT_SYMBOL(vrc4173_disable_piuint);
  311. void vrc4173_enable_aiuint(uint16_t mask)
  312. {
  313. irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ;
  314. unsigned long flags;
  315. uint16_t val;
  316. spin_lock_irqsave(&desc->lock, flags);
  317. val = vrc4173_inw(VRC4173_MAIUINTREG);
  318. val |= mask;
  319. vrc4173_outw(val, VRC4173_MAIUINTREG);
  320. spin_unlock_irqrestore(&desc->lock, flags);
  321. }
  322. EXPORT_SYMBOL(vrc4173_enable_aiuint);
  323. void vrc4173_disable_aiuint(uint16_t mask)
  324. {
  325. irq_desc_t *desc = irq_desc + VRC4173_AIU_IRQ;
  326. unsigned long flags;
  327. uint16_t val;
  328. spin_lock_irqsave(&desc->lock, flags);
  329. val = vrc4173_inw(VRC4173_MAIUINTREG);
  330. val &= ~mask;
  331. vrc4173_outw(val, VRC4173_MAIUINTREG);
  332. spin_unlock_irqrestore(&desc->lock, flags);
  333. }
  334. EXPORT_SYMBOL(vrc4173_disable_aiuint);
  335. void vrc4173_enable_kiuint(uint16_t mask)
  336. {
  337. irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ;
  338. unsigned long flags;
  339. uint16_t val;
  340. spin_lock_irqsave(&desc->lock, flags);
  341. val = vrc4173_inw(VRC4173_MKIUINTREG);
  342. val |= mask;
  343. vrc4173_outw(val, VRC4173_MKIUINTREG);
  344. spin_unlock_irqrestore(&desc->lock, flags);
  345. }
  346. EXPORT_SYMBOL(vrc4173_enable_kiuint);
  347. void vrc4173_disable_kiuint(uint16_t mask)
  348. {
  349. irq_desc_t *desc = irq_desc + VRC4173_KIU_IRQ;
  350. unsigned long flags;
  351. uint16_t val;
  352. spin_lock_irqsave(&desc->lock, flags);
  353. val = vrc4173_inw(VRC4173_MKIUINTREG);
  354. val &= ~mask;
  355. vrc4173_outw(val, VRC4173_MKIUINTREG);
  356. spin_unlock_irqrestore(&desc->lock, flags);
  357. }
  358. EXPORT_SYMBOL(vrc4173_disable_kiuint);
  359. static void enable_vrc4173_irq(unsigned int irq)
  360. {
  361. uint16_t val;
  362. val = vrc4173_inw(VRC4173_MSYSINT1REG);
  363. val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE);
  364. vrc4173_outw(val, VRC4173_MSYSINT1REG);
  365. }
  366. static void disable_vrc4173_irq(unsigned int irq)
  367. {
  368. uint16_t val;
  369. val = vrc4173_inw(VRC4173_MSYSINT1REG);
  370. val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE));
  371. vrc4173_outw(val, VRC4173_MSYSINT1REG);
  372. }
  373. static unsigned int startup_vrc4173_irq(unsigned int irq)
  374. {
  375. enable_vrc4173_irq(irq);
  376. return 0; /* never anything pending */
  377. }
  378. #define shutdown_vrc4173_irq disable_vrc4173_irq
  379. #define ack_vrc4173_irq disable_vrc4173_irq
  380. static void end_vrc4173_irq(unsigned int irq)
  381. {
  382. if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
  383. enable_vrc4173_irq(irq);
  384. }
  385. static struct hw_interrupt_type vrc4173_irq_type = {
  386. .typename = "VRC4173",
  387. .startup = startup_vrc4173_irq,
  388. .shutdown = shutdown_vrc4173_irq,
  389. .enable = enable_vrc4173_irq,
  390. .disable = disable_vrc4173_irq,
  391. .ack = ack_vrc4173_irq,
  392. .end = end_vrc4173_irq,
  393. };
  394. static int vrc4173_get_irq_number(int irq)
  395. {
  396. uint16_t status, mask;
  397. int i;
  398. status = vrc4173_inw(VRC4173_SYSINT1REG);
  399. mask = vrc4173_inw(VRC4173_MSYSINT1REG);
  400. status &= mask;
  401. if (status) {
  402. for (i = 0; i < 16; i++)
  403. if (status & (0x0001 << i))
  404. return VRC4173_IRQ(i);
  405. }
  406. return -EINVAL;
  407. }
  408. static inline int vrc4173_icu_init(int cascade_irq)
  409. {
  410. int i;
  411. if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15))
  412. return -EINVAL;
  413. vrc4173_outw(0, VRC4173_MSYSINT1REG);
  414. vr41xx_set_irq_trigger(GIU_IRQ_TO_PIN(cascade_irq), TRIGGER_LEVEL, SIGNAL_THROUGH);
  415. vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
  416. for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
  417. irq_desc[i].handler = &vrc4173_irq_type;
  418. return 0;
  419. }
  420. static int __devinit vrc4173_probe(struct pci_dev *dev,
  421. const struct pci_device_id *id)
  422. {
  423. unsigned long start, flags;
  424. int err;
  425. err = pci_enable_device(dev);
  426. if (err < 0) {
  427. printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n");
  428. return err;
  429. }
  430. pci_set_master(dev);
  431. start = pci_resource_start(dev, 0);
  432. if (start == 0) {
  433. printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n");
  434. return -ENXIO;
  435. }
  436. flags = pci_resource_flags(dev, 0);
  437. if ((flags & IORESOURCE_IO) == 0) {
  438. printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n");
  439. return -ENXIO;
  440. }
  441. err = pci_request_regions(dev, "NEC VRC4173");
  442. if (err < 0) {
  443. printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n");
  444. return err;
  445. }
  446. set_vrc4173_io_offset(start);
  447. vrc4173_cmu_init();
  448. vrc4173_giu_init();
  449. err = vrc4173_icu_init(dev->irq);
  450. if (err < 0) {
  451. printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq);
  452. return err;
  453. }
  454. err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number);
  455. if (err < 0) {
  456. printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq);
  457. return err;
  458. }
  459. printk(KERN_INFO
  460. "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq);
  461. return 0;
  462. }
  463. static void vrc4173_remove(struct pci_dev *dev)
  464. {
  465. free_irq(dev->irq, NULL);
  466. pci_release_regions(dev);
  467. }
  468. static struct pci_driver vrc4173_driver = {
  469. .name = "NEC VRC4173",
  470. .probe = vrc4173_probe,
  471. .remove = vrc4173_remove,
  472. .id_table = vrc4173_id_table,
  473. };
  474. static int __devinit vrc4173_init(void)
  475. {
  476. int err;
  477. err = pci_module_init(&vrc4173_driver);
  478. if (err < 0)
  479. return err;
  480. vrc4173_initialized = 1;
  481. return 0;
  482. }
  483. static void __devexit vrc4173_exit(void)
  484. {
  485. vrc4173_initialized = 0;
  486. pci_unregister_driver(&vrc4173_driver);
  487. }
  488. module_init(vrc4173_init);
  489. module_exit(vrc4173_exit);