int-handler.S 2.2 KB

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  1. /*
  2. * SNI RM200 PCI specific interrupt handler code.
  3. *
  4. * Copyright (C) 1994, 95, 96, 97, 98, 1999, 2000, 01 by Ralf Baechle
  5. */
  6. #include <asm/asm.h>
  7. #include <asm/mipsregs.h>
  8. #include <asm/regdef.h>
  9. #include <asm/sni.h>
  10. #include <asm/stackframe.h>
  11. /*
  12. * The PCI ASIC has the nasty property that it may delay writes if it is busy.
  13. * As a consequence from writes that have not graduated when we exit from the
  14. * interrupt handler we might catch a spurious interrupt. To avoid this we
  15. * force the PCI ASIC to graduate all writes by executing a read from the
  16. * PCI bus.
  17. */
  18. .set noreorder
  19. .set noat
  20. .align 5
  21. NESTED(sni_rm200_pci_handle_int, PT_SIZE, sp)
  22. SAVE_ALL
  23. CLI
  24. .set at
  25. /* Blinken light ... */
  26. lb t0, led_cache
  27. addiu t0, 1
  28. sb t0, led_cache
  29. sb t0, PCIMT_CSLED # write only register
  30. .data
  31. led_cache: .byte 0
  32. .text
  33. mfc0 t0, CP0_STATUS
  34. mfc0 t1, CP0_CAUSE
  35. and t0, t1
  36. andi t1, t0, 0x0800 # hardware interrupt 1
  37. bnez t1, _hwint1
  38. andi t1, t0, 0x4000 # hardware interrupt 4
  39. bnez t1, _hwint4
  40. andi t1, t0, 0x2000 # hardware interrupt 3
  41. bnez t1, _hwint3
  42. andi t1, t0, 0x1000 # hardware interrupt 2
  43. bnez t1, _hwint2
  44. andi t1, t0, 0x8000 # hardware interrupt 5
  45. bnez t1, _hwint5
  46. andi t1, t0, 0x0400 # hardware interrupt 0
  47. bnez t1, _hwint0
  48. nop
  49. j restore_all # spurious interrupt
  50. nop
  51. ##############################################################################
  52. /* hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
  53. button interrupts. */
  54. _hwint0: jal pciasic_hwint0
  55. move a0, sp
  56. j ret_from_irq
  57. nop
  58. /*
  59. * hwint 1 deals with EISA and SCSI interrupts
  60. */
  61. _hwint1: jal pciasic_hwint1
  62. move a0, sp
  63. j ret_from_irq
  64. nop
  65. /*
  66. * This interrupt was used for the com1 console on the first prototypes;
  67. * it's unsed otherwise
  68. */
  69. _hwint2: jal pciasic_hwint2
  70. move a0, sp
  71. j ret_from_irq
  72. nop
  73. /*
  74. * hwint 3 are the PCI interrupts A - D
  75. */
  76. _hwint3: jal pciasic_hwint3
  77. move a0, sp
  78. j ret_from_irq
  79. nop
  80. /*
  81. * hwint 4 is used for only the onboard PCnet 32.
  82. */
  83. _hwint4: jal pciasic_hwint4
  84. move a0, sp
  85. j ret_from_irq
  86. nop
  87. /* hwint5 is the r4k count / compare interrupt */
  88. _hwint5: jal pciasic_hwint5
  89. move a0, sp
  90. j ret_from_irq
  91. nop
  92. END(sni_rm200_pci_handle_int)