ops-marvell.c 2.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/types.h>
  10. #include <linux/pci.h>
  11. #include <asm/marvell.h>
  12. static int mv_read_config(struct pci_bus *bus, unsigned int devfn,
  13. int where, int size, u32 * val)
  14. {
  15. struct mv_pci_controller *mvbc = bus->sysdata;
  16. unsigned long address_reg, data_reg;
  17. u32 address;
  18. address_reg = mvbc->config_addr;
  19. data_reg = mvbc->config_vreg;
  20. /* Accessing device 31 crashes those Marvells. Since years.
  21. Will they ever make sane controllers ... */
  22. if (PCI_SLOT(devfn) == 31)
  23. return PCIBIOS_DEVICE_NOT_FOUND;
  24. address = (bus->number << 16) | (devfn << 8) |
  25. (where & 0xfc) | 0x80000000;
  26. /* start the configuration cycle */
  27. MV_WRITE(address_reg, address);
  28. switch (size) {
  29. case 1:
  30. *val = MV_READ_8(data_reg + (where & 0x3));
  31. break;
  32. case 2:
  33. *val = MV_READ_16(data_reg + (where & 0x3));
  34. break;
  35. case 4:
  36. *val = MV_READ(data_reg);
  37. break;
  38. }
  39. return PCIBIOS_SUCCESSFUL;
  40. }
  41. static int mv_write_config(struct pci_bus *bus, unsigned int devfn,
  42. int where, int size, u32 val)
  43. {
  44. struct mv_pci_controller *mvbc = bus->sysdata;
  45. unsigned long address_reg, data_reg;
  46. u32 address;
  47. address_reg = mvbc->config_addr;
  48. data_reg = mvbc->config_vreg;
  49. /* Accessing device 31 crashes those Marvells. Since years.
  50. Will they ever make sane controllers ... */
  51. if (PCI_SLOT(devfn) == 31)
  52. return PCIBIOS_DEVICE_NOT_FOUND;
  53. address = (bus->number << 16) | (devfn << 8) |
  54. (where & 0xfc) | 0x80000000;
  55. /* start the configuration cycle */
  56. MV_WRITE(address_reg, address);
  57. switch (size) {
  58. case 1:
  59. MV_WRITE_8(data_reg + (where & 0x3), val);
  60. break;
  61. case 2:
  62. MV_WRITE_16(data_reg + (where & 0x3), val);
  63. break;
  64. case 4:
  65. MV_WRITE(data_reg, val);
  66. break;
  67. }
  68. return PCIBIOS_SUCCESSFUL;
  69. }
  70. struct pci_ops mv_pci_ops = {
  71. .read = mv_read_config,
  72. .write = mv_write_config
  73. };