fixup-rbtx4927.c 4.2 KB

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  1. /*
  2. *
  3. * BRIEF MODULE DESCRIPTION
  4. * Board specific pci fixups for the Toshiba rbtx4927
  5. *
  6. * Copyright 2001 MontaVista Software Inc.
  7. * Author: MontaVista Software, Inc.
  8. * ppopov@mvista.com or source@mvista.com
  9. *
  10. * Copyright (C) 2000-2001 Toshiba Corporation
  11. *
  12. * Copyright (C) 2004 MontaVista Software Inc.
  13. * Author: Manish Lachwani (mlachwani@mvista.com)
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. *
  20. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  21. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  22. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  23. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  26. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. *
  31. * You should have received a copy of the GNU General Public License along
  32. * with this program; if not, write to the Free Software Foundation, Inc.,
  33. * 675 Mass Ave, Cambridge, MA 02139, USA.
  34. */
  35. #include <linux/types.h>
  36. #include <linux/pci.h>
  37. #include <linux/kernel.h>
  38. #include <linux/init.h>
  39. #include <asm/tx4927/tx4927.h>
  40. #include <asm/tx4927/tx4927_pci.h>
  41. #undef DEBUG
  42. #ifdef DEBUG
  43. #define DBG(x...) printk(x)
  44. #else
  45. #define DBG(x...)
  46. #endif
  47. /* look up table for backplane pci irq for slots 17-20 by pin # */
  48. static unsigned char backplane_pci_irq[4][4] = {
  49. /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
  50. /* PJ6 SLOT: 17, PIN: 2 */
  51. TX4927_IRQ_IOC_PCIB,
  52. /* PJ6 SLOT: 17, PIN: 3 */
  53. TX4927_IRQ_IOC_PCIC,
  54. /* PJ6 SLOT: 17, PIN: 4 */
  55. TX4927_IRQ_IOC_PCID},
  56. /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
  57. /* SB SLOT: 18, PIN: 2 */
  58. TX4927_IRQ_IOC_PCIC,
  59. /* SB SLOT: 18, PIN: 3 */
  60. TX4927_IRQ_IOC_PCID,
  61. /* SB SLOT: 18, PIN: 4 */
  62. TX4927_IRQ_IOC_PCIA},
  63. /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
  64. /* PJ5 SLOT: 19, PIN: 2 */
  65. TX4927_IRQ_IOC_PCID,
  66. /* PJ5 SLOT: 19, PIN: 3 */
  67. TX4927_IRQ_IOC_PCIA,
  68. /* PJ5 SLOT: 19, PIN: 4 */
  69. TX4927_IRQ_IOC_PCIB},
  70. /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
  71. /* PJ4 SLOT: 20, PIN: 2 */
  72. TX4927_IRQ_IOC_PCIA,
  73. /* PJ4 SLOT: 20, PIN: 3 */
  74. TX4927_IRQ_IOC_PCIB,
  75. /* PJ4 SLOT: 20, PIN: 4 */
  76. TX4927_IRQ_IOC_PCIC}
  77. };
  78. int pci_get_irq(struct pci_dev *dev, int pin)
  79. {
  80. unsigned char irq = pin;
  81. DBG("pci_get_irq: pin is %d\n", pin);
  82. /* IRQ rotation */
  83. irq--; /* 0-3 */
  84. if (dev->bus->parent == NULL &&
  85. PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
  86. printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
  87. PCI_SLOT(dev->devfn));
  88. /* IDSEL=A23 is tx4927 onboard pci slot */
  89. irq = (irq + PCI_SLOT(dev->devfn)) % 4;
  90. irq++; /* 1-4 */
  91. DBG("irq is now %d\n", irq);
  92. switch (irq) {
  93. case 1:
  94. irq = TX4927_IRQ_IOC_PCIA;
  95. break;
  96. case 2:
  97. irq = TX4927_IRQ_IOC_PCIB;
  98. break;
  99. case 3:
  100. irq = TX4927_IRQ_IOC_PCIC;
  101. break;
  102. case 4:
  103. irq = TX4927_IRQ_IOC_PCID;
  104. break;
  105. }
  106. } else {
  107. /* PCI Backplane */
  108. DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
  109. PCI_SLOT(dev->devfn));
  110. irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
  111. }
  112. DBG("assigned irq %d\n", irq);
  113. return irq;
  114. }
  115. int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  116. {
  117. unsigned char irq;
  118. printk("PCI Setup for pin %d \n", pin);
  119. if (dev->device == 0x9130) /* IDE */
  120. irq = 14;
  121. else
  122. irq = pci_get_irq(dev, pin);
  123. return irq;
  124. }
  125. /* Do platform specific device initialization at pci_enable_device() time */
  126. int pcibios_plat_dev_init(struct pci_dev *dev)
  127. {
  128. return 0;
  129. }