int-handler.S 2.1 KB

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  1. /*
  2. * Copyright 2002 Momentum Computer Inc.
  3. * Author: Matthew Dharm <mdharm@momenco.com>
  4. *
  5. * Copyright 2001 MontaVista Software Inc.
  6. * Author: jsun@mvista.com or jsun@junsun.net
  7. *
  8. * First-level interrupt dispatcher for Ocelot-CS board.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <asm/asm.h>
  16. #include <asm/mipsregs.h>
  17. #include <asm/addrspace.h>
  18. #include <asm/regdef.h>
  19. #include <asm/stackframe.h>
  20. #include "ocelot_c_fpga.h"
  21. /*
  22. * First level interrupt dispatcher for Ocelot-CS board
  23. */
  24. .align 5
  25. NESTED(ocelot_handle_int, PT_SIZE, sp)
  26. SAVE_ALL
  27. CLI
  28. .set at
  29. mfc0 t0, CP0_CAUSE
  30. mfc0 t2, CP0_STATUS
  31. and t0, t2
  32. andi t1, t0, STATUSF_IP0 /* sw0 software interrupt */
  33. bnez t1, ll_sw0_irq
  34. andi t1, t0, STATUSF_IP1 /* sw1 software interrupt */
  35. bnez t1, ll_sw1_irq
  36. andi t1, t0, STATUSF_IP2 /* int0 hardware line */
  37. bnez t1, ll_scsi_irq
  38. andi t1, t0, STATUSF_IP3 /* int1 hardware line */
  39. bnez t1, ll_uart_decode_irq
  40. andi t1, t0, STATUSF_IP4 /* int2 hardware line */
  41. bnez t1, ll_pmc_irq
  42. andi t1, t0, STATUSF_IP5 /* int3 hardware line */
  43. bnez t1, ll_cpci_decode_irq
  44. andi t1, t0, STATUSF_IP6 /* int4 hardware line */
  45. bnez t1, ll_mv64340_decode_irq
  46. andi t1, t0, STATUSF_IP7 /* cpu timer */
  47. bnez t1, ll_cputimer_irq
  48. .set reorder
  49. /* wrong alarm or masked ... */
  50. j spurious_interrupt
  51. nop
  52. END(ocelot_handle_int)
  53. .align 5
  54. ll_sw0_irq:
  55. li a0, 0
  56. move a1, sp
  57. jal do_IRQ
  58. j ret_from_irq
  59. ll_sw1_irq:
  60. li a0, 1
  61. move a1, sp
  62. jal do_IRQ
  63. j ret_from_irq
  64. ll_scsi_irq:
  65. li a0, 2
  66. move a1, sp
  67. jal do_IRQ
  68. j ret_from_irq
  69. ll_uart_decode_irq:
  70. move a0, sp
  71. jal ll_uart_irq
  72. j ret_from_irq
  73. ll_pmc_irq:
  74. li a0, 4
  75. move a1, sp
  76. jal do_IRQ
  77. j ret_from_irq
  78. ll_cpci_decode_irq:
  79. move a0, sp
  80. jal ll_cpci_irq
  81. j ret_from_irq
  82. ll_mv64340_decode_irq:
  83. move a0, sp
  84. jal ll_mv64340_irq
  85. j ret_from_irq
  86. ll_cputimer_irq:
  87. li a0, 7
  88. move a1, sp
  89. jal do_IRQ
  90. j ret_from_irq